Ping...
At 08/25/2016 04:35 PM, Dou Liyang wrote:
[Summary]
Use ACPI tables: MADT, DSDT.
1. Create cpuid in order based on Local Apic ID in MADT(apicid).
2. Obtain the nodeid by the proc_id in DSDT.
3. Make the cpuid <-> nodeid mapping persistent.
The mapping relations:
proc_id in DSDT <--> P
On 09/01/2016 04:36 PM, Alan Stern wrote:
On Thu, 1 Sep 2016, Jacek Anaszewski wrote:
On 09/01/2016 07:25 AM, Rafał Miłecki wrote:
On 31 August 2016 at 21:00, Rafał Miłecki wrote:
On 31 August 2016 at 20:23, Alan Stern wrote:
On Tue, 30 Aug 2016, Rafał Miłecki wrote:
Not really as it won'
On some platforms, there is occasional panic triggered when trying to
resume from hibernation, a typical panic looks like:
"BUG: unable to handle kernel paging request at 880085894000
IP: [] load_image_lzo+0x8c2/0xe70"
This is because e820 map has been changed by BIOS across
hibernation, and
> -Original Message-
> From: gre...@linuxfoundation.org [mailto:gre...@linuxfoundation.org]
> Sent: Friday, September 02, 2016 12:09 PM
> To: Nava kishore Manne
> Cc: Soren Brinkmann ; robh...@kernel.org;
> pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk; ga...@
On Fri, 2 Sep 2016, Jarkko Sakkinen wrote:
> The driver emits invalid self test error message even though the init
> succeeds.
>
> Signed-off-by: Jarkko Sakkinen
Reviewed-by: James Morris
--
James Morris
On 09/01/2016 06:41 PM, Peter Zijlstra wrote:
On Thu, Sep 01, 2016 at 04:30:39PM +0100, Will Deacon wrote:
On Thu, Sep 01, 2016 at 05:27:52PM +0200, Manfred Spraul wrote:
Since spin_unlock_wait() is defined as equivalent to spin_lock();
spin_unlock(), the memory barrier before spin_unlock_wait(
From: Baoyou Xie
Date: Thu, 1 Sep 2016 14:16:24 +0800
> We get a few warnings when building kernel with W=1:
> drivers/isdn/hardware/mISDN/hfcmulti.c:568:1: warning: no previous
> declaration for 'enablepcibridge' [-Wmissing-declarations]
> drivers/isdn/hardware/mISDN/hfcmulti.c:574:1: warning:
Hi,
On Thu, Sep 1, 2016 at 11:32 PM, Maxime Ripard
wrote:
> The A33 pipeline also has some new components called SAT and DRC. Even
> though their exact features and programming model is not known (or
> documented), they need to be clocked for the pipeline to carry the video
> signal all the way.
Hi HN,
On Wed, Aug 3, 2016 at 3:16 AM, HungNien Chen wrote:
>
> Considering to be compatible with i2c-hid, WDT8752 has the same way in
> enumerating device.
If it is a HID device then I think you should write a HID driver for
it (unless existing driver, such as hid-multitouch can already handle
From: Eric Dumazet
Date: Wed, 31 Aug 2016 10:42:29 -0700
> From: Eric Dumazet
>
> A while back, Paolo and Hannes sent an RFC patch adding threaded-able
> napi poll loop support : (https://patchwork.ozlabs.org/patch/620657/)
>
> The problem seems to be that softirqs are very aggressive and are
On Fri, Sep 02, 2016 at 06:02:14AM +, Nava kishore Manne wrote:
> This email and any attachments are intended for the sole use of the named
> recipient(s) and contain(s) confidential information that may be proprietary,
> privileged or copyrighted under applicable law. If you are not the inte
From: Wanpeng Li
tick_nohz_start_idle() is prevented to be called if the idle tick can't
be stopped since commit 1f3b0f8243cb934 ("tick/nohz: Optimize nohz idle
enter"). As a result, after suspend/resume the host machine, full dynticks
kvm guest will softlockup:
NMI watchdog: BUG: soft locku
Please check on the lines marked with @. An unlock may be needed at line
210.
julia
-- Forwarded message --
Date: Fri, 2 Sep 2016 07:19:23 +0800
From: kbuild test robot
To: kbu...@01.org
Cc: Julia Lawall
Subject: Re: [PATCH v3] iio: humidity: hdc100x: add triggered buffer suppo
Hi,
On Thu, Sep 1, 2016 at 11:32 PM, Maxime Ripard
wrote:
> Add all the needed blocks to the A33 DTSI.
>
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/boot/dts/sun8i-a33.dtsi | 184
> +++
> 1 file changed, 184 insertions(+)
>
> diff --git a/arch/arm/boot/d
Hi Chen-Yu,
On Wed, Aug 31, 2016 at 04:25:27PM +0800, Chen-Yu Tsai wrote:
> On Wed, Aug 31, 2016 at 4:18 PM, Maxime Ripard
> wrote:
> > The GR8 is an SoC made by Nextthing Co, loosely based on the sun5i family.
> >
> > It has a number of new controllers compared to the A10s and A13 (SPDIF,
> > I
On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of arch/microblaze so that
> it can be used by everyone
>
> Signed-off-by: Zubair Lutfullah Kakakhel
>
> --
The same logic appears twice and should probably be pulled out into a function.
Suggested-by: Michael Ellerman
Signed-off-by: Rui Teng
---
Changes in V2:
- Change function to static and inline
- Use #else block to define an empty static inline function
---
arch/powerpc/mm/hash_utils_64.c | 55
HI Soren,
Thanks for the review
> -Original Message-
> From: Sören Brinkmann [mailto:soren.brinkm...@xilinx.com]
> Sent: Thursday, September 01, 2016 11:27 PM
> To: Nava kishore Manne
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion
Hi Manfred,
On Thu, Sep 01, 2016 at 06:41:26PM +0200, Peter Zijlstra wrote:
> On Thu, Sep 01, 2016 at 04:30:39PM +0100, Will Deacon wrote:
> > On Thu, Sep 01, 2016 at 05:27:52PM +0200, Manfred Spraul wrote:
> > > Since spin_unlock_wait() is defined as equivalent to spin_lock();
> > > spin_unlock()
On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
> Now that the driver is generic and used by multiple archs,
> get_irq is too generic.
>
> Rename get_irq to xintc_get_irq to avoid any conflicts
>
> Signed-off-by: Zubair Lutfullah Kakakhel
>
> ---
> V3 -> V4
> New patch.
> ---
> arch/microb
On Thu, Sep 01, 2016 at 03:40:44PM -0700, Laura Abbott wrote:
>
> Ion clients currently lack a good method to determine what
> heaps are available and what ids they map to. This leads
> to tight coupling between user and kernel space and headaches.
> Add a query ioctl to let userspace know the ava
On Fri, Sep 2, 2016 at 1:48 AM, David Herrmann wrote:
> So either the drm_simple_kms_helpers are buggy, or the SimpleDRM use
> of it. On DPMS updates, I get:
>
> Sep 02 01:00:39 david-t2 kernel:
> [drm:drm_atomic_helper_commit_cleanup_done [drm_kms_helper]] *ERROR*
> [CRTC:25:crtc-0] flip_done tim
On Thu, Sep 01, 2016 at 03:40:43PM -0700, Laura Abbott wrote:
>
> The current Ion ioctls lack a good way to tell what ioctls are
> available. Introduce an ioctl to give an ABI version. This way when the
> ABI inevitably gets screwed up userspace will have a way to tell what
> version of the screw
Hi Linus,
This is a drm fixes pull for 4.8-rc5. Contains fixes for imx, amdgpu, vc4,
msm and one nouveau ACPI fix.
I've tried using a signed tag, let's see if works.
Dave.
The following changes since commit 3eab887a55424fc2c27553b7bfe32330df83f7b8:
Linux 4.8-rc4 (2016-08-28 15:04:33 -0700)
David Miller wrote:
> Ok, I tried this one instead. If no warnings, I'll push it to net-next.
Thanks,
David
Hi,
On Thu, Sep 1, 2016 at 11:31 PM, Maxime Ripard
wrote:
> The A33 has a significantly different pipeline, with components that differ
> too.
>
> Make sure we had compatible for them.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 7 +++
The driver emits invalid self test error message even though the init
succeeds.
Signed-off-by: Jarkko Sakkinen
Fixes: cae8b441fc20 ("tpm: Factor out common startup code")
---
drivers/char/tpm/tpm2-cmd.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/char/tpm/tpm2-c
On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
> The Xilinx AXI Interrupt Controller IP block is used by the MIPS
> based xilfpga platform.
>
> Move the interrupt controller code out of arch/microblaze so that
> it can be used by everyone
if this is just move that you should setup your git r
From: Vivien Didelot
Date: Wed, 31 Aug 2016 18:06:13 -0400
> Access the priv member of the dsa_switch structure directly, instead of
> having an unnecessary helper.
>
> Signed-off-by: Vivien Didelot
Applied.
From: f...@ikuai8.com
Date: Wed, 31 Aug 2016 14:15:05 +0800
> From: Gao Feng
>
> The original codes depend on that the function parameters are evaluated from
> left to right. But the parameter's evaluation order is not defined in C
> standard actually.
>
> When flow_keys_have_l4(&keys) is invok
From: Emanuel Czirai
AMD F12h machines have an erratum which can cause DIV/IDIV to behave
unpredictably. The workaround is to set MSRC001_1029[31] but sometimes
there is no BIOS update containing that workaround so let's do it
ourselves in that case. It is simple enough.
Signed-off-by: Emanuel C
Hi Rob,
> > Document the ir-spi driver's binding which is a IR led driven
> > through the SPI line.
> >
> > Signed-off-by: Andi Shyti
> > ---
> > Documentation/devicetree/bindings/media/spi-ir.txt | 26
> > ++
> > 1 file changed, 26 insertions(+)
> > create mode 100644 Docu
On Fri, 2016-09-02 at 01:09 -0400, Anson Jacob wrote:
> Fix checkpatch.pl warning:
> Missing a blank line after declarations
[]
> diff --git a/drivers/staging/i4l/act2000/act2000_isa.c
> b/drivers/staging/i4l/act2000/act2000_isa.c
[]
> @@ -259,6 +259,7 @@ act2000_isa_receive(act2000_card *card)
>
> Thanks Andi, this is looking great!
Thanks Sean! With your reviews the whole thing looks much better
now :)
I agree with all your points here, I will fix them. Can I add
your reviewd-by?
Thanks,
Andi
On Thu, Sep 01, 2016 at 09:02:29AM -0700, Joe Perches wrote:
> If you want to apply this one first, that's fine by me.
Thanks, I'll route it through the EDAC tree.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--
Hi Sean,
> > ir = kzalloc(sizeof(*ir), GFP_KERNEL);
> > - dev = rc_allocate_device();
> > + dev = rc_allocate_device(RC_DRIVER_IR_RAW);
> > if (!ir || !dev)
> > goto err_out_free;
> >
>
> If ir->sampling = 0 then it should be RC_DRIVER_SCANCODE.
>
>
> > @@ -481,7 +481,
Hi,
On Thu, Sep 1, 2016 at 7:35 PM, Ziyuan Xu wrote:
>
>
> On 2016年09月02日 05:29, Doug Anderson wrote:
>>
>> Hi,
>>
>> On Wed, Aug 31, 2016 at 11:56 PM, Ziyuan Xu wrote:
>>>
>>> Hi
>>>
>>>
>>> On 2016年09月01日 12:20, Doug Anderson wrote:
Hi,
On Wed, Aug 31, 2016 at 7:29 PM, Ziyu
Fix checkpatch.pl warning:
Missing a blank line after declarations
Signed-off-by: Anson Jacob
---
drivers/staging/i4l/act2000/act2000_isa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/i4l/act2000/act2000_isa.c
b/drivers/staging/i4l/act2000/act2000_isa.c
index 1d93151..fb
Fix checkpatch.pl warning:
braces {} are not necessary for single statement blocks
Signed-off-by: Anson Jacob
---
drivers/staging/i4l/act2000/act2000_isa.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/i4l/act2000/act2000_isa.c
b/drivers/staging/i4l/act
Mention that arm64 also has kasan support.
Signed-off-by: Laurentiu Tudor
---
Documentation/kasan.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/kasan.txt b/Documentation/kasan.txt
index 7dd95b3..c156934 100644
--- a/Documentation/kasan.txt
+++ b/Documentat
Encryption in bcachefs is done and working and I just finished documenting the
design - so now, it needs more eyeballs and vetting before letting users play
with it.
I'd appreciate help circulating this around to people who'd be qualified to
review it, too.
Also, bcachefs development is still mov
On 09/01/2016 02:42 AM, Andrew Morton wrote:
> On Wed, 31 Aug 2016 08:55:50 +0530 Anshuman Khandual
> wrote:
>
>> Each individual node in the system has a ZONELIST_FALLBACK zonelist
>> and a ZONELIST_NOFALLBACK zonelist. These zonelists decide fallback
>> order of zones during memory allocations
On 09/01/2016 02:40 AM, Andrew Morton wrote:
> On Wed, 31 Aug 2016 08:55:49 +0530 Anshuman Khandual
> wrote:
>
>> zone_names[] is used to identify any zone given it's index which
>> can be used in many other places. So moving the definition into
>> include/linux/mmzone.h for broader access.
>>
>
We could see an obvious race condition by test that
the former write operation by IDMAC aiming to clear
OWN bit reach right after the later configuration of
the same desc, which makes the IDMAC be in SUSPEND
state as the OWN bit was cleared by the asynchronous
write operation of IDMAC. The bug can
It's very prone to make mistake as we might forget
to replace all PAGE_SIZEs with new values if we try
to modify the ring buffer size for whatever reasons.
Let's use a macro to define it.
Signed-off-by: Shawn Lin
---
Changes in v2: None
drivers/mmc/host/dw_mmc.c | 15 ++-
1 file ch
The original log didn't figure out that we could still
finish this transfer by PIO mode even if failing to use
DMA. And it should be kept for debug level instead of
error one.
Signed-off-by: Shawn Lin
---
Changes in v2: None
drivers/mmc/host/dw_mmc.c | 6 --
1 file changed, 4 insertions(+)
We intend to add more check for descriptors when
preparing desc. Let's spilt out the separate body
to make the dw_mci_translate_sglist not so lengthy.
After spliting out these two functions, we could
remove dw_mci_translate_sglist and call both of them
when staring idmac.
Signed-off-by: Shawn Lin
Hi,
On Thu, Sep 1, 2016 at 8:16 PM, Finley Xiao wrote:
> Signed-off-by: Finley Xiao
> Reviewed-by: Heiko Stuebner
> ---
> arch/arm/boot/dts/rk3066a.dtsi | 2 +-
> arch/arm/boot/dts/rk3188.dtsi | 2 +-
> arch/arm/boot/dts/rk3288.dtsi | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
Hi,
On Thu, Sep 1, 2016 at 8:16 PM, Finley Xiao wrote:
> Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
> fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
> programmable electrical fuses with random access interface.
>
> Add different device tree
Hi,
On Thu, Sep 1, 2016 at 8:16 PM, Finley Xiao wrote:
> 1) the efuse timing of rk3399 is different from earlier SoCs.
> 2) rk3399-efuse is organized as 32bits by 32 one-time programmable
> electrical fuses, the efuse of earlier SoCs is organized as 32bits
> by 8 one-time programmable electrical
Hi,
On Thu, Sep 1, 2016 at 8:16 PM, Finley Xiao wrote:
> Add a efuse0 node in the device tree for the ARM64 rk3399 SoC.
>
> Signed-off-by: Finley Xiao
> ---
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 29 +
> 1 file changed, 29 insertions(+)
Reviewed-by: Douglas An
Hi Rafael
在 2016/9/2 7:38, Rafael J. Wysocki 写道:
On Thursday, September 01, 2016 11:23:42 AM Dongdong Liu wrote:
在 2016/9/1 6:56, Rafael J. Wysocki 写道:
On Wednesday, August 31, 2016 07:48:14 PM Dongdong Liu wrote:
Add specific quirks for PCI config space accessors.This involves:
1. New initi
On Wed, Aug 31, 2016 at 05:40:32PM -0700, Stephen Boyd wrote:
> The MSM chipidea wrapper has two bits that are used to reset the
> first or second phy. Add support for these bits via the reset
> controller framework, so that phy drivers can reset their
> hardware at the right time during initializa
From: Yakir Yang
Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.
Signed-off-by: Xing Zheng
Signed-off-by: Yakir Yang
Signed-off-by: Chris Zhong
---
include/dt-bindings/clock/rk3399-cru.h |
On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
> The two extcon notifiers are almost the same except for the
> variable name for the cable structure and the id notifier inverts
> the cable->state logic. Make it the same and replace two
> functions with one to save some lines. This al
From: Yakir Yang
Export the dclk_vop_frac out, so we can set the dclk_vop as the
child of dclk_vop_frac, and then we can start to take use of
the fractional dividers.
Signed-off-by: Xing Zheng
Signed-off-by: Yakir Yang
Signed-off-by: Chris Zhong
---
drivers/clk/rockchip/clk-rk3399.c | 4 ++-
From: Douglas Anderson
Currently the fractional divider clock time can't handle the
CLK_SET_RATE_PARENT flag. This is because, unlike normal dividers,
there is no clk_divider_bestdiv() function to try speeding up the parent
to see if it helps things.
Eventually someone could try to figure out ho
1) the efuse timing of rk3399 is different from earlier SoCs.
2) rk3399-efuse is organized as 32bits by 32 one-time programmable
electrical fuses, the efuse of earlier SoCs is organized as 32bits
by 8 one-time programmable electrical fuses with random access interface.
This patch adds a new read f
Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
programmable electrical fuses with random access interface.
Add different device tree compatible string for different SoCs to be able
to differentiate b
Signed-off-by: Finley Xiao
Reviewed-by: Heiko Stuebner
---
arch/arm/boot/dts/rk3066a.dtsi | 2 +-
arch/arm/boot/dts/rk3188.dtsi | 2 +-
arch/arm/boot/dts/rk3288.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066
Add a efuse0 node in the device tree for the ARM64 rk3399 SoC.
Signed-off-by: Finley Xiao
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk339
As the timing and organization of efuse may be different
between rockchip SoCs, so their read function may be different.
We add different device tree compatible string for rockchip SoCs
to match their own read function.
On Wed, Aug 31, 2016 at 05:40:23PM -0700, Stephen Boyd wrote:
> Some phys for the chipidea controller are controlled via the ULPI
> viewport. Add support for the ULPI bus so that these sorts of
> phys can be probed and read/written automatically without having
> to duplicate the viewport logic in e
On Wed, Aug 31, 2016 at 04:44:47PM +0800, Xiao Guangrong wrote:
> On 08/31/2016 01:09 AM, Dan Williams wrote:
> >
> > Can you post your exact reproduction steps? This test is not failing for
> > me.
> >
>
> Sure.
>
> 1. make the guest kernel based on your tree, the top commit is
>10d7902f
On Wed, Aug 31, 2016 at 05:40:18PM -0700, Stephen Boyd wrote:
> With the id and vbus detection done via extcon we need to make
> sure we poll the status of OTGSC properly by considering what the
> extcon is saying, and not just what the register is saying. Let's
> move this hw_wait_reg() function t
On 9/1/16 11:46 PM, Thiago Jung Bauermann wrote:
Am Freitag, 26 August 2016, 11:50:10 schrieb Rui Teng:
The same logic appears twice and should probably be pulled out into a
function.
Suggested-by: Michael Ellerman
Signed-off-by: Rui Teng
---
arch/powerpc/mm/hash_utils_64.c | 45
On 2016年09月02日 05:29, Doug Anderson wrote:
Hi,
On Wed, Aug 31, 2016 at 11:56 PM, Ziyuan Xu wrote:
Hi
On 2016年09月01日 12:20, Doug Anderson wrote:
Hi,
On Wed, Aug 31, 2016 at 7:29 PM, Ziyuan Xu wrote:
This is fine to pick up _only_ if you don't care about suspend/resume.
If you care about
Hi Arnd
在 2016/9/1 22:02, Arnd Bergmann 写道:
2. We need to backward compatible with the old dt way config access as below
code,
so we have to call hisi_pcie_common_cfg_read() when accessing the RC config
space.
For this, we have to call hisi_pcie_common_cfg_read().
drivers/pci/host/pcie-hisi
On Tue, Aug 30, 2016 at 07:20:45PM +0200, Clemens Gruber wrote:
> On Mon, Aug 29, 2016 at 06:24:03PM +0800, Peter Chen wrote:
> > Would you please measure the voltage of vbus within 1s at below two
> > conditions:
> >
> > - Just connect cable
> > - Just disconnect cable
>
> We found out that ther
On 08/31/2016 12:15 PM, Sebastian Andrzej Siewior wrote:
> On 2016-08-26 15:37:38 [-0400], Boris Ostrovsky wrote:
>>> If you do find the time, you might manage to rework the code to avoid
>>> using the _nocalls() function. If see this right, you use
>>> xen_setup_vcpu_info_placement() for the init
The following changes since commit 29b4817d4018df78086157ea3a55c1d9424a7cfc:
Linux 4.8-rc1 (2016-08-07 18:18:00 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
tags/clk-fixes-for-linus
for you to fetch changes up to dc7066c54107255
On Thu, Sep 1, 2016 at 11:31 PM, Maxime Ripard
wrote:
> Some Allwinner SoCs, such as the A33, have a variation of the TCON that
> doesn't have a second channel (or it is not wired to anything).
>
> Make sure we can handle that case.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
Hi Heiko,
On 2016년 09월 02일 08:17, Heiko Stübner wrote:
> Am Freitag, 2. September 2016, 06:31:24 schrieb Lin Huang:
>> base on dfi result, we do ddr frequency scaling, register
>> dmc driver to devfreq framework, and use simple-ondemand
>> policy.
>>
>> Signed-off-by: Lin Huang
>> Signed-off-by:
Hi,
On Thu, Sep 1, 2016 at 11:32 PM, Maxime Ripard
wrote:
> The LCD output needs to be muxed. Add the proper pinctrl node.
>
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/boot/dts/sun8i-a33.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a33.d
On Thu, Sep 01, 2016 at 01:32:49PM +0530, Vaibhav Hiremath wrote:
>
>
> On Monday 15 August 2016 02:43 PM, Peter Chen wrote:
> >Some hard-wired USB devices need to do power sequence to let the
> >device work normally, the typical power sequence like: enable USB
> >PHY clock, toggle reset pin, etc
On Thu, Sep 01, 2016 at 01:32:56PM +0530, Vaibhav Hiremath wrote:
> >+static void pwrseq_generic_put(struct pwrseq *pwrseq)
> >+{
> >+struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
> >+int clk;
> >+
> >+if (pwrseq_gen->gpiod_reset)
> >+gpiod_put(pwrseq_gen->g
Make sure that BPF_PROG_TYPE_PERF_EVENT programs only use
preallocated hash maps, since doing memory allocation
in overflow_handler can crash depending on where nmi got triggered.
Signed-off-by: Alexei Starovoitov
Acked-by: Daniel Borkmann
---
kernel/bpf/verifier.c | 22 +-
The bpf program is called 50 times a second and does
hashmap[kern&user_stackid]++
It's primary purpose to check that key bpf helpers like map lookup, update,
get_stackid, trace_printk and ctx access are all working.
It checks:
- PERF_COUNT_HW_CPU_CYCLES on all cpus
- PERF_COUNT_HW_CPU_CYCLES for c
Allow attaching BPF_PROG_TYPE_PERF_EVENT programs to sw and hw perf events
via overflow_handler mechanism.
When program is attached the overflow_handlers become stacked.
The program acts as a filter.
Returning zero from the program means that the normal perf_event_output handler
will not be called
From: Brendan Gregg
sample instruction pointer and frequency count in a BPF map
Signed-off-by: Brendan Gregg
Signed-off-by: Alexei Starovoitov
---
samples/bpf/Makefile| 4 +
samples/bpf/sampleip_kern.c | 38 +
samples/bpf/sampleip_user.c | 196 ++
Introduce BPF_PROG_TYPE_PERF_EVENT programs that can be attached to
HW and SW perf events (PERF_TYPE_HARDWARE and PERF_TYPE_SOFTWARE
correspondingly in uapi/linux/perf_event.h)
The program visible context meta structure is
struct bpf_perf_event_data {
struct pt_regs regs;
__u64 sample_per
Hi Peter, Dave,
this patch set is a follow up to the discussion:
https://lkml.kernel.org/r/20160804142853.GO6862%20()%20twins%20!%20programming%20!%20kicks-ass%20!%20net
It turned out to be simpler than what we discussed.
Patches 1-3 is bpf-side prep for the main patch 4
that adds bpf program as
The verifier supported only 4-byte metafields in
struct __sk_buff and struct xdp_md. The metafields in upcoming
struct bpf_perf_event are 8-byte to match register width in struct pt_regs.
Teach verifier to recognize 8-byte metafield access.
The patch doesn't affect safety of sockets and xdp program
On 2016/9/2 4:37, Andrew Morton wrote:
> On Thu, 1 Sep 2016 10:29:37 -0500 Reza Arbab
> wrote:
>
>> If store_mem_state() is called to online memory which is already online,
>> it will return 1, the value it got from device_online().
>>
>> This is wrong because store_mem_state() is a device_att
On Thu, 2016-09-01 at 14:22:56 +0530, Nava kishore Manne wrote:
> This patch updates the driver to support 64-bit DMA addressing.
>
> Signed-off-by: Nava kishore Manne
> Acked-by: Rob Herring
> ---
> Changes for v5:
> -None.
>
> Changes for v4:
> -Used boolen pro
Hi Zubair,
[auto build test WARNING on tip/irq/core]
[also build test WARNING on v4.8-rc4 next-20160825]
[cannot apply to linus/master linux/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
[Suggest to use git(>=2.9.0) format-patch --base=
Hi Lin,
[auto build test ERROR on next-20160825]
[also build test ERROR on v4.8-rc4]
[cannot apply to rockchip/for-next devfreq/for-rafael linus/master v4.8-rc4
v4.8-rc3 v4.8-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
[Suggest to use g
On Wed, Aug 31, 2016 at 10:28:20PM +0530, Vaibhav Hiremath wrote:
>
>
> On Wednesday 31 August 2016 03:22 PM, Peter Chen wrote:
> >On Wed, Aug 31, 2016 at 01:46:30PM +0530, Vaibhav Hiremath wrote:
> >>
> >>On Monday 29 August 2016 04:40 PM, Peter Chen wrote:
> >>>On Wed, Aug 24, 2016 at 04:53:35P
On Thursday, September 01, 2016 10:48:16 PM Martin Kaiser wrote:
> Signed-off-by: Martin Kaiser
> ---
> arch/arm/mach-imx/hardware.h |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-imx/hardware.h b/arch/arm/mach-imx/hardware.h
> index a42a6df..2810ffc 10
On 2016年09月02日 02:45, Tejun Heo wrote:
Hello,
On Thu, Sep 01, 2016 at 05:09:36PM +0800, qiaozhou wrote:
In our system, we do cpu clock init in of_clk_init path, and use pm qos to
maintain cpu/cci clock. Firstly we init a CCI_CLK_QOS and set a default
value, then update CCI_CLK_QOS to limit CC
On Thu, Sep 01, 2016 at 01:33:22PM +0530, Vaibhav Hiremath wrote:
>
>
> On Monday 15 August 2016 02:43 PM, Peter Chen wrote:
> >Add binding doc for generic power sequence library.
> >
> >Signed-off-by: Peter Chen
> >Acked-by: Philipp Zabel
> >Acked-by: Rob Herring
> >---
> > .../bindings/powe
In the eariler commit 65820199272d ("Documentation: mmc:
sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs"), we
introduced syscon to control corecfg_* stuff provided by
arasan. But given that we may need to ungate the clock for
accessing corecfg_*, it not so perfect as it depends on
whether spe
We introduced soc-ctl-syscon to do several things, for instance, update
baseclk or update clkmul, etc. In odrder to access this physical block,
we need to explicitly enable its clock. Currently we don't control this
clock as we always add a CLK_IGNORE_UNUSED flag for it to indicate that
we will not
We are intent on letting the sdhci variant driver handle this
optional clock on rk3399 platform now.
Signed-off-by: Shawn Lin
Reviewed-by: Ziyuan Xu
Tested-by: Ziyuan Xu
---
Changes in v3: None
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++--
1 file changed, 3 insertio
aclk_emmc_grf is used for accessing corecfg_* of emmc stuff within
GRF block. We don't need to add CLK_IGNORE_UNUSED for it now as the
emmc driver will enable/disable it explicitly when needed.
Signed-off-by: Shawn Lin
Tested-by: Ziyuan Xu
---
Changes in v3: None
Changes in v2: None
drivers/c
This patchset is gonna take over the ownership of aclk_emmc_grf
by sdhci-of-arasan which is used to access corecfg_* stuff provided
by arasan. This clock is optional for sdhci-of-arasan which means we
would not break the driver without adding this. But we strongly
recommend the upcoming users who
On Fri, 2016-09-02 at 00:47 +, Bart Van Assche wrote:
> On 09/01/16 13:11, Joe Perches wrote:
> >
> > Assigning an int to a bitfield:1 can lose precision.
> > Change the caller argument uses from 1/0 to true/false.
> Hello Joe,
Hi Bart.
> Can you clarify how assigning 0 or 1 to a one-bit bit
On 09/01/16 13:11, Joe Perches wrote:
> Assigning an int to a bitfield:1 can lose precision.
> Change the caller argument uses from 1/0 to true/false.
Hello Joe,
Can you clarify how assigning 0 or 1 to a one-bit bitfield can cause a
loss of precision?
Thanks,
Bart.
The xilfpga platform has an AXI I2C Bus master with a temperature
sensor connected to it.
Add the device tree node to use them.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
changed compatible string from "adt7420" to "adi,adt7420"
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips
Now that the driver is generic and used by multiple archs,
get_irq is too generic.
Rename get_irq to xintc_get_irq to avoid any conflicts
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
New patch.
---
arch/microblaze/include/asm/irq.h | 2 +-
arch/microblaze/kernel/irq.c | 4 ++--
d
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