From: Emanuel Czirai <icanrealiz...@gmail.com>

AMD F12h machines have an erratum which can cause DIV/IDIV to behave
unpredictably. The workaround is to set MSRC001_1029[31] but sometimes
there is no BIOS update containing that workaround so let's do it
ourselves in that case. It is simple enough.

Signed-off-by: Emanuel Czirai <icanrealiz...@gmail.com>
Cc: Yaowu Xu <ya...@google.com>
[ Write commit message. ]
Signed-off-by: Borislav Petkov <b...@suse.de>
---
 arch/x86/kernel/cpu/amd.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f5c69d8974e1..eaf938e9df88 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -669,6 +669,14 @@ static void init_amd_gh(struct cpuinfo_x86 *c)
                set_cpu_bug(c, X86_BUG_AMD_TLB_MMATCH);
 }
 
+static void init_amd_ln(struct cpuinfo_x86 *c)
+{
+#define MSR_AMD64_DE_CFG               0xC0011029
+
+       /* Apply erratum 665 fix to machines without a BIOS fix.  */
+       msr_set_bit(MSR_AMD64_DE_CFG, 31);
+}
+
 static void init_amd_bd(struct cpuinfo_x86 *c)
 {
        u64 value;
@@ -726,6 +734,7 @@ static void init_amd(struct cpuinfo_x86 *c)
        case 6:    init_amd_k7(c); break;
        case 0xf:  init_amd_k8(c); break;
        case 0x10: init_amd_gh(c); break;
+       case 0x12: init_amd_ln(c); break;
        case 0x15: init_amd_bd(c); break;
        }
 
-- 
2.8.4

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