Hi Krzysztof,
Thanks for the comments.
On 11/12/18 9:51 AM, Krzysztof Kozlowski wrote:
> On Wed, 7 Nov 2018 at 18:10, Lukasz Luba wrote:
>>
>
> Subject prefix:
> dt-bindings: thermal:
>
>> Thermal trip point gets new flag in DT: irq-mode.
>> Trip point may have a new explicit flag which indica
Hi Krzysztof,
On 11/12/18 10:00 AM, Krzysztof Kozlowski wrote:
> Thanks Lukasz for patches. I like your work!
>
> I have few more comments which will probably apply for all the DTS commits.
>
> On Wed, 7 Nov 2018 at 18:10, Lukasz Luba wrote:
>>
>> This patch adds support for new flag which indi
Hi Rob,
On 11/12/18 8:09 PM, Rob Herring wrote:
> On Wed, Nov 07, 2018 at 06:09:47PM +0100, Lukasz Luba wrote:
>> Thermal trip point gets new flag in DT: irq-mode.
>> Trip point may have a new explicit flag which indicate
>> IRQ support when the temperature is met (so the thermal framework
>> deos
Hi.
ksm by default working only on memory that added by
madvise().
And only way get that work on other applications:
* Use LD_PRELOAD and libraries
* Patch kernel
Lets use kernel task list and add logic to import VMAs from tasks.
That behaviour controlled by new attributes:
* mode:
Hi Boris,
On 12/11/18 09:17, Boris Brezillon wrote:
On Thu, 8 Nov 2018 17:14:10 +
Vitor soares wrote:
Document Synopsys DesignWare I3C master module
Signed-off-by: Vitor soares
---
Changes in v3:
- Remove dummy characters
Changes in v2:
- Address the changes in Documentation/devicetre
Hi Rob,
On 13/11/18 02:09, Rob Herring wrote:
On Thu, Nov 08, 2018 at 05:14:10PM +, Vitor soares wrote:
Document Synopsys DesignWare I3C master module
Signed-off-by: Vitor soares
Please make your author and S-o-b emails match.
This is an alias and both email will work. Anyway I agree t
* Palmer Dabbelt wrote:
> I didn't even know this existed until David submitted a patch set that
> included updates to the documentation as a result of some features he
> added to RISC-V. It looks like there may be a handful of other people
> who don't know this exists either, so I figured I'd
вт, 13 нояб. 2018 г. в 04:49, Matthew Wilcox :
>
> On Tue, Nov 13, 2018 at 02:13:44AM +0300, Timofey Titovets wrote:
> > Some numbers from different not madvised workloads.
> > Formulas:
> > Percentage ratio = (pages_sharing - pages_shared)/pages_unshared
> > Memory saved = (pages_sharing - pag
вт, 13 нояб. 2018 г. в 05:25, Pavel Tatashin :
>
> On 18-11-13 02:13:44, Timofey Titovets wrote:
> > From: Timofey Titovets
> >
> > ksm by default working only on memory that added by
> > madvise().
> >
> > And only way get that work on other applications:
> > * Use LD_PRELOAD and libraries
> >
Series add bd71837/bd71837 PMIC clock support + managed interfaces
Few clk drivers appear to be leaking clkdev lookup registrations at
driver remove. The patch series adds devm versions of lookup
registrations and cleans up few drivers. Driver clean-up patches have
not been tested as I lack the HW
With MFD devices the clk properties may be contained in MFD (parent) DT
node. Current devm_of_clk_add_hw_provider assumes the clk is bound to MFD
subdevice not to MFD device (parent). Add
devm_of_clk_add_hw_provider_parent to tackle this issue.
Also clkdev registration lacks of managed registratio
вт, 13 нояб. 2018 г. в 14:06, Oleksandr Natalenko :
>
> Hi.
>
> > ksm by default working only on memory that added by
> > madvise().
> >
> > And only way get that work on other applications:
> > * Use LD_PRELOAD and libraries
> > * Patch kernel
> >
> > Lets use kernel task list and add logic to
On Tue, Nov 13, 2018 at 12:40 PM Timofey Titovets
wrote:
> ksm by default working only on memory that added by
> madvise().
>
> And only way get that work on other applications:
> * Use LD_PRELOAD and libraries
> * Patch kernel
>
> Lets use kernel task list and add logic to import VMAs from ta
clk-max77686 never clean clkdev lookup at remove. This can cause
oops if clk-max77686 is removed and inserted again. Fix leak by
using new devm clkdev lookup registration. Simplify also error
path by using new devm_of_clk_add_parent_hw_provider.
Signed-off-by: Matti Vaittinen
Reviewed-by: Krzyszt
Use devm based clkdev lookup registration to avoid leaking lookup
structures.
Signed-off-by: Matti Vaittinen
---
drivers/clk/x86/clk-st.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/x86/clk-st.c b/drivers/clk/x86/clk-st.c
index 3a0996f2d556..25d4b97aff9b 100
use devm variant for of_provider registration so provider is freed
at exit.
Signed-off-by: Matti Vaittinen
---
drivers/clk/clk-hi655x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-hi655x.c b/drivers/clk/clk-hi655x.c
index 403a0188634a..394d0109104d 100
Simplify clean-up for rk808 by using managed version of of_provider
registration.
Signed-off-by: Matti Vaittinen
---
drivers/clk/clk-rk808.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/clk-rk808.c b/drivers/clk/clk-rk808.c
index 6461f2820a5b..
use devm variant for of_provider registration so provider is freed
at exit.
Signed-off-by: Matti Vaittinen
Acked-by: Peter Ujfalusi
---
drivers/clk/clk-twl6040.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-twl6040.c b/drivers/clk/clk-twl6040.c
index
use devm variant for of_provider registration.
Signed-off-by: Matti Vaittinen
---
drivers/clk/qcom/apcs-msm8916.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index b1cc8dbcd327..f4e0c136ab1a 100644
---
ROHM bd71837 and bd71847 contain 32768Hz clock gate. Support the clock
using generic clock framework.
Signed-off-by: Matti Vaittinen
---
drivers/clk/Kconfig | 7 +++
drivers/clk/Makefile | 1 +
drivers/clk/clk-bd718x7.c | 131 ++
3 files
вт, 13 нояб. 2018 г. в 14:57, Jann Horn :
>
> On Tue, Nov 13, 2018 at 12:40 PM Timofey Titovets
> wrote:
> > ksm by default working only on memory that added by
> > madvise().
> >
> > And only way get that work on other applications:
> > * Use LD_PRELOAD and libraries
> > * Patch kernel
> >
>
On Tue, Nov 13, 2018 at 1:59 PM Timofey Titovets
wrote:
>
> вт, 13 нояб. 2018 г. в 14:57, Jann Horn :
> >
> > On Tue, Nov 13, 2018 at 12:40 PM Timofey Titovets
> > wrote:
> > > ksm by default working only on memory that added by
> > > madvise().
> > >
> > > And only way get that work on other app
This patch series is a proposal for the I3C master driver for Synopsys IP.
This patch is to be applied on top of I3C subsystem RFC V10 submitted by
Boris Brezillon.
Supported features:
Regular CCC commands.
I3C private transfers.
I2C transfers.
Missing functionalities:
Support DMA interfa
Signed-off-by: Vitor Soares
---
Change in v4:
- Change email soa...@synopsys.com to vitor.soa...@synopsys.com
Change in v3:
- Remove dummy characters
Change in v2:
- None
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 293c863..39910b3 1006
Document Synopsys DesignWare I3C master module
Signed-off-by: Vitor Soares
Reviewed-by: Rob Herring
---
Changes in v4:
- Change email soa...@synopsys.com to vitor.soa...@synopsys.com
- Add Rob Herring R-b
Changes in v3:
- Remove dummy characters
Changes in v2:
- Address the changes in Document
Add driver for Synopsys DesignWare I3C master IP
Signed-off-by: Vitor Soares
---
Change in v4:
- Change email soa...@synopsys.com to vitor.soa...@synopsys.com
Change in v3:
- Use struct_size() (suggested by Matthew)
Change in v2:
- Rename some variables
- Remove dw_i3c_master_dev_set_info()
- A
On Wed, Nov 7, 2018 at 6:08 PM, Mark Rutland wrote:
> On Tue, Nov 06, 2018 at 06:30:22PM +0100, Andrey Konovalov wrote:
>> A tag-based KASAN shadow memory cell contains a memory tag, that
>> corresponds to the tag in the top byte of the pointer, that points to that
>> memory. The native top byte v
Hi.
Yep. However, so far, it requires an application to explicitly opt in
to this behavior, so it's not all that bad. Your patch would remove
the requirement for application opt-in, which, in my opinion, makes
this way worse and reduces the number of applications for which this
is acceptable.
Hello,
I've been studying v4 of the patch-set [1] that Nadav has been working on.
Incidentally, I think it would be useful to cc also the
security/hardening ml.
The patch-set seems to be close to final, so I am resuming this discussion.
On 30/10/2018 19:06, Andy Lutomirski wrote:
I support th
On Thu, Nov 8, 2018 at 1:22 PM, Mark Rutland wrote:
> On Tue, Nov 06, 2018 at 06:30:27PM +0100, Andrey Konovalov wrote:
>> show_pte in arm64 fault handling relies on the fact that the top byte of
>> a kernel pointer is 0xff, which isn't always the case with tag-based
>> KASAN.
>
> That's for the T
On Thu, Nov 08, 2018 at 09:20:40PM +0200, Jarkko Sakkinen wrote:
> On Thu, Nov 08, 2018 at 04:39:42PM +0200, Jarkko Sakkinen wrote:
> > On Wed, Nov 07, 2018 at 09:09:37AM -0800, Dave Hansen wrote:
> > > On 11/7/18 8:30 AM, Jarkko Sakkinen wrote:
> > > >> Does this code run when I type "make kselfte
I've already stumbled over 2 cases where people got confused about how to
disable kpti on AArch64. In both cases, they used existing x86_64 options
and just applied that to an AArch64 system, expecting it to work.
I think it makes a lot of sense to have compatible kernel command line
parameters wh
I've already stumbled over 2 cases where people got confused about how to
disable kpti on AArch64. In both cases, they used existing x86_64 options
and just applied that to an AArch64 system, expecting it to work.
I think it makes a lot of sense to have compatible kernel command line
parameters wh
So,
…snip…
+static int ksm_seeker_thread(void *nothing)
+{
+ pid_t last_pid = 1;
+ pid_t curr_pid;
+ struct task_struct *task;
+
+ set_freezable();
+ set_user_nice(current, 5);
+
+ while (!kthread_should_stop()) {
+ wait_while_offlining();
+
+
вт, 13 нояб. 2018 г. в 19:33, Oleksandr Natalenko :
>
> So,
>
> > …snip…
> > +static int ksm_seeker_thread(void *nothing)
> > +{
> > + pid_t last_pid = 1;
> > + pid_t curr_pid;
> > + struct task_struct *task;
> > +
> > + set_freezable();
> > + set_user_nice(current, 5);
> > +
>
On Tue, Nov 13, 2018 at 6:25 AM Igor Stoppa wrote:
>
> Hello,
> I've been studying v4 of the patch-set [1] that Nadav has been working on.
> Incidentally, I think it would be useful to cc also the
> security/hardening ml.
> The patch-set seems to be close to final, so I am resuming this discussion
On Mon, Nov 12, 2018 at 08:58:24PM -0800, Nicolin Chen wrote:
> Hi Guenter,
>
> On Mon, Nov 12, 2018 at 08:32:48PM -0800, Guenter Roeck wrote:
> > On Mon, Nov 12, 2018 at 08:23:53PM -0800, Nicolin Chen wrote:
> > > INA3221 supports both continuous and single-shot modes. When
> > > running in the c
On 13.11.2018 18:10, Timofey Titovets wrote:
You mean try do something, like that right?
read_lock(&tasklist_lock);
task_lock(task);
read_unlock(&tasklist_lock);
last_pid = task_pid_nr(task);
ksm_import_task_vma(task);
task_unlock(task);
No, task_lock() uses spin_lock() under th
From: Andy Lutomirski
Sent: November 13, 2018 at 5:16:09 PM GMT
> To: Igor Stoppa
> Cc: Kees Cook , Peter Zijlstra ,
> Nadav Amit , Mimi Zohar ,
> Matthew Wilcox , Dave Chinner ,
> James Morris , Michal Hocko , Kernel
> Hardening , linux-integrity
> , LSM List
> , Igor Stoppa
> , Dave Hanse
вт, 13 нояб. 2018 г. в 20:27, Oleksandr Natalenko :
>
> On 13.11.2018 18:10, Timofey Titovets wrote:
> > You mean try do something, like that right?
> >
> > read_lock(&tasklist_lock);
> >
> > task_lock(task);
> > read_unlock(&tasklist_lock);
> > last_pid = task_pid_nr(task);
> > ksm_im
On Tue, Nov 13, 2018 at 9:43 AM Nadav Amit wrote:
>
> From: Andy Lutomirski
> Sent: November 13, 2018 at 5:16:09 PM GMT
> > To: Igor Stoppa
> > Cc: Kees Cook , Peter Zijlstra
> > , Nadav Amit , Mimi Zohar
> > , Matthew Wilcox , Dave
> > Chinner , James Morris , Michal
> > Hocko , Kernel Harde
> Il giorno 12 nov 2018, alle ore 13:28, Greg Kroah-Hartman
> ha scritto:
>
> On Mon, Nov 12, 2018 at 10:56:21AM +0100, Paolo Valente wrote:
>> From: Angelo Ruocco
>>
>> The kernfs pseudo file system doesn't export any function to only find
>> a node by name, without also getting a referenc
On 18-11-13 15:23:50, Oleksandr Natalenko wrote:
> Hi.
>
> > Yep. However, so far, it requires an application to explicitly opt in
> > to this behavior, so it's not all that bad. Your patch would remove
> > the requirement for application opt-in, which, in my opinion, makes
> > this way worse and
From: Richard Gong
This is the 11th submission of Intel Stratix10 service layer and FPGA
manager driver patches. Starting from 10th submission Stratix10 service
layer driver .c file is moved to drivers/firmware, header files is moved
to include/linux/firmware/intel. And other firmware interface i
From: Richard Gong
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong
Signed-off-by: Alan Tull
Acked-by: Moritz Fischer
---
v2: change to put service layer driver node under the firmware node
change compatible to "intel, stratix10-svc"
v3: no change
v4: s/ser
From: Richard Gong
Add a device tree binding for the Intel Stratix10 service layer driver
Signed-off-by: Richard Gong
Signed-off-by: Alan Tull
Reviewed-by: Rob Herring
Acked-by: Moritz Fischer
---
v2: change to put service layer driver node under the firmware node
change compatible to "i
From: Richard Gong
Some features of the Intel Stratix10 SoC require a level of privilege
higher than the kernel is granted. Such secure features include
FPGA programming. In terms of the ARMv8 architecture, the kernel runs
at Exception Level 1 (EL1), access to the features requires
Exception Leve
From: Richard Gong
Add Intel Stratix10 service layer driver document
Signed-off-by: Richard Gong
Signed-off-by: Alan Tull
---
v5: this patch is added in patch set version 5,
add new file stratix10-svc.rst
add stratix10-svc.rst to driver-api/index.rst
v6: no change
v7: no change
v8: no
From: Richard Gong
Extend Intel Stratix10 service layer to support the second service layer
client, Remote Status Update (RSU).
RSU is used to provide our customers with protection against loading bad
bitstreams onto their devices when those devices are booting from flash.
Signed-off-by: Richar
From: Andy Lutomirski
Sent: November 13, 2018 at 5:47:16 PM GMT
> To: Nadav Amit
> Cc: Igor Stoppa , Kees Cook ,
> Peter Zijlstra , Mimi Zohar ,
> Matthew Wilcox , Dave Chinner ,
> James Morris , Michal Hocko , Kernel
> Hardening , linux-integrity
> , LSM List
> , Igor Stoppa
> , Dave Hanse
From: Alan Tull
Add the Stratix10 FPGA manager and a FPGA region to the
device tree.
Signed-off-by: Alan Tull
Signed-off-by: Richard Gong
---
v2: this patch is added in patch set version 2
v3: change to put fpga_mgr node under firmware/svc node
v4: s/fpga-mgr@0/fpga-mgr/ to remove unit_address
From: Alan Tull
Add driver for reconfiguring Intel Stratix10 SoC FPGA devices.
This driver communicates through the Intel service layer driver
which does communication with privileged hardware (that does the
FPGA programming) through a secure mailbox.
Signed-off-by: Alan Tull
Signed-off-by: Ric
From: Alan Tull
Add a Device Tree binding for the Intel Stratix10 SoC FPGA manager.
Signed-off-by: Alan Tull
Signed-off-by: Richard Gong
Reviewed-by: Rob Herring
Acked-by: Moritz Fischer
---
v2: this patch is added in patch set version 2
v3: change to put fpga_mgr node under firmware/svc nod
вт, 13 нояб. 2018 г. в 20:59, Pavel Tatashin :
>
> On 18-11-13 15:23:50, Oleksandr Natalenko wrote:
> > Hi.
> >
> > > Yep. However, so far, it requires an application to explicitly opt in
> > > to this behavior, so it's not all that bad. Your patch would remove
> > > the requirement for application
ksm by default working only on memory that added by
madvise().
And only way get that work on other applications:
* Use LD_PRELOAD and libraries
* Patch kernel
Lets use kernel task list and add logic to import VMAs from tasks.
That behaviour controlled by new attributes:
* mode:
I try m
ksm by default working only on memory that added by
madvise().
And only way get that work on other applications:
* Use LD_PRELOAD and libraries
* Patch kernel
Lets use kernel task list and add logic to import VMAs from tasks.
That behaviour controlled by new attributes:
* mode:
I try m
On 13/11/2018 19:16, Andy Lutomirski wrote:
> On Tue, Nov 13, 2018 at 6:25 AM Igor Stoppa wrote:
[...]
>> How about having one mm_struct for each writer (core or thread)?
>>
>
> I don't think that helps anything. I think the mm_struct used for
> prmem (or rare_write or whatever you want to cal
On 13/11/2018 19:47, Andy Lutomirski wrote:
> For general rare-writish stuff, I don't think we want IRQs running
> with them mapped anywhere for write. For AVC and IMA, I'm less sure.
Why would these be less sensitive?
But I see a big difference between my initial implementation and this one.
I forgot one sentence :-(
On 13/11/2018 20:31, Igor Stoppa wrote:
> On 13/11/2018 19:47, Andy Lutomirski wrote:
>
>> For general rare-writish stuff, I don't think we want IRQs running
>> with them mapped anywhere for write. For AVC and IMA, I'm less sure.
>
> Why would these be less sensitive?
On 18-11-13 21:17:42, Timofey Titovets wrote:
> вт, 13 нояб. 2018 г. в 20:59, Pavel Tatashin :
> >
> > On 18-11-13 15:23:50, Oleksandr Natalenko wrote:
> > > Hi.
> > >
> > > > Yep. However, so far, it requires an application to explicitly opt in
> > > > to this behavior, so it's not all that bad. Y
On Tue, Nov 13, 2018 at 10:26 AM Igor Stoppa wrote:
>
> On 13/11/2018 19:16, Andy Lutomirski wrote:
>
> > should be
> > entirely abstracted away by an appropriate API, so neither SELinux nor
> > IMA need to be aware that there's an mm_struct involved.
>
> Yes, that is fine. In my proposal I was th
On Tue, Nov 13, 2018 at 10:33 AM Igor Stoppa wrote:
>
> I forgot one sentence :-(
>
> On 13/11/2018 20:31, Igor Stoppa wrote:
> > On 13/11/2018 19:47, Andy Lutomirski wrote:
> >
> >> For general rare-writish stuff, I don't think we want IRQs running
> >> with them mapped anywhere for write. For A
> > Is it really necessary to have an extra thread in ksm just to add vma's
> > for scanning? Can we do it right from the scanner thread? Also, may be
> > it is better to add vma's at their creation time when KSM_MODE_ALWAYS is
> > enabled?
> >
> > Thank you,
> > Pasha
>
> Oh, thats a long story, a
On Thu, Oct 11, 2018 at 08:15:01AM -0700, Yu-cheng Yu wrote:
> Explain how CET works and the no_cet_shstk/no_cet_ibt kernel
> parameters.
>
> Signed-off-by: Yu-cheng Yu
> ---
> .../admin-guide/kernel-parameters.txt | 6 +
> Documentation/index.rst | 1 +
> Docum
On Tue, Nov 13, 2018 at 10:31 AM Igor Stoppa wrote:
>
> On 13/11/2018 19:47, Andy Lutomirski wrote:
>
> > For general rare-writish stuff, I don't think we want IRQs running
> > with them mapped anywhere for write. For AVC and IMA, I'm less sure.
>
> Why would these be less sensitive?
I'm not rea
вт, 13 нояб. 2018 г. в 21:35, Pavel Tatashin :
>
> On 18-11-13 21:17:42, Timofey Titovets wrote:
> > вт, 13 нояб. 2018 г. в 20:59, Pavel Tatashin :
> > >
> > > On 18-11-13 15:23:50, Oleksandr Natalenko wrote:
> > > > Hi.
> > > >
> > > > > Yep. However, so far, it requires an application to explicit
On 13/11/2018 20:35, Andy Lutomirski wrote:
> On Tue, Nov 13, 2018 at 10:26 AM Igor Stoppa wrote:
[...]
>> The high level API could be something like:
>>
>> wr_memcpy(void *src, void *dst, uint_t size)
[...]
> If you call a wr_memcpy() function with the signature you suggested,
> then you c
On 13/11/2018 20:36, Andy Lutomirski wrote:
> On Tue, Nov 13, 2018 at 10:33 AM Igor Stoppa wrote:
[...]
>> Unless the secondary mapping is also available to other cores, through
>> the shared mm_struct ?
>>
>
> I don't think this matters much. The other cores will only be able to
> use that ma
On 18-11-13 21:54:13, Timofey Titovets wrote:
> вт, 13 нояб. 2018 г. в 21:35, Pavel Tatashin :
> >
> > On 18-11-13 21:17:42, Timofey Titovets wrote:
> > > вт, 13 нояб. 2018 г. в 20:59, Pavel Tatashin :
> > > >
> > > > On 18-11-13 15:23:50, Oleksandr Natalenko wrote:
> > > > > Hi.
> > > > >
> > > >
On Tue, Nov 13, 2018 at 06:53:59PM +0100, Paolo Valente wrote:
>
>
> > Il giorno 12 nov 2018, alle ore 13:28, Greg Kroah-Hartman
> > ha scritto:
> >
> > On Mon, Nov 12, 2018 at 10:56:21AM +0100, Paolo Valente wrote:
> >> From: Angelo Ruocco
> >>
> >> The kernfs pseudo file system doesn't exp
On 13/11/2018 20:48, Andy Lutomirski wrote:
> On Tue, Nov 13, 2018 at 10:31 AM Igor Stoppa wrote:
>>
>> On 13/11/2018 19:47, Andy Lutomirski wrote:
>>
>>> For general rare-writish stuff, I don't think we want IRQs running
>>> with them mapped anywhere for write. For AVC and IMA, I'm less sure.
>>
On Tue, 06 Nov 2018, Jonathan Corbet wrote:
> On Mon, 5 Nov 2018 09:48:33 +0100
> Christoph Niedermaier wrote:
>
>> A problem was found when EDID data sets for displays other
>> than the provided samples were generated. The patch series has
>> no effect on the provided samples that still match th
+cc Daniel Gruss
On Tue, Nov 13, 2018 at 6:59 PM Pavel Tatashin
wrote:
> On 18-11-13 15:23:50, Oleksandr Natalenko wrote:
> > Hi.
> >
> > > Yep. However, so far, it requires an application to explicitly opt in
> > > to this behavior, so it's not all that bad. Your patch would remove
> > > the req
On Tue, 2018-11-13 at 19:43 +0100, Borislav Petkov wrote:
> On Thu, Oct 11, 2018 at 08:15:01AM -0700, Yu-cheng Yu wrote:
> > Explain how CET works and the no_cet_shstk/no_cet_ibt kernel
> > parameters.
> >
> > Signed-off-by: Yu-cheng Yu
> > ---
> > .../admin-guide/kernel-parameters.txt |
> From: Borislav Petkov [mailto:b...@alien8.de]
> Subject: [PATCH v7 01/13] arch/x86: Start renaming the rdt files to more
> generic names
>
> I guess the subject prefix for all those should be "arch/resctrl:" or so now.
Is "x86/resctrl" a better subject prefix?
Thanks.
-Fenghua
On Tue, Nov 13, 2018 at 09:35:40PM +, Yu, Fenghua wrote:
> Is "x86/resctrl" a better subject prefix?
Doh, of course. Diffstat is all arch/x86/.
Thx.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
> From: Moger, Babu [mailto:babu.mo...@amd.com]
> Subject: [PATCH v7 11/13] arch/x86: Introduce QOS feature for AMD
> The specification for this feature is available at
> https://developer.amd.com/wp-content/resources/56375.pdf
> +bool cbm_validate_amd(char *buf, u32 *data, struct rdt_resource *r)
On Tue, Nov 13, 2018 at 04:01:27PM +0100, Andrey Konovalov wrote:
> On Thu, Nov 8, 2018 at 1:22 PM, Mark Rutland wrote:
> > On Tue, Nov 06, 2018 at 06:30:27PM +0100, Andrey Konovalov wrote:
> >> show_pte in arm64 fault handling relies on the fact that the top byte of
> >> a kernel pointer is 0xff,
> Wait, what? Can you name specific ones? Nowadays, enabling KSM for
> untrusted VMs seems like a terrible idea to me, security-wise.
Of course it is not used to share data among different
customers/tenants, as far as I know it is used by Oracle Cloud to
merge the same pages in clear containers.
вт, 13 нояб. 2018 г. в 22:17, Pavel Tatashin :
>
> On 18-11-13 21:54:13, Timofey Titovets wrote:
> > вт, 13 нояб. 2018 г. в 21:35, Pavel Tatashin :
> > >
> > > On 18-11-13 21:17:42, Timofey Titovets wrote:
> > > > вт, 13 нояб. 2018 г. в 20:59, Pavel Tatashin
> > > > :
> > > > >
> > > > > On 18-11-
> > > That must work, but we out of bit space in vm_flags [1].
> > > i.e. first 32 bits already defined, and other only accessible only on
> > > 64-bit machines.
> >
> > So, grow vm_flags_t to 64-bit, or enable this feature on 64-bit only.
>
> With all due respect to you, for that type of things w
вт, 13 нояб. 2018 г. в 21:43, Pavel Tatashin :
>
> > > Is it really necessary to have an extra thread in ksm just to add vma's
> > > for scanning? Can we do it right from the scanner thread? Also, may be
> > > it is better to add vma's at their creation time when KSM_MODE_ALWAYS is
> > > enabled?
>
ср, 14 нояб. 2018 г. в 01:53, Pavel Tatashin :
>
> > > > That must work, but we out of bit space in vm_flags [1].
> > > > i.e. first 32 bits already defined, and other only accessible only on
> > > > 64-bit machines.
> > >
> > > So, grow vm_flags_t to 64-bit, or enable this feature on 64-bit only.
From: Timofey Titovets
ksm by default working only on memory that added by
madvise().
And only way get that work on other applications:
* Use LD_PRELOAD and libraries
* Patch kernel
Lets use kernel task list and add logic to import VMAs from tasks.
That behaviour controlled by new attribut
Hi Guenter,
On Tue, Nov 13, 2018 at 09:21:02AM -0800, Guenter Roeck wrote:
> > > > INA3221 supports both continuous and single-shot modes. When
> > > > running in the continuous mode, it keeps measuring the inputs
> > > > and converting them to the data register even if there are no
> > > > users
在 2018/11/13 上午8:23, Leon Romanovsky 写道:
On Mon, Nov 12, 2018 at 03:58:02PM +0800, Kenneth Lee wrote:
From: Kenneth Lee
WarpDrive is a general accelerator framework for the user application to
access the hardware without going through the kernel in data path.
The kernel component to provide
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