> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Sunday, December 12, 2010 3:02 PM
> In case you're collecting things to clean up for the next issue,
> here's
> another :-) The Rev M OMAP35x TRM says on page 1139:
>
> "In both prefetch and write-posting modes, the engine respective
On 10 December 2010 19:25, Woodruff, Richard wrote:
> The underlying functional spec which TRM started from gives this description:
>
> "In MPU filling mode, the FIFO status can be monitored through the
> FIFOPointer or through the FIFOThresholdStatus bits in the
> GPMC_PREFETCH_STATUS register.
Richard W.
> -Original Message-
> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev-
> boun...@lists.linaro.org] On Behalf Of Peter Maydell
> Sent: Friday, December 10, 2010 11:06 AM
> To: linaro-dev@lists.linaro.org
> Subject: OMAP query about GPMC FIFOTHRESHOL
Hi. I have a question about a detail in the OMAP3 TRM, which I
was hoping some omap-savvy person on this list might be able
to answer.
This is about the GPMC prefetch engine register
GPMC_PREFETCH_STATUS and specifically its FIFOTHRESHOLDSTATUS
bit. I've been using the OMAP35xx TRM (document SPRUF
