Hi. I have a question about a detail in the OMAP3 TRM, which I was hoping some omap-savvy person on this list might be able to answer.
This is about the GPMC prefetch engine register GPMC_PREFETCH_STATUS and specifically its FIFOTHRESHOLDSTATUS bit. I've been using the OMAP35xx TRM (document SPRUF98L, rev L) as reference. The register summary on page 1176 says "set when FIFOPointer exceeds FIFOThreshold value" and is clear that it is 1 if Pointer > Threshold. However the description on page 1141 says "The FIFOPOINTER indicates the current number of available data to be read; FIFOTHRESHOLDSTATUS set to 1 indicates that at least FIFOTHRESHOLD bytes are available from the FIFO", ie the bit is set if Pointer >= Threshold. The text on p1143 is similar. So is the bit set for Pointer > Threshold or Pointer >= Threshold? (Greater-than-or-equal makes more conceptual sense to me and would match the condition in which GPMC_IRQSTATUS's FIFOEVENTSTATUS bit is set.) (I'm looking at this because I'm implementing the prefetch engine in qemu.) thanks in advance -- PMM _______________________________________________ linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
