Hi Leif,
I think I got it. Thank you very much.
-Original Message-
From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
Sent: 2014-5-1 (星期四) 19:32
To: Kelvin K. Li
Cc: linaro-dev@lists.linaro.org
Subject: Re: 答复: why is the the smp_mb() in arm64's barrier.h "dmb ish"?
On Thu, May 01,
Hi Leif，
Another questions:
In Arm V8 Architecture Reference Manual，there is an example (see beblow) to
explain the shareability attribute of clusters. It is easy to know: each
cluster is corresponding to a Inner shareable domain; the two cluster comprise
a Outer shareable domain.
So, how d
Hi Leif，
Why do the smp_mb()/smp_rmb()/smp_wmb() for arm (arm-32) not change to the "dmb
ishxx" too?
Is there some consideration？
-Original Message-
From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
Sent: 2014-5-1 (星期四) 0:39
To: Kelvin K. Li
Cc: linaro-dev
Subject: Re: why is the t
Hi All,
In arch/arm64/include/asm/barrier.h, there is the definition of
smp_mb()/smp_rmb()/smp_wmb() for arm64. I noticed that all the 3 macors
are using "dmb ishxx", which is only affect the cluster of the CPU
executing the instruction. But in the big.LITTLE system, there will be 2
cluster.
