Hi Leif， Why do the smp_mb()/smp_rmb()/smp_wmb() for arm (arm-32) not change to the "dmb ishxx" too?
Is there some consideration？ -----Original Message----- From: Leif Lindholm [mailto:leif.lindh...@linaro.org] Sent: 2014-5-1 (星期四) 0:39 To: Kelvin K. Li Cc: linaro-dev Subject: Re: why is the the smp_mb() in arm64's barrier.h "dmb ish"? Hi Kelvin. On 30 April 2014 10:52, <kelvin...@via-alliance.com> wrote: > In arch/arm64/include/asm/barrier.h, there is the definition of > smp_mb()/smp_rmb()/smp_wmb() for arm64. I noticed that all the 3 macors are > using “dmb ishxx”, which is only affect the cluster of the CPU executing the > instruction. This is incorrect. > But in the big.LITTLE system, there will be 2 cluster. So the > smp_mb()/smp_rmb()/smp_wmb() cannot affect all the CPU in the system. Yes, they do. In a big.LITTLE HMP system, all participating CPUs are part of the inner-shareable domain. Regards, Leif
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