I couldn't find any code
that would instantiate a matching platform_device either, so the driver
is effectively unused.
Reported-by: Nicolas Chauvet
Cc: David Brown
Cc: Daniel Walker
Cc: Bryan Huntsman
Cc: Olav Haugan
Signed-off-by: Thierry Reding
---
drivers/iommu/Kconfig | 1 +
memory that needs to be mapped to a
virtually contiguous region.
Signed-off-by: Olav Haugan
---
drivers/iommu/amd_iommu.c | 1 +
drivers/iommu/arm-smmu.c | 1 +
drivers/iommu/exynos-iommu.c | 1 +
drivers/iommu/intel-iommu.c| 1 +
drivers/iommu/iommu.c | 25
ot have these implemented.
* Rebased on top of Joerg's tree.
* Split out patch from the rest of the patches.
Olav Haugan (1):
iommu-api: Add map_sg function
drivers/iommu/amd_iommu.c | 1 +
drivers/iommu/arm-smmu.c | 1 +
drivers/iommu/exynos-iommu.c | 1 +
drivers/iommu/intel-io
On 10/15/2014 2:16 AM, Thierry Reding wrote:
On Mon, Oct 06, 2014 at 12:02:47PM -0700, Olav Haugan wrote:
On 9/25/2014 10:01 AM, Joerg Roedel wrote:
On Mon, Aug 11, 2014 at 03:45:50PM -0700, Olav Haugan wrote:
+static inline int iommu_map_sg(struct iommu_domain *domain, unsigned long iova
On 9/25/2014 10:01 AM, Joerg Roedel wrote:
On Mon, Aug 11, 2014 at 03:45:50PM -0700, Olav Haugan wrote:
+static inline int iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
+ struct scatterlist *sg, unsigned int nents,
+ int
On 10/6/2014 4:04 AM, Will Deacon wrote:
Hi Varun,
[adding the Qualcomm guys, as I have an open question below]
On Mon, Oct 06, 2014 at 11:28:15AM +0100, Varun Sethi wrote:
This is used for indicating device memory type for a DMA transaction. IOMMU
driver would set up attributes indicationg ac
On 8/28/2014 3:55 AM, Will Deacon wrote:
> On Tue, Aug 26, 2014 at 11:37:30AM +0100, Will Deacon wrote:
>> On Sat, Aug 23, 2014 at 01:12:32AM +0100, Olav Haugan wrote:
>>> The number of S2CR registers is not properly set when stream
>>> matching is not supported. Fix th
The number of S2CR registers is not properly set when stream
matching is not supported. Fix this and add check that we do not try to
access outside of the number of S2CR regisrers.
Signed-off-by: Olav Haugan
---
drivers/iommu/arm-smmu.c | 28
1 file changed, 20
On 8/22/2014 8:22 AM, Will Deacon wrote:
> Hi Olav,
>
> Some really minor comments, but this looks good.
>
> On Tue, Aug 19, 2014 at 12:17:38AM +0100, Olav Haugan wrote:
>> The number of S2CR registers is not properly set when stream
>> matching is not supported. Fix
Hi Will,
On 8/19/2014 5:58 AM, Will Deacon wrote:
> On Wed, Aug 13, 2014 at 01:51:34AM +0100, Mitchel Humpherys wrote:
>> On some platforms with tight power constraints it is polite to only
>> leave your clocks on for as long as you absolutely need them. Currently
>> we assume that all clocks nece
On 8/19/2014 9:11 AM, Laurent Pinchart wrote:
> On Tuesday 19 August 2014 13:59:54 Joerg Roedel wrote:
>> On Mon, Aug 18, 2014 at 03:47:56PM -0700, Olav Haugan wrote:
>>> If the alignment is not correct then iommu_map() will return error. Not
>>> sure what other option
On 8/19/2014 4:59 AM, Joerg Roedel wrote:
> On Mon, Aug 18, 2014 at 03:47:56PM -0700, Olav Haugan wrote:
>> If the alignment is not correct then iommu_map() will return error. Not
>> sure what other option we have here (and why make it different behavior
>> than iommu_map wh
The number of S2CR registers is not properly set when stream
matching is not supported. Fix this and add check that we do not try to
access outside of the number of S2CR regisrers.
Signed-off-by: Olav Haugan
---
drivers/iommu/arm-smmu.c | 24 +---
1 file changed, 17
On 8/18/2014 2:55 PM, Joerg Roedel wrote:
> On Mon, Aug 11, 2014 at 03:45:50PM -0700, Olav Haugan wrote:
>> +int default_iommu_map_sg(struct iommu_domain *domain, unsigned long iova,
>> + struct scatterlist *sg, unsigned int nents,
>> +
On 8/18/2014 2:26 PM, j...@8bytes.org wrote:
> On Mon, Aug 18, 2014 at 01:48:46PM -0700, Olav Haugan wrote:
>> On 8/18/2014 11:32 AM, Rob Clark wrote:
>
>> No, I do not have other uses right now. But could imagine use cases like
>> "force mapping" flag etc.
>
On 8/18/2014 11:32 AM, Rob Clark wrote:
> On Mon, Aug 18, 2014 at 10:07 AM, j...@8bytes.org wrote:
>> On Tue, Aug 12, 2014 at 09:56:11AM -0700, Olav Haugan wrote:
>>> On 8/12/2014 3:48 AM, Rob Clark wrote:
>>>> iirc, one plan for 'flags' was some sort of DO
Hi Laurent,
On 8/12/2014 9:55 AM, Laurent Pinchart wrote:
> Hi Olav,
>
> Thank you for the patch.
>
> On Monday 11 August 2014 15:45:50 Olav Haugan wrote:
>> Mapping and unmapping are more often than not in the critical path.
>> map_sg and unmap_sg allows IOMM
On 8/12/2014 3:48 AM, Rob Clark wrote:
> On Mon, Aug 11, 2014 at 9:51 PM, Hiroshi Doyu wrote:
>> Hi Olav,
>>
>> Olav Haugan writes:
>>
>>> @@ -93,6 +94,10 @@ enum iommu_attr {
>>> * @detach_dev: detach device from an iommu domain
>>> *
On 8/11/2014 6:35 PM, Konrad Rzeszutek Wilk wrote:
> On Mon, Aug 11, 2014 at 03:45:50PM -0700, Olav Haugan wrote:
> .. snip..
>> +for_each_sg(sg, s, nents, i) {
>> +phys_addr_t phys = page_to_phys(sg_page(s));
>> +size_t page_len
physically contiguous chunk of memory that needs to be mapped to a
virtually contiguous region.
Signed-off-by: Olav Haugan
---
drivers/iommu/amd_iommu.c | 2 ++
drivers/iommu/arm-smmu.c | 2 ++
drivers/iommu/exynos-iommu.c | 2 ++
drivers/iommu/intel-iommu.c| 2 ++
drivers/iommu
implentations to allow clients to signal to the driver not
to do TLB invalidate for example.
* Added fallback in case iommu_{map,unmap}_range is called for an IOMMU driver
that does not have these implemented.
* Rebased on top of Joerg's tree.
* Split out patch from the rest of the patches.
On 8/7/2014 2:22 AM, Will Deacon wrote:
> On Thu, Aug 07, 2014 at 12:34:09AM +0100, Olav Haugan wrote:
>> On 8/6/2014 10:35 AM, Will Deacon wrote:
>>> Hmm, I'm checking this with the architects because the TRMs aren't exactly
>>> clear. The NUMSMRG works
On 8/6/2014 11:24 PM, Thierry Reding wrote:
> On Wed, Aug 06, 2014 at 04:28:45PM -0700, Olav Haugan wrote:
>> On 8/6/2014 1:17 PM, Joerg Roedel wrote:
>>> On Wed, Aug 06, 2014 at 10:08:55AM -0700, Olav Haugan wrote:
>>>> so you are suggesting that I check in
On 8/6/2014 10:35 AM, Will Deacon wrote:
> Hi Olav,
>
> On Wed, Aug 06, 2014 at 05:44:38PM +0100, Olav Haugan wrote:
>> On 8/6/2014 3:19 AM, Will Deacon wrote:
>>> On Mon, Aug 04, 2014 at 07:01:03PM +0100, Olav Haugan wrote:
>>>> The SMR registers do n
On 8/6/2014 1:17 PM, Joerg Roedel wrote:
> On Wed, Aug 06, 2014 at 10:08:55AM -0700, Olav Haugan wrote:
>> so you are suggesting that I check in "bus_set_iommu()" whether the
>> driver has set the map_sg/unmap_sg function pointers or not and if not
>> set it to the
On 8/5/2014 8:13 AM, Konrad Rzeszutek Wilk wrote:
> On Thu, Jul 31, 2014 at 05:54:44PM -0700, Olav Haugan wrote:
>> Mapping and unmapping are more often than not in the critical path.
>> map_sg and unmap_sg allows IOMMU driver implementations to optimize
>> the process of
On 8/6/2014 3:19 AM, Will Deacon wrote:
> Hi Olav,
>
> On Mon, Aug 04, 2014 at 07:01:03PM +0100, Olav Haugan wrote:
>> The SMR registers do not exist when stream matching is not
>> supported by the hardware. Avoid writing to this register if not needed.
>>
&g
Any more comments on this from anyone before I submit v5?
On 8/1/2014 9:44 AM, Olav Haugan wrote:
> Hi Will,
>
> On 8/1/2014 1:22 AM, Will Deacon wrote:
>> Hi Olav,
>>
>> On Fri, Aug 01, 2014 at 01:54:44AM +0100, Olav Haugan wrote:
>>> Mapping and unma
issue to fix
for the second patch.
Olav Haugan (2):
iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1
iommu/arm-smmu: Do not access non-existing SMR registers
drivers/iommu/arm-smmu.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
--
The Qualcomm Innovation Cen
The SMR registers do not exist when stream matching is not
supported by the hardware. Avoid writing to this register if not needed.
Signed-off-by: Olav Haugan
---
drivers/iommu/arm-smmu.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers
Stage-1 context bank does not have SMMU_CBn_TCR[SL0] field. SL0 field
is only applicable to stage-2 context banks.
Signed-off-by: Olav Haugan
---
drivers/iommu/arm-smmu.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm
On 8/4/2014 2:41 AM, Will Deacon wrote:
> Hi Olav,
>
> On Mon, Aug 04, 2014 at 01:47:43AM +0100, Olav Haugan wrote:
>> Stage-1 context bank does not have SMMU_CBn_TCR[SL0] field. SL0 field
>> is only applicable to stage-2 context banks.
>
> Ha, I actually noticed th
Stage-1 context bank does not have SMMU_CBn_TCR[SL0] field. SL0 field
is only applicable to stage-2 context banks.
Signed-off-by: Olav Haugan
---
drivers/iommu/arm-smmu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
is not
supported by the hardware. Avoid writing to this register if not needed.
Signed-off-by: Olav Haugan
---
drivers/iommu/arm-smmu.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a83ca6a..19cca83
. When stream
id matching is not supported by the hardware the SMR registers does not
exists. However, even if they are UNK/SBZP we prefer not to write to more
registers than needed.
Olav Haugan (2):
iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1
iommu/arm-smmu: Correctly program
Hi Will,
On 8/1/2014 1:22 AM, Will Deacon wrote:
> Hi Olav,
>
> On Fri, Aug 01, 2014 at 01:54:44AM +0100, Olav Haugan wrote:
>> Mapping and unmapping are more often than not in the critical path.
>> map_sg and unmap_sg allows IOMMU driver implementations to optimize
>>
for an IOMMU driver
that does not have these implemented.
* Rebased on top of Joerg's tree.
* Split out patch from the rest of the patches.
Olav Haugan (1):
iommu-api: Add map_sg/unmap_sg functions
drivers/iommu/iommu.c | 44
in
physically contiguous chunk of memory that needs to be mapped to a
virtually contiguous region.
Signed-off-by: Olav Haugan
---
drivers/iommu/iommu.c | 44
include/linux/iommu.h | 28
2 files changed, 72 insertions(+)
diff --git
On 7/29/2014 2:25 AM, Will Deacon wrote:
> Hi Olav,
>
> On Tue, Jul 29, 2014 at 01:50:08AM +0100, Olav Haugan wrote:
>> On 7/28/2014 12:11 PM, Will Deacon wrote:
>>> On Mon, Jul 28, 2014 at 07:38:51PM +0100, Olav Haugan wrote:
>>>> +int iommu_map_sg(struct iomm
Hi Will,
On 7/28/2014 12:11 PM, Will Deacon wrote:
> Hi Olav,
>
> On Mon, Jul 28, 2014 at 07:38:51PM +0100, Olav Haugan wrote:
>> Mapping and unmapping are more often than not in the critical path.
>> map_sg and unmap_sg allows IOMMU driver implementations to optimize
>
it out patch from the rest of the patches.
Olav Haugan (1):
iommu-api: Add map_sg/unmap_sg functions
drivers/iommu/iommu.c | 48
include/linux/iommu.h | 25 +
2 files changed, 73 insertions(+)
--
The Qualcomm Innovation Cen
physically contiguous chunk of memory that needs to be mapped to a
virtually contiguous region.
Signed-off-by: Olav Haugan
---
drivers/iommu/iommu.c | 48
include/linux/iommu.h | 28
2 files changed, 76 insertions(+)
diff
On 7/22/2014 12:45 AM, Thierry Reding wrote:
> On Mon, Jul 21, 2014 at 05:59:22PM -0700, Olav Haugan wrote:
>> On 7/17/2014 1:21 AM, Thierry Reding wrote:
>>> On Wed, Jul 16, 2014 at 06:01:57PM -0700, Olav Haugan wrote:
> [...]
>>>> Additionally, the mapping ope
On 7/17/2014 1:21 AM, Thierry Reding wrote:
> On Wed, Jul 16, 2014 at 06:01:57PM -0700, Olav Haugan wrote:
>> Mapping and unmapping are more often than not in the critical path.
>> map_range and unmap_range allows SMMU driver implementations to optimize
>
> s/SMMU/IOMMU
over and over again for
each physically contiguous chunk of memory that needs to be mapped to a
virtually contiguous region.
Signed-off-by: Olav Haugan
---
drivers/iommu/iommu.c | 48
include/linux/iommu.h | 25 +
2 files
se iommu_{map,unmap}_range is called for an IOMMU driver
that does not have these implemented.
* Rebased on top of Joerg's tree.
* Split out patch from the rest of the patches.
Olav Haugan (1):
iommu-api: Add map_range/unmap_range functions
drivers/
On 7/13/2014 4:43 AM, Rob Clark wrote:
> On Sun, Jul 13, 2014 at 5:43 AM, Will Deacon wrote:
>> On Sat, Jul 12, 2014 at 01:57:31PM +0100, Rob Clark wrote:
>>> On Sat, Jul 12, 2014 at 8:22 AM, Arnd Bergmann wrote:
On Saturday 12 July 2014, Rob Clark wrote:
>>> Was there actually a good re
On 7/11/2014 3:20 AM, Joerg Roedel wrote:
> On Mon, Jun 30, 2014 at 09:51:51AM -0700, Olav Haugan wrote:
>> +int iommu_map_range(struct iommu_domain *domain, unsigned int iova,
>> +struct scatterlist *sg, unsigned int len, int prot)
>> +{
>> +if (unli
On 7/9/2014 5:40 PM, Rob Clark wrote:
> On Wed, Jul 9, 2014 at 8:03 PM, Olav Haugan wrote:
>> On 7/8/2014 4:49 PM, Rob Clark wrote:
>>> On Tue, Jul 8, 2014 at 5:53 PM, Olav Haugan wrote:
>>>> Hi Hiroshi,
>>>>
>>>> On 7/3/2014 9:29 PM, Hiro
On 7/9/2014 3:54 AM, Will Deacon wrote:
> On Wed, Jul 09, 2014 at 02:07:38AM +0100, Olav Haugan wrote:
>> On 6/30/2014 2:52 AM, Will Deacon wrote:
>>> On Fri, Jun 27, 2014 at 11:23:27PM +0100, Olav Haugan wrote:
>>>> Lets say I have an IOMMU with 2 masters and 2 SMRn
On 7/8/2014 4:49 PM, Rob Clark wrote:
> On Tue, Jul 8, 2014 at 5:53 PM, Olav Haugan wrote:
>> Hi Hiroshi,
>>
>> On 7/3/2014 9:29 PM, Hiroshi Doyu wrote:
>>> Hi Olav,
>>>
>>> Olav Haugan writes:
>>>
>>>> Mapping and unmap
On 6/30/2014 2:52 AM, Will Deacon wrote:
> Hi Olav,
>
> On Fri, Jun 27, 2014 at 11:23:27PM +0100, Olav Haugan wrote:
>> On 6/25/2014 2:18 AM, Will Deacon wrote:
>>> Why can't it be dynamically detected? Whilst the StreamIDs are fixed in
>>> hardware (from t
On 7/3/2014 10:43 AM, Will Deacon wrote:
> On Wed, Jul 02, 2014 at 11:11:13PM +0100, Olav Haugan wrote:
>> On 7/1/2014 1:49 AM, Varun Sethi wrote:
>>>
>>>
>>>> -Original Message-
>>>> From: iommu-boun...@lists.linux-foundation.org [mailto
Hi Hiroshi,
On 7/3/2014 9:29 PM, Hiroshi Doyu wrote:
> Hi Olav,
>
> Olav Haugan writes:
>
>> Mapping and unmapping are more often than not in the critical path.
>> map_range and unmap_range allows SMMU driver implementations to optimize
>> the process of mapping
On 6/30/2014 10:02 AM, Will Deacon wrote:
> Hi Olav,
>
> On Mon, Jun 30, 2014 at 05:51:53PM +0100, Olav Haugan wrote:
>> MSM IOMMUv1 driver supports Qualcomm SoC MSM8974 and
>> MSM8084.
>>
>> The IOMMU driver supports the following features:
>>
>>
On 7/1/2014 1:49 AM, Varun Sethi wrote:
>
>
>> -Original Message-
>> From: iommu-boun...@lists.linux-foundation.org [mailto:iommu-
>> boun...@lists.linux-foundation.org] On Behalf Of Olav Haugan
>> Sent: Monday, June 30, 2014 10:22 PM
>> To: linux-a
domains/iommu's.
Signed-off-by: Olav Haugan
---
drivers/iommu/msm_iommu-v1.c | 16
include/linux/iommu.h| 1 +
2 files changed, 17 insertions(+)
diff --git a/drivers/iommu/msm_iommu-v1.c b/drivers/iommu/msm_iommu-v1.c
index 2c574ef..e163ffc 100644
--- a/drivers/
over and over again for
each physically contiguous chunk of memory that needs to be mapped to a
virtually contiguous region.
Signed-off-by: Olav Haugan
---
drivers/iommu/iommu.c | 24
include/linux/iommu.h | 24
2 files changed, 48 insertions
Add support for VMSA long descriptor page table format (V7L) supporting the
following features:
- ARM V7L page table format independent of ARM CPU page table format
- 4K/64K/2M/32M/1G mappings (V7L)
Signed-off-by: Olav Haugan
---
.../devicetree/bindings/iommu/msm,iommu_v1.txt | 4
(1):
iopoll: Introduce memory-mapped IO polling macros
Olav Haugan (6):
iommu: msm: Rename iommu driver files
iommu-api: Add map_range/unmap_range functions
iommu: msm: Add MSM IOMMUv1 driver
iommu: msm: Add support for V7L page table format
defconfig: msm: Enable Qualcomm SMMUv1 driver
Enable the Qualcomm SMMUv1 driver allowing bus masters to operate
on physically discontigous memory.
Signed-off-by: Olav Haugan
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 0414889
From: Matt Wagantall
It is sometimes necessary to poll a memory-mapped register until its
value satisfies some condition. Introduce a family of convenience macros
that do this. Tight-loop and sleeping versions are provided with and
without timeouts.
Signed-off-by: Matt Wagantall
---
include/li
Rename the MSM IOMMU driver for MSM8960 SoC to "-v0" version to align
with hardware version number for next generation MSM IOMMU (v1).
Signed-off-by: Olav Haugan
---
arch/arm/configs/qcom_defconfig | 2 +-
drivers/iommu/Kconfig
On 6/25/2014 2:18 AM, Will Deacon wrote:
> On Tue, Jun 24, 2014 at 10:35:54PM +0100, Olav Haugan wrote:
>> On 6/24/2014 11:11 AM, Will Deacon wrote:
>>> On Tue, Jun 24, 2014 at 06:57:44PM +0100, Olav Haugan wrote:
>>>> On 6/24/2014 2:18 AM, Will Deacon wrote:
>&
On 6/24/2014 11:11 AM, Will Deacon wrote:
> On Tue, Jun 24, 2014 at 06:57:44PM +0100, Olav Haugan wrote:
>> On 6/24/2014 2:18 AM, Will Deacon wrote:
>>> On Sat, Jun 21, 2014 at 12:16:25AM +0100, Olav Haugan wrote:
>>>> We have multiple-master SMMUs and each mas
On 6/24/2014 2:18 AM, Will Deacon wrote:
> On Sat, Jun 21, 2014 at 12:16:25AM +0100, Olav Haugan wrote:
>> On 5/30/2014 12:06 PM, Arnd Bergmann wrote:
>>> On Friday 30 May 2014 08:16:05 Rob Herring wrote:
>>>> Presumably the ID would be the streamID on ARM's S
?
We have multiple-master SMMUs and each master emits a variable number of
StreamIDs. However, we have to apply a mask (the ARM SMMU spec allows
for this) to the StreamIDs due to limited number of StreamID 2 Context
Bank entries in the SMMU. If my understanding is correct we would
represent this in
Hi Will,
On 4/24/2013 2:55 AM, Will Deacon wrote:
> On Tue, Apr 23, 2013 at 11:54:53PM +0100, Olav Haugan wrote:
>> On 4/18/2013 12:01 PM, Will Deacon wrote:
> Getting phandles has no dependencies on anything -- the only dependency is
> that the device is added to the bus on whic
Hi Will,
On 4/18/2013 12:01 PM, Will Deacon wrote:
> On Tue, Apr 16, 2013 at 07:18:42PM +0100, Olav Haugan wrote:
>> On 4/15/2013 6:13 AM, Will Deacon wrote:
>>> If so, doesn't that strongly tie your video driver to the SMMU?
>>
>> Isn't this more or
On 4/15/2013 6:13 AM, Will Deacon wrote:
> On Sat, Apr 13, 2013 at 10:02:09PM +0100, Olav Haugan wrote:
>> On 4/10/2013 10:37 AM, Will Deacon wrote:
>>> Ok, but then how does that interact with the IOMMU API in Linux? e.g.
>>> if a client asks for an iova <->
Hi again Will,
On 4/10/2013 10:37 AM, Will Deacon wrote:
> On Mon, Apr 08, 2013 at 06:03:54PM +0100, Olav Haugan wrote:
>
>>> Generally, the StreamIDs are fixed in hardware (as a function of
>>> various AXI bits -- see the SMMU integration guide) and cannot be
>>
Hi Will,
On 4/8/2013 2:25 AM, Will Deacon wrote:
> Hi Olav,
>
> On Fri, Apr 05, 2013 at 09:44:49PM +0100, Olav Haugan wrote:
>> On 4/4/2013 9:50 AM, Will Deacon wrote:
>>> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
>>> b/Documentat
@fda6c000 {
reg = <0xfda6c000 0x1000>;
interrupts = <0 70 0>;
qcom,iommu-ctx-sids = <0 2>;
label = "ctx_0";
};
qcom,iommu-ctx@fda6d000 {
reg = <0xfda6d000 0x1000>;
interrupts = <0 70 0>;
qcom,iommu-ctx-sids = <1>;
label = "ctx_1";
};
};
Please let me know your thoughts on this.
Thanks,
Olav Haugan
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
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