This reverts commit d346180e70b9 ("iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
e to the DMA-mapping
subsystem that the buffer is fully accessible at the elevated privilege
level (and ideally inaccessible or at least read-only at the
lesser-privileged levels).
Cc: linux-...@vger.kernel.org
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
--
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
DMA_ATTR_PRIVILEGED attribute, which will ensure that the microcode
IOMMU mapping is only accessible to the privileged level.
Cc: Dan Williams
Cc: Vinod Koul
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
---
Notes:
v3..v4
- Reworked against the new dma
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Jeremy Gebben
---
Notes:
v2..v3
- Use existing bit definitions.
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4
use that in the pl330 driver (suggested by Will).
Jeremy Gebben (1):
iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag
Mitchel Humpherys (5):
iommu: add IOMMU_PRIV attribute
common: DMA-mapping: add DMA_ATTR_PRIVILEGED attribute
arm64/dma-mapping: Implement DMA_ATTR_PRIVILEGED
dma
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Added comment
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
On Tue, Jul 26 2016 at 04:05:17 PM, Robin Murphy wrote:
> + if (attrs & DMA_ATTR_PRIVILEGED)
> + prot |= IOMMU_PRIV;
> +
>
> then drop the rest of the changes to the switch statement below. It's
> taken me an embarrassingly long time to work out why things were blowing
> up in __io
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Signed-off-by: Mitchel Humpherys
---
Notes:
v3..v4
- Reworked against the
s
work, and use that in the pl330 driver (suggested by Will).
Jeremy Gebben (1):
iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag
Mitchel Humpherys (5):
iommu: add IOMMU_PRIV attribute
common: DMA-mapping: add DMA_ATTR_PRIVILEGED attribute
arm64/dma-mapping: Implement DMA_A
DMA_ATTR_PRIVILEGED attribute, which will ensure that the microcode
IOMMU mapping is only accessible to the privileged level.
Cc: Dan Williams
Cc: Jassi Brar
Signed-off-by: Mitchel Humpherys
---
Notes:
v3..v4
- Reworked against the new dma attrs format.
drivers/dma/pl330.c | 6 --
1
This reverts commit d346180e70b9 ("iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Moved to the end of the series.
drivers/iommu/
e to the DMA-mapping
subsystem that the buffer is fully accessible at the elevated privilege
level (and ideally inaccessible or at least read-only at the
lesser-privileged levels).
Cc: linux-...@vger.kernel.org
Signed-off-by: Mitchel Humpherys
---
Notes:
v3..v4
- Reworked against the
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Signed-off-by: Jeremy Gebben
---
Notes:
v2..v3
- Use existing bit definitions.
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/i
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Added comment
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index
On Mon, Jul 25 2016 at 10:50:13 AM, Will Deacon wrote:
> On Fri, Jul 22, 2016 at 01:39:45PM -0700, Mitchel Humpherys wrote:
>> On Fri, Jul 22 2016 at 05:51:07 PM, Will Deacon wrote:
>> > On Tue, Jul 19, 2016 at 01:36:49PM -0700, Mitchel Humpherys wrote:
>> >> The f
On Fri, Jul 22 2016 at 05:51:07 PM, Will Deacon wrote:
> On Tue, Jul 19, 2016 at 01:36:49PM -0700, Mitchel Humpherys wrote:
>> The following patch to the ARM SMMU driver:
>>
>> commit d346180e70b91b3d5a1ae7e5603e65593d4622bc
>> Author: Robin Murphy
>>
DMA_ATTR_PRIVILEGED attribute, which will ensure that the microcode
IOMMU mapping is only accessible to the privileged level.
Cc: Dan Williams
Cc: Jassi Brar
Signed-off-by: Mitchel Humpherys
---
drivers/dma/pl330.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/pl330
* Don't worry about executability in new DMA attr.
v1..v2
- Added a new DMA attribute to make executable privileged mappings
work, and use that in the pl330 driver (suggested by Will).
Jeremy Gebben (1):
iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag
Mitchel Humpherys
e to the DMA-mapping
subsystem that the buffer is fully accessible at the elevated privilege
level (and ideally inaccessible or at least read-only at the
lesser-privileged levels).
Cc: linux-...@vger.kernel.org
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Not worrying
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Signed-off-by: Jeremy Gebben
---
Notes:
v2..v3
- Use existing bit definitions.
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/i
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Added comment
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Renamed and
This reverts commit d346180e70b9 ("iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Signed-off-by: Mitchel Humpherys
---
Notes:
v2..v3
- Moved to the end of the series.
drivers/iommu/
DMA_ATTR_PRIVILEGED_EXECUTABLE attribute, which will ensure that the
microcode IOMMU mapping is not writeable.
Cc: Dan Williams
Cc: Jassi Brar
Signed-off-by: Mitchel Humpherys
---
drivers/dma/pl330.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers
is necessary to
ensure that the buffer is executable at an elevated privilege level (by
making it read-only at the lesser-privileged levels, for example).
Cc: linux-...@vger.kernel.org
Signed-off-by: Mitchel Humpherys
---
Documentation/DMA-attributes.txt | 9 +
include/linux/dma-attrs.h
This reverts commit d346180e70b9 ("iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 5 +
1 file changed, 1 insertion(+), 4 deletion
The newly added DMA_ATTR_PRIVILEGED_EXECUTABLE is useful for creating
mappings that are executable by privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Signed-off-by: Mitchel Humpherys
---
arch/arm64/mm/dma-mapping.c | 6 +++---
drivers
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Signed-off-by: Mitchel Humpherys
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 664683aedcce..01c9f2667f2b 100644
--- a/include/linux
y
Changelog:
v1..v2
- Added a new DMA attribute to make executable privileged mappings
work, and use that in the pl330 driver (suggested by Will).
Jeremy Gebben (1):
iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag
Mitchel Humpherys (5):
iommu: add IOMMU_PRIV attribute
On Thu, Jul 07 2016 at 02:58:21 PM, Jordan Crouse
wrote:
>> Whilst this series is a step in the right direction for fixing that, I
>> don't think you can claim that only low-level users need this, given that
>> we have in-tree code which would break without it. Perhaps you just need
>> to extend
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-
This reverts commit (d346180e70b91b3d: "iommu/arm-smmu: Treat all device
transactions as unprivileged") since some platforms actually make use of
privileged transactions.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 5 +
1 file changed, 1 insertion(+), 4
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Signed-off-by: Mitchel Humpherys
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 664683aedcce..01c9f2667f2b 100644
--- a/include/linux
rm: add support for the IOMMU_PRIV flag
Mitchel Humpherys (2):
iommu: add IOMMU_PRIV attribute
Revert "iommu/arm-smmu: Treat all device transactions as unprivileged"
drivers/iommu/arm-smmu.c | 5 +
drivers/iommu/io-pgtable-arm.c | 16 +++-
include/linux
On Wed, May 25 2016 at 08:45:58 PM, Alex Williamson
wrote:
>> Why do we do that? If the devices have different BDFs can't we safely
>> say that they're protected from peer-to-peer DMA (assuming no DMA
>> aliasing quirks)? Even as I write that out it seems wrong though since
>> the RC can probab
On Thu, May 26 2016 at 11:58:53 AM, Robin Murphy wrote:
> Hey Mitch,
>
> On 26/05/16 01:26, Mitchel Humpherys wrote:
>> Hey there,
>>
>> We're experiencing an issue with IOMMU groups and PCI-e devices. The
>> system in question has a WLAN DMA master behin
Hey there,
We're experiencing an issue with IOMMU groups and PCI-e devices. The
system in question has a WLAN DMA master behind a PCI-e root complex
which is, in turn, behind an IOMMU. There are no there devices behind
the RC. This is on an ARM platform using the arm-smmu and pci-msm
drivers (p
On Thu, Apr 07 2016 at 12:29:59 PM, Mitchel Humpherys
wrote:
>> I'll clean up what I have and try to get it posted this afternoon so
>> we can compare.
>
> Cool, I have some comments that I'll leave over there.
Never mind, my comments weren't relevant. I&#x
On Wed, Apr 06 2016 at 11:47:19 AM, Robin Murphy wrote:
> How would you handle said restriction of page sizes under this scheme?
I have a custom io-pgtable implementation that gets wired up based on an
IOMMU domain attribute, which is set by yet another custom DMA mapper.
My main goal is to give
to the iommu_ops which can optionally be
used by the driver to return a domain-specific pgsize_bitmap.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/iommu.c | 28 +++-
include/linux/iommu.h | 3 +++
2 files changed, 22 insertions(+), 9 deletions(-)
diff --git a
.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 2409e3bd3df2..a1b0f542d5ca 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu
On Mon, Oct 05 2015 at 03:24:03 PM, Will Deacon wrote:
> Hi Mitch,
>
> On Sat, Sep 26, 2015 at 01:12:05AM +0100, Mitchel Humpherys wrote:
>> Currently we return IRQ_NONE from the context fault handler if the FSR
>> doesn't actually have the fault bit set (some sort of
framework that the interrupt wasn't for this device if the
client doesn't register a handler isn't exactly accurate. Fix this by
returning IRQ_HANDLED even if the client doesn't register a handler.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 2 +-
1 f
On Mon, Mar 09 2015 at 05:16:26 AM, Yong Wu wrote:
> Dear Mitchel,
> Thanks very much for your review.
>
> On Fri, 2015-03-06 at 09:15 -0800, Mitchel Humpherys wrote:
>> On Fri, Mar 06 2015 at 02:48:17 AM, wrote:
>> > From: Yong Wu
>> >
>>
On Fri, Mar 06 2015 at 02:48:17 AM, wrote:
> From: Yong Wu
>
> This patch adds support for mediatek m4u (MultiMedia Memory Management Unit).
> Currently this only supports m4u gen 2 with 2 levels of page table on mt8173.
[...]
> +static int mtk_iommu_invalidate_tlb(const struct mtk_iommu_info *
buffers and flushing those instead, if said page tables
> happen to lie outside the default 32-bit mask.
>
> Signed-off-by: Robin Murphy
Tested-by: Mitchel Humpherys
Thanks Robin!
-Mitch
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the
On Thu, Mar 05 2015 at 02:38:45 AM, Robin Murphy wrote:
> Hi Mitch,
>
> On 05/03/15 00:18, Mitchel Humpherys wrote:
>> We're currently mapping a page in arm_smmu_flush_pgtable without ever
>> unmapping it. Fix this by calling dma_unmap_page on the returned dma
>>
mmediately following the map.
Without this, eventually swiotlb runs out of memory and starts printing
things like:
[ 35.545076] arm-smmu d0.arm,smmu: swiotlb buffer is full (sz: 128
bytes)
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 9 +++--
1 file changed, 7
On Wed, Feb 04 2015 at 03:33:05 AM, Will Deacon wrote:
> On Mon, Feb 02, 2015 at 08:10:02PM +0000, Mitchel Humpherys wrote:
>> On Wed, Jan 28 2015 at 04:07:39 AM, Will Deacon wrote:
>> > With a shared handler (e.g. a bunch of context banks have the same IRQ)
>> > then
On Wed, Jan 28 2015 at 04:07:39 AM, Will Deacon wrote:
> On Fri, Jan 23, 2015 at 10:33:20PM +0000, Mitchel Humpherys wrote:
>> On Fri, Jan 23 2015 at 03:24:15 AM, Will Deacon wrote:
>> > On Thu, Jan 22, 2015 at 11:48:02PM +, Mitchel Humpherys wrote:
>> >> Cont
On Fri, Jan 23 2015 at 03:24:15 AM, Will Deacon wrote:
> Hi Mitch,
>
> On Thu, Jan 22, 2015 at 11:48:02PM +, Mitchel Humpherys wrote:
>> Context interrupts can call domain-specific handlers which might sleep.
>> Currently we register our handler with request_irq, so our
way for doing things like enabling clocks within
our interrupt handler.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 6cd47b75286f..81f6b54d94b1 100644
On Tue, Jan 20 2015 at 06:16:43 AM, Will Deacon wrote:
> Hey Mitch,
>
> On Wed, Oct 29, 2014 at 09:13:40PM +, Mitchel Humpherys wrote:
>> Currently, we provide the iommu_ops.iova_to_phys service by doing a
>> table walk in software to translate IO virtual addresses to
On Tue, Dec 16 2014 at 01:45:27 AM, Will Deacon wrote:
> On Mon, Dec 15, 2014 at 11:47:23PM +0000, Mitchel Humpherys wrote:
>> From: Matt Wagantall
>>
>> It is sometimes necessary to poll a memory-mapped register until its value
>> satisfies some condition. Introd
On Wed, Jan 07 2015 at 10:04:20 AM, Will Deacon wrote:
> On Wed, Jan 07, 2015 at 05:52:46PM +0000, Mitchel Humpherys wrote:
>> On Wed, Jan 07 2015 at 02:13:00 AM, Will Deacon wrote:
>> > On Tue, Jan 06, 2015 at 11:30:49PM +, Mitchel Humpherys wrote:
>> >> On T
On Wed, Jan 07 2015 at 02:13:00 AM, Will Deacon wrote:
> On Tue, Jan 06, 2015 at 11:30:49PM +0000, Mitchel Humpherys wrote:
>> On Tue, Jan 06 2015 at 02:35:28 PM, Rob Herring
>> wrote:
>> > On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
>> > wrote:
>>
On Tue, Jan 06 2015 at 02:35:28 PM, Rob Herring wrote:
> On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
> wrote:
>> On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon wrote:
>>>> /* Invalidate the TLB, just in case */
>>>> -writel_relaxed
On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon wrote:
>> /* Invalidate the TLB, just in case */
>> -writel_relaxed(0, gr0_base + ARM_SMMU_GR0_STLBIALL);
>> writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);
>> writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH);
>
> I was
Currently we do a STLBIALL when we initialize the SMMU. However, in
some configurations that register is not supposed to be touched and is
marked as "Secure only" in the spec. Rip it out.
Signed-off-by: Mitchel Humpherys
---
drivers/iommu/arm-smmu.c | 2 --
1 file changed, 2
Deacon
Cc: Arnd Bergmann
Cc: Andrew Morton
Cc: Robert Elliott
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
v9..10:
- Actually added the comments mentioned in v8..v9 (doh!)
v8..v9:
- Added note in comments about max sleep time (Rob Elliott)
v7..v8:
- sorted helper
On Mon, Dec 15 2014 at 03:31:20 PM, Mitchel Humpherys
wrote:
> From: Matt Wagantall
>
> It is sometimes necessary to poll a memory-mapped register until its value
> satisfies some condition. Introduce a family of convenience macros that do
> this. Tight-looping, sleeping, and tim
Deacon
Cc: Arnd Bergmann
Cc: Andrew Morton
Cc: Robert Elliott
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
v8..v9:
- Added note in comments about max sleep time (Rob Elliott)
v7..v8:
- sorted helper macros by size (b, w, l, q)
- removed some of the more esoteric (or
On Thu, Nov 27 2014 at 03:51:16 AM, Will Deacon wrote:
> A number of IOMMUs found in ARM SoCs can walk architecture-compatible
> page tables.
>
> This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8
> long-descriptor page tables. 4k, 16k and 64k pages are supported, with
> up to 4-lev
On Mon, Nov 24 2014 at 04:53:19 PM, "Elliott, Robert (Server Storage)"
wrote:
>> -Original Message-
>> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
>> ow...@vger.kernel.org] On Behalf Of Mitchel Humpherys
>> Sent: Monday, 24 November
Deacon
Cc: Arnd Bergmann
Cc: Andrew Morton
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
This patch was originally part of a series [1] for adding support for IOMMU
address translations through an ARM SMMU hardware register. The other
patch in the series (the one that actually
On Fri, Nov 21 2014 at 03:48:33 AM, Stefano Stabellini
wrote:
> On Mon, 17 Nov 2014, Stefano Stabellini wrote:
>> Hi all,
>> I am writing this email to ask for your advice.
>>
>> On architectures where dma addresses are different from physical
>> addresses, it can be difficult to retrieve the ph
Deacon
Cc: Arnd Bergmann
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
Sorry for any confusion regarding the genesis of this patch. Let me try to
clarify the history here. This patch was originally part of a series [1]
for adding support for IOMMU address translations through
On Thu, Nov 13 2014 at 01:48:26 AM, Will Deacon wrote:
> Ha, damn, then I don't have a user of the shiny new quirks field I added!
> I don't think I'll go as far as removing it altogether though...
I'm sure we'll be making liberal use of that field soon enough ;)
-Mitch
--
Qualcomm Innovatio
On Wed, Nov 12 2014 at 10:26:43 AM, Will Deacon wrote:
> Hi Mitch,
>
> On Wed, Aug 13, 2014 at 01:51:38AM +0100, Mitchel Humpherys wrote:
>> Add a workaround for some buggy hardware that requires a TLB invalidate
>> operation to occur at map time. Activate the feature
On Thu, Oct 30 2014 at 05:00:23 AM, Arnd Bergmann wrote:
> On Thursday 30 October 2014 11:41:00 Will Deacon wrote:
>> > +
>> > +#define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \
>> > + readx_poll_timeout(readl, addr, val, cond, delay_us, timeout_us)
>> > +
>> > +#define readl_po
ame's
v1..v2:
- Renamed one of the iopoll macros to use the more standard `_atomic'
suffix
- Removed some convenience iopoll wrappers to encourage explicitness
Matt Wagantall (1):
iopoll: Introduce memory-mapped IO polling macros
Mitchel Humpherys (1):
iommu/arm-smmu:
Deacon
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
Changes since v6:
- No changes. Resending due to changes in the the next patch in the series.
---
include/linux/iopoll.h | 213 +
1 file changed, 213 insertions(+)
create mode
useful for testing and hardware validation.
Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.
Signed-off-by: Mitchel Humpherys
---
Changes
On Tue, Oct 14 2014 at 02:53:29 PM, Mitchel Humpherys
wrote:
> From: Matt Wagantall
>
> It is sometimes necessary to poll a memory-mapped register until its value
> satisfies some condition. Introduce a family of convenience macros that do
> this. Tight-looping, sleeping, and tim
Deacon
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
Changes since v5:
- Use a shift instead of a divide in the poll loop.
---
include/linux/iopoll.h | 213 +
1 file changed, 213 insertions(+)
create mode 100644 include/linux
oll wrappers to encourage explicitness
Matt Wagantall (1):
iopoll: Introduce memory-mapped IO polling macros
Mitchel Humpherys (1):
iommu/arm-smmu: add support for iova_to_phys through ATS1PR
drivers/iommu/arm-smmu.c | 79 +-
include/linux/i
useful for testing and hardware validation.
Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.
Signed-off-by: Mitchel Humpherys
---
Changes
On Fri, Oct 10 2014 at 12:50:23 PM, Arnd Bergmann wrote:
> On Friday 10 October 2014 12:44:45 Mitchel Humpherys wrote:
>> >> Regarding the division, for the overwhelmingly common case where the
>> >> user of the API passes in a constant for sleep_us the compil
On Wed, Oct 08 2014 at 06:40:46 AM, Arnd Bergmann wrote:
> On Tuesday 07 October 2014 18:47:59 Mitchel Humpherys wrote:
>> On Wed, Oct 01 2014 at 01:25:33 AM, Arnd Bergmann wrote:
>> > On Tuesday 30 September 2014 18:28:12 Mitchel Humpherys wrote:
>> >> + */
>
useful for testing and hardware validation.
Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.
Signed-off-by: Mitchel Humpherys
---
Changes
Deacon
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
Changes since v4:
- Added support for other accessor functions
- Unified atomic and non-atomic interfaces
- Fixed erroneous `might_sleep' (we were might_sleep()'ing on the wrong
variable)
---
include/linu
ilure
v2..v3:
- Removed unnecessary `dev_name's
v1..v2:
- Renamed one of the iopoll macros to use the more standard `_atomic'
suffix
- Removed some convenience iopoll wrappers to encourage explicitness
Matt Wagantall (1):
iopoll: Introduce memory-mapped IO polling macros
Mi
On Tue, Oct 07 2014 at 06:47:59 PM, Mitchel Humpherys
wrote:
>>> +#define readl_poll_timeout_atomic(addr, val, cond, max_reads,
>>> time_between_us) \
>>> +({ \
>>> + int count; \
>>> + for (count = (max_reads); count > 0; cou
On Wed, Oct 01 2014 at 01:25:33 AM, Arnd Bergmann wrote:
> On Tuesday 30 September 2014 18:28:12 Mitchel Humpherys wrote:
>> + */
>> +#define readl_poll_timeout(addr, val, cond, sleep_us, timeout_us) \
>> +({ \
>> + ktime_t timeout = ktime_add
On Mon, Oct 06 2014 at 03:28:16 AM, Varun Sethi
wrote:
> This flag is used for specifying access to device memory. SMMU would apply
> device memory attributes for a DMA transaction. This is required for setting
> access to GIC registers, for generating message interrupts. This would ensure
> tha
On Wed, Oct 01 2014 at 01:27:27 AM, Arnd Bergmann wrote:
> On Tuesday 30 September 2014 18:28:13 Mitchel Humpherys wrote:
>> + if (readl_poll_timeout_atomic(cb_base + ARM_SMMU_CB_ATSR, tmp,
>> + !(tmp & ATSR_ACTIVE), 50, 100)) {
>>
Deacon
Signed-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
Changes since v3:
- Updated commit message to better reflect the patch content
---
include/linux/iopoll.h | 77 ++
1 file changed, 77 insertions(+)
create mode 100644 include
On Tue, Sep 30 2014 at 03:23:34 AM, Will Deacon wrote:
> Hi Mitch,
>
> On Sun, Sep 28, 2014 at 04:27:29AM +0100, Mitchel Humpherys wrote:
>> Currently, we provide the iommu_ops.iova_to_phys service by doing a
>> table walk in software to translate IO virtual addresses to phys
useful for testing and hardware validation.
Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.
Signed-off-by: Mitchel Humpherys
---
Changes
gantall (1):
iopoll: Introduce memory-mapped IO polling macros
Mitchel Humpherys (1):
iommu/arm-smmu: add support for iova_to_phys through ATS1PR
drivers/iommu/arm-smmu.c | 79 +++-
include/linux/iopoll.h | 77 +++
On Mon, Sep 29 2014 at 01:31:37 AM, Thierry Reding
wrote:
> On Sat, Sep 27, 2014 at 08:27:28PM -0700, Mitchel Humpherys wrote:
>> From: Matt Wagantall
>>
>> It is sometimes necessary to poll a memory-mapped register until its
>> value satisfies some condition. Introd
useful for testing and hardware validation.
Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.
Signed-off-by: Mitchel Humpherys
---
drivers
uffix
- Removed some convenience iopoll wrappers to encourage explicitness
v2..v3:
- Remomved unnecessary `dev_name's
Matt Wagantall (1):
iopoll: Introduce memory-mapped IO polling macros
Mitchel Humpherys (1):
iommu/arm-smmu: add support for iova_to_phys through ATS1PR
drivers
-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
include/linux/iopoll.h | 77 ++
1 file changed, 77 insertions(+)
create mode 100644 include/linux/iopoll.h
diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h
new file mode 100644
On Sat, Sep 27 2014 at 02:31:51 PM, Mitchel Humpherys
wrote:
> This series introduces support for performing iova-to-phys translations via
> the ARM SMMU hardware on supported implementations. We also make use of
> some new generic macros for polling hardware registers.
>
> C
'
suffix
- Removed some convenience iopoll wrappers to encourage explicitness
Matt Wagantall (1):
iopoll: Introduce memory-mapped IO polling macros
Mitchel Humpherys (1):
iommu/arm-smmu: add support for iova_to_phys through ATS1PR
drivers/iommu/arm-smmu.c
-off-by: Matt Wagantall
Signed-off-by: Mitchel Humpherys
---
include/linux/iopoll.h | 77 ++
1 file changed, 77 insertions(+)
create mode 100644 include/linux/iopoll.h
diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h
new file mode 100644
useful for testing and hardware validation.
Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.
Signed-off-by: Mitchel Humpherys
---
drivers
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