[PATCH 21/21] memory: mtk-smi: Add mt8192 support

Add mt8192 smi support. Signed-off-by: Yong Wu --- drivers/memory/mtk-smi.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index f2f6100c74ef..5d0268630e70 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk

[PATCH 17/21] iommu/mediatek: Support report iova 34bit translation fault in ISR

If the iova is over 32bit, the fault status register bit is a little different. Add a flag for the special register bits. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drive

[PATCH 20/21] iommu/mediatek: Add mt8192 support

Add mt8192 iommu support. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 20 drivers/iommu/mtk_iommu.h | 1 + 2 files changed, 21 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index a4ac41e60c4f..da7d055af919 100644 --- a/drivers/

[PATCH 19/21] iommu/mediatek: Adjust the structure

Add "struct mtk_iommu_data *" in the "struct mtk_iommu_domain", reduce the call mtk_iommu_get_m4u_data(). No functional change. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b

[PATCH 18/21] iommu/mediatek: Add support for multi domain

Some HW IP(ex: CCU) require the special iova range. That means the iova got from dma_alloc_attrs for that devices must locate in his special range. In this patch, we allocate a special iova_range for each a special requirement and create each a iommu domain for each a iova_range. meanwhile we stil

[PATCH 16/21] iommu/mediatek: Support up to 34bit iova in tlb invalid

If the iova is 34bit, the iova[32][33] is the bit0/1 in the tlb flush register. Add a new macro for this. there is a minor change unrelated with this patch. it also use the new macro. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 10 ++ 1 file changed, 6 insertions(+), 4 deleti

[PATCH 11/21] iommu/mediatek: Add power-domain operation

In the previous SoC, the M4U HW is in the EMI power domain which is always on. the latest M4U is in the display power domain which may be turned on/off, thus we have to add pm_runtime interface for it. we should enable its power before M4U hw initial. and disable it after HW initialize. When the

[PATCH 15/21] iommu/mediatek: Support master use iova over 32bit

After extending v7s, our pagetable already support iova reach 16GB(34bit). the master got the iova via dma_alloc_attrs may reach 34bits, but its HW register still is 32bit. then how to set the bit32/bit33 iova? this depend on a SMI larb setting(bank_sel). we separate whole 16GB iova to four banks:

[PATCH 14/21] iommu/mediatek: Add single domain

Defaultly the iova range is 0-4G. here we add a single-domain(0-4G) for the previous SoC. this also is a preparing patch for supporting multi-domains. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c

[PATCH 13/21] iommu/mediatek: Make MTK_IOMMU depend on ARM64

Originally MTK_IOMMU could depend on ARM || ARM64. Both build ok. actually the source code don't support ARM. this patch changes it only depend on ARM64. This is a preparing patch for support multi-domain. otherwise it will build warning in ARM case. This is the build warning log: drivers/iommu/

[PATCH 12/21] iommu/mediatek: Add iova reserved function

For multiple iommu_domains, we need to reserve some iova regions, so we will add mtk_iommu_iova_region structure. It includes the base address and size of the range. This is a preparing patch for supporting multi-domain. Signed-off-by: Anan sun Signed-off-by: Hao Chao Signed-off-by: Yong Wu ---

[PATCH 10/21] iommu/mediatek: Add device link for smi-common and m4u

In the lastest SoC, M4U has its special power domain. thus, If the engine begin to work, it should help enable the power for M4U firstly. Currently if the engine work, it always enable the power/clocks for smi-larbs/smi-common. This patch adds device_link for smi-common and M4U. then, if smi-common

[PATCH 05/21] iommu/mediatek: Use the common mtk-smi-larb-port.h

Use the common larb-port header in the source code. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 7 --- drivers/iommu/mtk_iommu.h | 1 + drivers/memory/mtk-smi.c | 1 + include/soc/mediatek/smi.h | 2 -- 4 files changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/iom

[PATCH 08/21] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros

Add "cfg" as a parameter for some macros. This is a preparing patch for mediatek extend the lvl1 pgtable. No functional change. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 34 +++--- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drive

[PATCH 09/21] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek

The standard input iova bits is 32. MediaTek quad the lvl1 pagetable(4*lvl1). No change for lvl2 pagetable. Then the iova bits can reach 34bit. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 10 +++--- drivers/iommu/mtk_iommu.c | 2 +- 2 files changed, 8 insertions

[PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI

This patch adds decriptions for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U |

[PATCH 06/21] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap

As title. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index 4272fe4e17f4..01f2a8876808 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c ++

[PATCH 07/21] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek

MediaTek extend the bit5 in lvl1 and lvl2 descriptor as PA34. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 9 +++-- drivers/iommu/mtk_iommu.c | 2 +- include/linux/io-pgtable.h | 4 ++-- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drive

[PATCH 03/21] dt-binding: memory: mediatek: Add domain definition

In the latest SoC, there are several HW IP require a sepecial iova range, mainly CCU and VPU has this requirement. Take CCU as a example, CCU require its iova locate in the range(0x4000_ ~ 0x43ff_). In this patch we add a domain definition for the special port. This is a preparing patch fo

[PATCH 02/21] dt-binding: memory: mediatek: Extend LARB_NR_MAX to 32

Extend the max larb number definition as mt8192 has larb_nr over 16. Signed-off-by: Yong Wu --- include/dt-bindings/memory/mtk-smi-larb-port.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/memory/mtk-smi-larb-port.h b/include/dt-bindings/memory/mtk-

[PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file

Put all the macros about smi larb/port togethers, this is a preparing patch for extending LARB_NR and adding new dom-id support. Signed-off-by: Yong Wu --- include/dt-bindings/memory/mt2712-larb-port.h | 2 +- include/dt-bindings/memory/mt6779-larb-port.h | 2 +- include/dt-bindings/memory/m

[PATCH 00/21] MT8192 IOMMU support

This patch mainly adds support for mt8192 IOMMU and SMI. mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The M4U-SMI HW diagram is as below: EMI | M4U

Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

On Fri, Jul 10, 2020 at 03:53:59PM -0700, Rajat Jain wrote: > On Fri, Jul 10, 2020 at 2:29 PM Raj, Ashok wrote: > > On Fri, Jul 10, 2020 at 03:29:22PM -0500, Bjorn Helgaas wrote: > > > On Tue, Jul 07, 2020 at 03:46:04PM -0700, Rajat Jain wrote: > > > > When enabling ACS, enable translation blockin

Re: [PATCH v2 3/5] irqchip: Allow QCOM_PDC to be loadable as a permanent module

Quoting John Stultz (2020-07-10 15:44:18) > On Thu, Jul 9, 2020 at 11:02 PM Stephen Boyd wrote: > > > > Does it work? I haven't looked in detail but I worry that the child > > irqdomain (i.e. pinctrl-msm) would need to delay probing until this > > parent irqdomain is registered. Or has the hierarc

[PATCH v3 1/3] irq: irqdomain: Export irq_domain_update_bus_token

Add export for irq_domain_update_bus_token() so that we can allow drivers like the qcom-pdc driver to be loadable as a module. Cc: Andy Gross Cc: Bjorn Andersson Cc: Joerg Roedel Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Cc: Linus Walleij Cc: Maulik Shah Cc: Lina Iyer Cc: Sara

[PATCH v3 2/3] irq: irqchip: Export irq_chip_retrigger_hierarchy and irq_chip_set_vcpu_affinity_parent

Add EXPORT_SYMBOL_GPL entries for irq_chip_retrigger_hierarchy() and irq_chip_set_vcpu_affinity_parent() so that we can allow drivers like the qcom-pdc driver to be loadable as a module. Cc: Andy Gross Cc: Bjorn Andersson Cc: Joerg Roedel Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier

[PATCH v3 3/3] irqchip: Allow QCOM_PDC to be loadable as a permanent module

Allows qcom-pdc driver to be loaded as a permanent module Also, due to the fact that IRQCHIP_DECLARE becomes a no-op when building as a module, we have to replace it with platform driver hooks explicitly. Thanks to Saravana for his help on pointing out the IRQCHIP_DECLARE issue and guidance on a

[PATCH v3 0/3] Allow for qcom-pdc to be loadable as a module

This patch series provides exports and config tweaks to allow the qcom-pdc driver to be able to be configured as a permement modules (particularlly useful for the Android Generic Kernel Image efforts). This was part of a larger patch series, to enable qcom_scm driver to be a module as well, but I'

Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

Hello, On Fri, Jul 10, 2020 at 2:29 PM Raj, Ashok wrote: > > Hi Bjorn > > > On Fri, Jul 10, 2020 at 03:29:22PM -0500, Bjorn Helgaas wrote: > > On Tue, Jul 07, 2020 at 03:46:04PM -0700, Rajat Jain wrote: > > > When enabling ACS, enable translation blocking for external facing ports > > > and untru

Re: [PATCH v2 3/5] irqchip: Allow QCOM_PDC to be loadable as a permanent module

On Thu, Jul 9, 2020 at 11:02 PM Stephen Boyd wrote: > Quoting Marc Zyngier (2020-06-27 02:37:47) > > On Sat, 27 Jun 2020 02:34:25 +0100, > > John Stultz wrote: > > > > > > On Fri, Jun 26, 2020 at 12:42 AM Stephen Boyd wrote: > > > > > > > > > > > > Is there any reason to use IRQCHIP_DECLARE if t

Re: [PATCH v2 5/5] firmware: QCOM_SCM: Allow qcom_scm driver to be loadable as a permenent module

On Fri, Jul 10, 2020 at 12:54 AM Will Deacon wrote: > On Thu, Jul 09, 2020 at 08:28:45PM -0700, John Stultz wrote: > > On Thu, Jul 2, 2020 at 7:18 AM Will Deacon wrote: > > > On Thu, Jun 25, 2020 at 12:10:39AM +, John Stultz wrote: > > > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kc

Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

Hi Bjorn On Fri, Jul 10, 2020 at 03:29:22PM -0500, Bjorn Helgaas wrote: > On Tue, Jul 07, 2020 at 03:46:04PM -0700, Rajat Jain wrote: > > When enabling ACS, enable translation blocking for external facing ports > > and untrusted devices. > > > > Signed-off-by: Rajat Jain > > --- > > v4: Add bra

Re: [PATCH 0/4] dma-pool: Fix atomic pool selection

Hi, I have merged this to a 5.8 tree along with "dma-pool: Only allocate from CMA when in the same memory zone" and tested it in various ACPI/DT combinations, particularly on the RPI4. It seems to be working fine. So thanks for your time and effort clearing this up! Tested-by: Jeremy Linton

Re: [PATCH v4 1/4] PCI: Move pci_enable_acs() and its dependencies up in pci.c

On Tue, Jul 07, 2020 at 03:46:01PM -0700, Rajat Jain wrote: > Move pci_enable_acs() and the functions it depends on, further up in the > source code to avoid having to forward declare it when we make it static > in near future (next patch). > > No functional changes intended. > > Signed-off-by: R

RE: [PATCH v10 4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU

Thanks Rob. One question on setting "minItems: ". Please see below. >> +allOf: >> + - if: >> + properties: >> +compatible: >> + contains: >> +enum: >> + - nvidia,tegra194-smmu >> +then: >> + properties: >> +reg: >> + minItem

Re: [PATCH v4 4/4] PCI/ACS: Enable PCI_ACS_TB for untrusted/external-facing devices

On Tue, Jul 07, 2020 at 03:46:04PM -0700, Rajat Jain wrote: > When enabling ACS, enable translation blocking for external facing ports > and untrusted devices. > > Signed-off-by: Rajat Jain > --- > v4: Add braces to avoid warning from kernel robot > print warning for only external-facing devi

Re: [PATCH V6 4/5] iommu/dma-iommu: Use the dev->coherent_dma_mask

>Btw, what is the current state of converting intel-iommu to the dma-iommu These changes expose a bug in the i915 intel driver which hasn't been fixed yet. I don't think anyone is actively working on it but I plan on merging as many patches as I can so it's easier to do the intel-iommu -> dma-iomm

Re: [PATCH] dma-pool: Only allocate from CMA when in same memory zone

Hi, I have merged this to a 5.8 tree along with "dma-pool: Fix atomic pool selection" and tested it in various ACPI/DT combinations, particularly on the RPI4. It seems to be working fine. So thanks for your time and effort clearing this up! tested-by: Jeremy Linton On 7/10/20 9:10 AM, N

Re: a question of split_huge_page

On Fri, Jul 10, 2020 at 2:35 AM Alex Shi wrote: > > 在 2020/7/10 下午1:28, Mika Penttilä 写道: > > > > > > On 10.7.2020 7.51, Alex Shi wrote: > >> > >> 在 2020/7/10 上午12:07, Kirill A. Shutemov 写道: > >>> On Thu, Jul 09, 2020 at 04:50:02PM +0100, Matthew Wilcox wrote: > On Thu, Jul 09, 2020 at 11:11:

Re: [PATCH] xen: introduce xen_vring_use_dma

Sorry for the late reply -- a couple of conferences kept me busy. On Wed, 1 Jul 2020, Michael S. Tsirkin wrote: > On Wed, Jul 01, 2020 at 10:34:53AM -0700, Stefano Stabellini wrote: > > Would you be in favor of a more flexible check along the lines of the > > one proposed in the patch that starte

Re: [GIT PULL] dma-mapping fixes for 5.8

The pull request you sent on Fri, 10 Jul 2020 17:45:06 +0200: > git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.8-5 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/1bfde037425d91d1d615d30ec362f5f5c1ca0dd2 Thank you! -- Deet-doot-dot, I am a bot.

Re: [PATCH V6 4/5] iommu/dma-iommu: Use the dev->coherent_dma_mask

Btw, what is the current state of converting intel-iommu to the dma-iommu code? ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu

[GIT PULL] dma-mapping fixes for 5.8

The following changes since commit 9ebcfadb0610322ac537dd7aa5d9cbc2b2894c68: Linux 5.8-rc3 (2020-06-28 15:00:24 -0700) are available in the Git repository at: git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.8-5 for you to fetch changes up to 68d237056e007c88031d80900cdb

Re: [PATCH] iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag

On Fri, Jul 10, 2020 at 04:15:32PM +0200, Joerg Roedel wrote: > On Fri, Jul 10, 2020 at 02:05:27PM +0100, Will Deacon wrote: > > Ah, I'd already got this queued for 5.9: > > > > https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-joerg/arm-smmu/updates > > > > and I've queue

Re: [PATCH 1/2] iommu/intel: Avoid SAC address trick for PCIe devices

On Wed, Jul 08, 2020 at 12:32:41PM +0100, Robin Murphy wrote: > For devices stuck behind a conventional PCI bus, saving extra cycles at > 33MHz is probably fairly significant. However since native PCI Express > is now the norm for high-performance devices, the optimisation to always > prefer 32-bit

Re: [PATCH] IOMMU DRIVERS: Replace HTTP links with HTTPS ones

On Wed, Jul 08, 2020 at 11:04:34PM +0200, Alexander A. Klimov wrote: > drivers/iommu/omap-iommu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Queued, thanks. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundati

Re: [PATCH] iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag

Hi Will, On Fri, Jul 10, 2020 at 02:05:27PM +0100, Will Deacon wrote: > Ah, I'd already got this queued for 5.9: > > https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-joerg/arm-smmu/updates > > and I've queued a small number of patches on top of it now. > > Are you plann

Re: [PATCH v6 00/10] MT6779 IOMMU SUPPORT

On Fri, Jul 03, 2020 at 12:41:17PM +0800, Chao Hao wrote: > Chao Hao (10): > dt-bindings: mediatek: Add bindings for MT6779 > iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL > iommu/mediatek: Use a u32 flags to describe different HW features > iommu/mediatek: Settin

[PATCH] dma-pool: Only allocate from CMA when in same memory zone

There is no guarantee to CMA's placement, so allocating a zone specific atomic pool from CMA might return memory from a completely different memory zone. To get around this double check CMA's placement before allocating from it. Fixes: c84dc6e68a1d ("dma-pool: add additional coherent pools to map

Re: [PATCH v6 07/10] iommu/mediatek: Add REG_MMU_WR_LEN_CTRL register definition

On 03/07/2020 06:41, Chao Hao wrote: Some platforms(ex: mt6779) need to improve performance by setting REG_MMU_WR_LEN_CTRL register. And we can use WR_THROT_EN macro to control whether we need to set the register. If the register uses default value, iommu will send command to EMI without restr

Re: generic DMA bypass flag v4

On Wed, 8 Jul 2020 17:24:44 +0200 Christoph Hellwig wrote: > Note that as-is this breaks the XSK buffer pool, which unfortunately > poked directly into DMA internals. A fix for that is already queued > up in the netdev tree. > > Jesper and XDP gang: this should not regress any performance as >

Re: [PATCH] iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag

Hi Joerg, On Fri, Jul 10, 2020 at 02:58:32PM +0200, Joerg Roedel wrote: > On Fri, Jul 03, 2020 at 05:25:48PM +0100, Will Deacon wrote: > > The IOMMU_SYS_CACHE_ONLY flag was never exposed via the DMA API and > > has no in-tree users. Remove it. > > > > Cc: Robin Murphy > > Cc: "Isaac J. Manjarres

RE: [PATCH v3 06/14] vfio/type1: Add VFIO_IOMMU_PASID_REQUEST (alloc/free)

> From: Alex Williamson > Sent: Friday, July 10, 2020 8:55 PM > > On Fri, 10 Jul 2020 05:39:57 + > "Liu, Yi L" wrote: > > > Hi Alex, > > > > > From: Alex Williamson > > > Sent: Thursday, July 9, 2020 10:28 PM > > > > > > On Thu, 9 Jul 2020 07:16:31 + > > > "Liu, Yi L" wrote: > > > > >

Re: [PATCH] iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag

On Fri, Jul 03, 2020 at 05:25:48PM +0100, Will Deacon wrote: > The IOMMU_SYS_CACHE_ONLY flag was never exposed via the DMA API and > has no in-tree users. Remove it. > > Cc: Robin Murphy > Cc: "Isaac J. Manjarres" > Cc: Joerg Roedel > Cc: Christoph Hellwig > Cc: Sai Prakash Ranjan > Cc: Rob C

Re: [PATCH 1/2] iommu: Tidy up Kconfig for SoC IOMMUs

On Fri, Jul 03, 2020 at 05:03:19PM +0100, Robin Murphy wrote: > Signed-off-by: Robin Murphy > --- > > Based on the current iommu/next branch. Applied both, thanks Robin. ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfounda

Re: a question of split_huge_page

Adding Robin. On Fri, Jul 10, 2020 at 05:34:52PM +0800, Alex Shi wrote: > 在 2020/7/10 下午1:28, Mika Penttilä 写道: > > > > > > On 10.7.2020 7.51, Alex Shi wrote: > >> > >> 在 2020/7/10 上午12:07, Kirill A. Shutemov 写道: > >>> On Thu, Jul 09, 2020 at 04:50:02PM +0100, Matthew Wilcox wrote: > On Thu

Re: [PATCH v3 06/14] vfio/type1: Add VFIO_IOMMU_PASID_REQUEST (alloc/free)

On Fri, 10 Jul 2020 05:39:57 + "Liu, Yi L" wrote: > Hi Alex, > > > From: Alex Williamson > > Sent: Thursday, July 9, 2020 10:28 PM > > > > On Thu, 9 Jul 2020 07:16:31 + > > "Liu, Yi L" wrote: > > > > > Hi Alex, > > > > > > After more thinking, looks like adding a r-b tree is still

Re: [PATCH v2 0/3] iommu/amd: I/O VA address limits

Hi Sebastian, On Wed, Jul 01, 2020 at 12:46:31AM +0200, Sebastian Ott wrote: > The IVRS ACPI table specifies maximum address sizes for I/O virtual > addresses that can be handled by the IOMMUs in the system. Parse that > data from the IVRS header to provide aperture information for DMA > mappings

Re: a question of split_huge_page

在 2020/7/10 下午1:28, Mika Penttilä 写道: > > > On 10.7.2020 7.51, Alex Shi wrote: >> >> 在 2020/7/10 上午12:07, Kirill A. Shutemov 写道: >>> On Thu, Jul 09, 2020 at 04:50:02PM +0100, Matthew Wilcox wrote: On Thu, Jul 09, 2020 at 11:11:11PM +0800, Alex Shi wrote: > Hi Kirill & Matthew, >

Re: [PATCH] dma-pool: use single atomic pool for both DMA zones

On Thu, 2020-07-09 at 14:49 -0700, David Rientjes wrote: > On Wed, 8 Jul 2020, Christoph Hellwig wrote: > > > On Wed, Jul 08, 2020 at 06:00:35PM +0200, Nicolas Saenz Julienne wrote: > > > On Wed, 2020-07-08 at 17:35 +0200, Christoph Hellwig wrote: > > > > On Tue, Jul 07, 2020 at 02:28:04PM +0200,

Re: [PATCH v3 4/4] iommu/vt-d: Add page response ops support

Hi Kevin, On 2020/7/10 13:49, Tian, Kevin wrote: From: Lu Baolu Sent: Friday, July 10, 2020 1:37 PM Hi Kevin, On 2020/7/10 10:42, Tian, Kevin wrote: From: Lu Baolu Sent: Thursday, July 9, 2020 3:06 PM After page requests are handled, software must respond to the device which raised the page

Re: [PATCH v2 5/5] firmware: QCOM_SCM: Allow qcom_scm driver to be loadable as a permenent module

On Thu, Jul 09, 2020 at 08:28:45PM -0700, John Stultz wrote: > On Thu, Jul 2, 2020 at 7:18 AM Will Deacon wrote: > > On Thu, Jun 25, 2020 at 12:10:39AM +, John Stultz wrote: > > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig > > > index b510f67dfa49..714893535dd2 100644 > > > ---