* Suman Anna [150721 16:58]:
> --- a/drivers/iommu/omap-iommu.c
> +++ b/drivers/iommu/omap-iommu.c
> @@ -26,6 +26,8 @@
> #include
> #include
> #include
> +#include
> +#include
>
> #include
>
> @@ -112,6 +114,18 @@ void omap_iommu_restore_ctx(struct device *dev)
> }
> EXPORT_SYMBOL_
On 2015/7/21 18:30, Robin Murphy wrote:
> On 21/07/15 08:30, Zhen Lei wrote:
>> Changelog:
>> v2 -> v3:
>> 1. add support for pci device hotplug, which missed in patch v2.
>> 2. only support #iommu-cells = <1>, add corresponding description in
>> arm,smmu-v3.txt.
>> 3. add function find_smmu_by_
Hi Tony,
The following patches add the basic DT nodes for the DSP
and IPU IOMMU devices for the DRA7xx SoC family. The first
two patches add syscon nodes for DSP_SYSTEM sub-modules, while
the last two add the IOMMU nodes.
The IPU IOMMU nodes mostly are similar to existing ones on OMAP4
and OMAP5.
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP2 processor
sub-system. This
The DRA7xx family of SOCs have two IPUs and one DSP processor
subsystems in common. The IOMMU DT nodes have been added for
these processor subsystems, and have been disabled by default.
These MMUs are very similar to those on OMAP4 and OMAP5, with
the only difference being the presence of a second
The DRA74x family of SoCs have a second DSP, that also has
two MMUs just like the DSP1 subsystem. Add the IOMMU nodes
for this DSP2 subsystem in disabled state to the DRA74x
specific DTS file, the nodes would need to be enabled
appropriately in the respective board DTS files.
Signed-off-by: Suman
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP1 processor
sub-system. This
Hi,
This series adds the basic support in the OMAP IOMMU driver to
enable/disable DSP IOMMUs for the DRA7xx family of SoCs. The
DRA7 family has two MMUs within the DSP processor subsystems.
This is the first time this was designed so in the silicon
compared to the equivalent ones on OMAP2+ SoCs.
The DSP MMUs on DRA7xx SoC requires configuring an additional
MMU_CONFIG register present in the DSP_SYSTEM sub module. This
setting dictates whether the DSP Core's MDMA and EDMA traffic
is routed through the respective MMU or not. Add the support
to the OMAP iommu driver so that the traffic is not
The DSP processor sub-systems on DRA7xx have two MMU instances
each, one for the processor core and the other for an internal
EDMA block. These MMUs need an additional shared register to be
programmed in the DSP_SYSTEM sub-module to be enabled properly.
The OMAP IOMMU bindings is updated to accoun
Hi Laurent,
>
> On Monday 20 July 2015 17:33:24 Suman Anna wrote:
>> The OMAP IOMMU driver has been adapted to the IOMMU framework
>> for a while now, and it does not support being built as a
>> module anymore. So, remove all the module references from the
>> OMAP IOMMU driver.
>>
>> While at it,
On 07/17/2015 09:53 AM, Sricharan R wrote:
From: Mitchel Humpherys
This adds the support to turn on the regulators required
for SMMUs. It is turned on during the SMMU probe and remains
'on' till the device exists.
The device always exists. Until the driver is removed perhaps?
Signed-off-by
Hello,
This is looking better, but I still have some concerns.
On Thu, Jul 16, 2015 at 10:04:32AM +0100, Yong Wu wrote:
> This patch is for ARM Short Descriptor Format.
>
> Signed-off-by: Yong Wu
> ---
> drivers/iommu/Kconfig| 18 +
> drivers/iommu/Makefile |
On Tue, Jul 21, 2015 at 06:20:23PM +0200, Andreas Hartmann wrote:
> [ 48.193901] <6>[fglrx] Firegl kernel thread PID: 1840
> [ 48.193985] <6>[fglrx] Firegl kernel thread PID: 1841
> [ 48.194063] <6>[fglrx] Firegl kernel thread PID: 1842
> [ 48.194172] <6>[fglrx] IRQ 28 Enabled
> [ 48.2615
On Tue, Jul 21, 2015 at 06:20:23PM +0200, Andreas Hartmann wrote:
> Hi Jörg,
>
> I attached the dmesg output of the boot seuqence. This time after
> reboot, the amount of IO_PAGE_FAULTs is not that much, but now, I got a
> few ata3.00 errors.
>
>
> Am 21.07.2015 um 17:56 schrieb Joerg Roedel:
>
Hi Suman,
Thank you for the patch.
On Monday 20 July 2015 17:33:29 Suman Anna wrote:
> Fix couple of checkpatch warnings of the type,
> "WARNING: Possible unnecessary 'out of memory' message"
>
> Signed-off-by: Suman Anna
The commit message could also mention that the reason to remove the
Hi Suman,
Thank you for the patch.
On Monday 20 July 2015 17:33:26 Suman Anna wrote:
> Protect the omap-pgtable.h header against double inclusion in
> source code by using the standard include guard mechanism.
>
> Signed-off-by: Suman Anna
Reviewed-by: Laurent Pinchart
> ---
> drivers/iommu
Hi Suman,
On Monday 20 July 2015 17:33:24 Suman Anna wrote:
> The OMAP IOMMU driver has been adapted to the IOMMU framework
> for a while now, and it does not support being built as a
> module anymore. So, remove all the module references from the
> OMAP IOMMU driver.
>
> While at it, also reloca
Hi Andreas,
On Tue, Jul 21, 2015 at 09:34:46AM -0600, Alex Williamson wrote:
> > Since Linux 4.1, I'm getting a lot of IO_PAGE_FAULT like this one
> >
> > [ 17.048609] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:11.0
> > domain=0x0008 address=0x40ebaaab00618000 flags=0x0010]
> >
> > with dif
Hi Suman,
Thank you for the patch.
On Monday 20 July 2015 17:33:23 Suman Anna wrote:
> The OMAP IOMMU bindings is updated to reflect the required #iommu-cells
> property.
>
> Signed-off-by: Suman Anna
This brings the documentation in sync with both mainline DT sources and code
so it looks goo
[cc +iommu, +joerg]
On Tue, 2015-07-21 at 17:04 +0200, Andreas Hartmann wrote:
> Hello!
>
> Since Linux 4.1, I'm getting a lot of IO_PAGE_FAULT like this one
>
> [ 17.048609] AMD-Vi: Event logged [IO_PAGE_FAULT device=00:11.0
> domain=0x0008 address=0x40ebaaab00618000 flags=0x0010]
>
> with d
[adding Robin]
On Fri, Jul 17, 2015 at 05:53:22PM +0100, Sricharan R wrote:
> This patch uses IOMMU_OF_DECLARE to register the driver
> and the iommu_ops. So when master devices of the iommu are
> registered, of_xlate callback can be used to add the master
> configurations to the smmu driver.
I'd
On Fri, Jul 17, 2015 at 05:53:24PM +0100, Sricharan R wrote:
> From: Mitchel Humpherys
>
> On some platforms with tight power constraints it is polite to only
> leave your clocks on for as long as you absolutely need them. Currently
> we assume that all clocks necessary for SMMU register access a
Hi Yong Wu,
On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> This patch adds support for mediatek m4u (MultiMedia Memory Management
> Unit).
[...]
> +static void mtk_iommu_tlb_flush_all(void *cookie)
> +{
> + struct mtk_iommu_domain *domain = cookie;
> + void __iomem *base;
On 21/07/15 08:30, Zhen Lei wrote:
Changelog:
v2 -> v3:
1. add support for pci device hotplug, which missed in patch v2.
2. only support #iommu-cells = <1>, add corresponding description in
arm,smmu-v3.txt.
3. add function find_smmu_by_device which extracted from find_smmu_by_node, to
resolve
Remove the words "pci", to make this function can also be used by
non-pci devices.
Signed-off-by: Zhen Lei
---
drivers/iommu/arm-smmu-v3.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 9daf4cc..216c9d4 1006
Only support #iommu-cells = <1>.
Signed-off-by: Zhen Lei
---
Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt
index
It can be replaced by of_iommu_list(in of_iommu.c).
Reviewed-by: Robin Murphy
Signed-off-by: Zhen Lei
---
drivers/iommu/arm-smmu-v3.c | 22 ++
1 file changed, 2 insertions(+), 20 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 474ec
For pci devices, only the root nodes have "iommus" property. So we
should traverse all of its sub nodes in of_xlate.
There exists two cases:
Case 1: .add_device(sub node) happened before .of_xlate(root node)
Case 2: .add_device(sub node) happened after .of_xlate(root node)
(1).add_device
This patch support a master with multiple stream IDs, but doesn't support a
master behinds more than one SMMUs.
Reviewed-by: Robin Murphy
Signed-off-by: Zhen Lei
---
drivers/iommu/arm-smmu-v3.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff
Changelog:
v2 -> v3:
1. add support for pci device hotplug, which missed in patch v2.
2. only support #iommu-cells = <1>, add corresponding description in
arm,smmu-v3.txt.
3. add function find_smmu_by_device which extracted from find_smmu_by_node, to
resolve
the problem mentioned by Robin Murp
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