Just updated my thinkpad (x230, ivy bridge platform) to 3.18 and boot
fails with the error 'PCH fifo underrun'. This is under fedora 21 with
the fedora kernel version 3.18.3-201
Platform information:
[jon@localhost]~% lspci
00:00.0 Host bridge: Intel Corporation 3rd Gen Core proc
Update. 3.18.5 seems to have fixed the issue.
Jon
Forwarded Message
Subject:PCH fifo underrun in 3.18
Date: Thu, 29 Jan 2015 13:21:53 -1000
From: jon
To: daniel.vet...@intel.com, Intel-gfx@lists.freedesktop.org
Just updated my thinkpad (x230, ivy bridge
Scratch that, still broke.
Forwarded Message
Subject:Fwd: PCH fifo underrun in 3.18
Date: Fri, 06 Feb 2015 15:11:34 -1000
From: jon
To: Intel-gfx@lists.freedesktop.org
Update. 3.18.5 seems to have fixed the issue.
Jon
Forwarded Message
Under what product should I submit the bug? dmr.debug=14 doesn't show much.
[jon@localhost]~% dmesg | grep drm
[1.936241] [drm] Initialized drm 1.1.0 20060810
[2.193043] [drm] Memory usable by graphics device = 2048M
[2.193046] [drm] Replacing VGA console driver
[2.18]
> -Original Message-
> From: Chris Wilson
> Sent: Sunday, January 10, 2021 7:04 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Bloomfield, Jon
> ; Vivi, Rodrigo ;
> sta...@vger.kernel.org
> Subject: [PATCH 03/11] drm/i915: All
> -Original Message-
> From: Martin Peres
> Sent: Tuesday, May 11, 2021 1:06 AM
> To: Daniel Vetter
> Cc: Jason Ekstrand ; Brost, Matthew
> ; intel-gfx ;
> dri-devel ; Ursulin, Tvrtko
> ; Ekstrand, Jason ;
> Ceraolo Spurio, Daniele ; Bloomfield, Jon
> ; Vet
r, Daniel
> ; Bloomfield, Jon ;
> Chris Wilson ; Joonas Lahtinen
> ; Thomas Hellström
> ; Auld, Matthew
> ; Landwerlin, Lionel G
> ; Dave Airlie ; Jason
> Ekstrand
> Subject: Re: [Intel-gfx] [PATCH 07/11] drm/i915: Add
> i915_gem_context_is_full_ppgtt
>
>
> On 02/
> -Original Message-
> From: Auld, Matthew
> Sent: Monday, April 26, 2021 2:39 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Thomas Hellström
> ; Ceraolo Spurio, Daniele
> ; Lionel Landwerlin
> ; Bloomfield, Jon
> ; Justen, Jordan L ;
> Ve
> -Original Message-
> From: Intel-gfx On Behalf Of Tvrtko
> Ursulin
> Sent: Friday, September 20, 2019 8:12 AM
> To: Chris Wilson ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Prevent bonded requests from
> overtaking each other on preemption
>
>
> On 20
> -Original Message-
> From: Chris Wilson
> Sent: Friday, September 20, 2019 9:04 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org; Tvrtko Ursulin
> Subject: RE: [Intel-gfx] [PATCH] drm/i915: Prevent bonded requests from
> overtaking each other on pr
?
>
> Either way, who can test these changes? I can't even build the tegra
> driver without digging up an arm64 cross-compiler, and can't test it as
> I have no hardware at all.
We can definitely compile and boot test these no problem. In fact
anything that lands in -next w
> -Original Message-
> From: Intel-gfx On Behalf Of Tvrtko
> Ursulin
> Sent: Tuesday, June 25, 2019 10:22 PM
> To: Ceraolo Spurio, Daniele ; Roper,
> Matthew D ; Souza, Jose
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/ehl: Add missing VECS engine
>
>
On 12/20/2021 3:52 PM, Sundaresan, Sujaritha wrote:
On 12/16/2021 3:30 PM, Vinay Belgaumkar wrote:
By default, GT (and GuC) run at RPn. Requesting for RP0
before firmware load can speed up DMA and HuC auth as well.
In addition to writing to 0xA008, we also need to enable
swreq in 0xA024 so th
only debug, then why can't the tool use a copy engine submission to access
the data in place? Or perhaps a bespoke ioctl to access this via the KMD (and
kmd submitted copy-engine BB)?
Thanks,
Jon
> -Original Message-
> From: Thomas Hellström
> Sent: Thursday, March 17,
t's needed, then so be it. But I'm asking whether we can
instead handle this specially, instead of adding generic complexity to the
primary code paths.
Jon
> -Original Message-
> From: Thomas Hellström
> Sent: Friday, March 18, 2022 2:48 AM
> To: Bloomfield, Jon ; Jo
Assuming the whitespace cleanup requested below is completed:
Acked-by: Jon Bloomfield
> -Original Message-
> From: Intel-gfx On Behalf Of
> Rodrigo Vivi
> Sent: Tuesday, November 16, 2021 2:33 PM
> To: Taylor, Clinton A
> Cc: Intel-gfx@lists.freedesktop.org
> Su
Acked-by: Jon Bloomfield
> -Original Message-
> From: Intel-gfx On Behalf Of
> Jordan Justen
> Sent: Tuesday, February 8, 2022 1:05 PM
> To: intel-gfx
> Cc: dri-devel
> Subject: [Intel-gfx] [PATCH v3 0/4] GuC HWCONFIG with documentation
>
> This is John/Ro
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, October 2, 2019 4:20 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: [PATCH 20/30] drm/i915: Cancel non-pers
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, October 2, 2019 4:20 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Ursulin, Tvrtko ;
> Bloomfield, Jon
> Subject: [PATCH 21/30] drm/i915: Replace hangcheck by heartbea
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, October 2, 2019 7:23 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: [PATCH v2] drm/i915: Cancel non-persistent context
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, October 2, 2019 7:24 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
>
> Subject: RE: [PATCH 20/30] drm/i915: Cancel non-persistent contex
> -Original Message-
> From: Intel-gfx On Behalf Of Abdiel
> Janulgue
> Sent: Monday, October 7, 2019 2:19 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Auld, Matthew
> Subject: [Intel-gfx] [PATCH v2 3/5] drm/i915: Introduce
> DRM_I915_GEM_MMAP_OFFSET
>
> This is really just an alias of
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, November 13, 2019 11:47 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Bloomfield, Jon ; Lahtinen, Joonas
> ; Vivi, Rodrigo ;
> Kuoppala, Mika ; Mika Kuoppala
>
> Subject: [PATCH i-g-t] igt: Use COND
> -Original Message-
> From: Daniel Vetter
> Sent: Thursday, November 14, 2019 12:13 AM
> To: Dave Airlie
> Cc: Jani Nikula ; Bloomfield, Jon
> ; Joonas Lahtinen
> ; Chris Wilson ;
> Stephen Rothwell ; dri-devel de...@lists.freedesktop.org>; In
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, July 25, 2019 4:17 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Ursulin, Tvrtko ;
> Bloomfield, Jon
> Subject: [PATCH] drm/i915: Replace hangcheck by heartbeats
&
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, July 25, 2019 4:28 PM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Ursulin, Tvrtko
>
> Subject: RE: [PATCH] drm/i915: Replace hangcheck by heartbeats
>
> Qu
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, July 25, 2019 4:52 PM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Ursulin, Tvrtko
>
> Subject: RE: [PATCH] drm/i915: Replace hangcheck by heartbeats
>
> Qu
> -Original Message-
> From: Chris Wilson
> Sent: Friday, July 26, 2019 1:11 PM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Ursulin, Tvrtko
>
> Subject: RE: [PATCH] drm/i915: Replace hangcheck by heartbeats
>
> Quoti
> -Original Message-
> From: Chris Wilson
> Sent: Friday, July 26, 2019 2:30 PM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Ursulin, Tvrtko
>
> Subject: RE: [PATCH] drm/i915: Replace hangcheck by heartbeats
>
> Quoting Blo
> -Original Message-
> From: Joonas Lahtinen
> Sent: Monday, July 29, 2019 5:50 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org; Chris Wilson
> Cc: Ursulin, Tvrtko
> Subject: RE: [PATCH] drm/i915: Replace hangcheck by heartbeats
>
> Quoting Chr
> -Original Message-
> From: Chris Wilson
> Sent: Tuesday, August 6, 2019 6:47 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: [PATCH 5/5] drm/i915: Cancel non-persistent context
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, August 7, 2019 6:23 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: Re: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
>
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, August 7, 2019 7:14 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
>
> Subject: RE: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, August 7, 2019 8:08 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
>
> Subject: RE: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
> -Original Message-
> From: Chris Wilson
> Sent: Wednesday, August 7, 2019 9:51 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
>
> Subject: RE: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
> -Original Message-
> From: Chris Wilson
> Sent: Friday, August 9, 2019 4:35 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: Re: [PATCH 5/5] drm/i915: Cancel non-persistent contexts on close
>
> -Original Message-
> From: Chris Wilson
> Sent: Monday, August 26, 2019 12:22 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: [PATCH 27/28] drm/i915: Cancel non-persistent context
> -Original Message-
> From: Chris Wilson
> Sent: Monday, August 26, 2019 12:22 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Ursulin, Tvrtko ;
> Bloomfield, Jon
> Subject: [PATCH 28/28] drm/i915: Replace hangcheck by heartbea
> -Original Message-
> From: Chris Wilson
> Sent: Monday, August 26, 2019 9:57 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Ursulin, Tvrtko
>
> Subject: RE: [PATCH 28/28] drm/i915: Replace hangcheck by heartbeats
>
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, August 29, 2019 1:12 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Ursulin, Tvrtko ;
> Bloomfield, Jon
> Subject: [PATCH 29/36] drm/i915: Replace hangcheck by heartbea
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, August 29, 2019 1:12 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Joonas Lahtinen
> ; Winiarski, Michal
> ; Bloomfield, Jon
> Subject: [PATCH 28/36] drm/i915: Cancel non-pers
(igt assembler
doesn't like the source right now, so it looks like it will need updating), and
we are under pressure to get this security fix out.
Jon
> -Original Message-
> From: Joonas Lahtinen
> Sent: Friday, January 31, 2020 1:52 AM
> To: Abodunrin, Akeem G ; Wilson, C
Reference: http://www.fsfla.org/pipermail/linux-libre/2020-
> June/003374.html
> Reference: http://www.fsfla.org/pipermail/linux-libre/2020-
> June/003375.html
> Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
> Cc: # v5.7+
> Cc: Alexandre Oliva
> Cc: Prathap Kumar Valsan
> Cc: Akeem G Abodunrin
> Cc: Mika Kuoppala
> Cc: Chris Wilson
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Signed-off-by: Rodrigo Vivi
Reviewed-by: Jon Bloomfield
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> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Wednesday, December 6, 2017 7:38 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Bloomfield, Jon
> ; Harrison, John C ;
> Ursulin, Tvrtko ; Joonas Lahtinen
> ; Daniel V
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Bloomfield, Jon
> Sent: Wednesday, December 6, 2017 9:01 AM
> To: Chris Wilson ; intel-gfx@lists.freedesktop.org
> Cc: Daniel Vetter
> Subject: Re: [Intel-gfx
lows discovery and access to this second VCS engine using legacy ABI.
> >
> > Signed-off-by: Tvrtko Ursulin
> > Cc: Chris Wilson
> > Cc: Jon Bloomfield
> > Cc: Tony Ye
> > ---
> > Compile tested only.
> >
> > Also, one could argue if this i
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Wednesday, April 18, 2018 2:34 AM
> To: Intel-gfx@lists.freedesktop.org
> Cc: tursu...@ursulin.net; Ursulin, Tvrtko ; Chris
> Wilson ; Bloomfield, Jon
> ; Ye, Tony
> Subject: [PATCH] drm/i915/icl: Adjust BS
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Friday, April 20, 2018 9:56 AM
> To: Bloomfield, Jon ; Tvrtko Ursulin
> ; Intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/icl: Adjust BSD2 semantics to mean
> any second VCS instance
>
I'm not formally reviewing this series, but while glancing at it, I noticed
> -Original Message-
> From: Intel-gfx On Behalf Of
> Ramalingam C
> Sent: Tuesday, November 27, 2018 2:43 AM
> To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
> daniel.vet...@ffwll.ch; W
On 5/4/2017 9:51 AM, Kenneth Graunke wrote:
On Thursday, May 4, 2017 7:47:21 AM PDT David Weinehall wrote:
On Thu, May 04, 2017 at 10:35:33AM +0200, Arkadiusz Hiler wrote:
Thanks for rephrasing - that's exactly what I am concerned with.
Did you just use the MediaSDK as it is - meaning that M
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, July 12, 2018 11:53 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Zhenyu Wang
> ; Bloomfield, Jon ;
> Joonas Lahtinen ; Matthew Auld
>
> Subject: [PATCH 3/6] drm/i915/gtt: Disable
> -Original Message-
> From: Chris Wilson
> Sent: Friday, July 13, 2018 1:06 AM
> To: Bloomfield, Jon ; Zhenyu Wang
>
> Cc: intel-gfx@lists.freedesktop.org; Zhenyu Wang
> ; Joonas Lahtinen
> ; Matthew Auld
>
> Subject: Re: [PATCH 3/6] drm/i915/gtt: Disab
gt;>>>>
> >>>>>>>> Thanks for summarizing a bunch of discussions.
> >>>>>>>> Essentially I agree with every you wrote above.
> >>>>>>>>
> >>>>>>>> If we have a global setting (determined by the OR policy), what's
> the
> >>>>>>>> point of per context settings?
> >>>>>>>>
> >>>>>>>> In Dmitry's scenario, all userspace applications will work
> >>>>>>>> together to
> >>>>>>>> reach the consensus so it sounds like we're reimplementing the
> policy
> >>>>>>>> that is already existing in userspace.
> >>>>>>>>
> >>>>>>>> Anyway, I'm implementing Joonas' suggestion. Hopefully
> somebody else
> >>>>>>>> than me pick one or the other :)
> >>>>>>> I'll just mention the voting/consensus approach to see if anyone
> else
> >>>>>>> likes it.
> >>>>>>>
> >>>>>>> Each context has a CONTEXT_PARAM_HINT_SSEU { small,
> dontcare, large }
> >>>>>>> (or some other abstract names).
> >>>>>> Yeah, the param name should have the word _HINT_ in it when it's
> not a
> >>>>>> definitive set.
> >>>>>>
> >>>>>> There's no global setter across containers, only a scenario when
> >>>>>> everyone agrees or not. Tallying up the votes and going with a
> majority
> >>>>>> vote might be an option, too.
> >>>>>>
> >>>>>> Regards, Joonas
> >>>>> Trying to test the "everyone agrees" approach here.
> >>>> It's not everyone agrees, but the greater good.
> >>>
> >>> I'm looking forward to the definition of the greater good :)
> >>> Tvrtko wanted to avoid the heuristic territory, it seems like we're just
> >>> stepping into it.
> >>
> >> I am not sure that "small, dontcare, large" models brings much. No one
> >> would probably set "dontcare" since we have to default new contexts to
> >> large to be compatible.
> >>
> >> Don't know, I still prefer the master knob option. Honestly don't yet
> >> see the containers use case as a problem. There is always a master
> >> domain in any system where the knob can be enabled if the customers on
> >> the system are such to warrant it. On mixed systems enable it or not
> >> someone always suffers. And with the knob we are free to add heuristics
> >> later, keep the uapi, and just default the knob to on.
> >
> > Master knob effectively means dead code behind a switch, that's not very
> > upstream friendly.
>
> Hey at least I wasn't proposing a modparam! :)))
>
> Yes it is not the best software practice, upstream or not, however I am
> trying to be pragmatical here and choose the simplest, smallest, good
> enough, and least headache inducing in the future solution.
>
> One way of of looking at the master switch could be like tune your
> system for XYZ - change CPU frequency governor, disable SATA link
> saving, allow i915 media optimized mode. Some live code out, some dead
> code in.
>
> But perhaps discussion is moot since we don't have userspace anyway.
>
> Regards,
>
> Tvrtko
I'm surprised by the "no deadcode behind knobs comment". We do this all
the time - "display=0" anyone? Or "enable_cmdparser=false"?
Allowing user space to reduce EU performance for the system as a whole
is not a great idea imho. Only sysadmin should have the right to let that
happen, and an admin switch (I WOULD go with a modparam personally) is
a good way to ensure that we can get the optimal media configuration for
dedicated media systems, while for general systems we get the best overall
performance (not just favouring media).
Why would we want to over engineer this?
Jon
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;re missing anything. Either way,
we can continue discussing while we progress the gen11 solution.
Jon
> -Original Message-
> From: Intel-gfx On Behalf Of
> Bloomfield, Jon
> Sent: Wednesday, July 18, 2018 9:44 AM
> To: Tvrtko Ursulin ; Joonas Lahtinen
> ; Chris Wilson ;
&g
> -Original Message-
> From: Tvrtko Ursulin [mailto:tursu...@ursulin.net]
> Sent: Wednesday, March 14, 2018 7:06 AM
> To: Intel-gfx@lists.freedesktop.org
> Cc: tursu...@ursulin.net; Ursulin, Tvrtko ; Chris
> Wilson ; Bloomfield, Jon
> ; Rogozhkin, Dmitry V
>
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Jeff McGee
> Sent: Thursday, March 22, 2018 12:09 PM
> To: Tvrtko Ursulin
> Cc: Kondapally, Kalyan ; intel-
> g...@lists.freedesktop.org; b...@bwidawsk.net
> Subject: Re: [Intel-gfx] [RFC 0/8] Force preemption
>
> O
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, June 14, 2018 5:00 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Bloomfield, Jon
> ; Joonas Lahtinen
> ; Matthew Auld
>
> Subject: [PATCH 3/5] drm/i915: Prevent writing into a read-on
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, June 14, 2018 8:00 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Matthew Auld
>
> Subject: RE: [PATCH 3/5] drm/i915: Prevent writing into a read-only object via
&g
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, June 14, 2018 8:22 AM
> To: Bloomfield, Jon ; intel-
> g...@lists.freedesktop.org
> Cc: Joonas Lahtinen ; Matthew Auld
>
> Subject: RE: [PATCH 3/5] drm/i915: Prevent writing into a read-only
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, June 14, 2018 9:07 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Chris Wilson ;
> Bloomfield, Jon ; Joonas Lahtinen
> ; Matthew Auld
> ; David Herrmann
>
> Subject
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, June 14, 2018 5:00 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Bloomfield, Jon
> ; Joonas Lahtinen
>
> Subject: [PATCH 5/5] drm/i915/userptr: Enable read-only support on gen8+
>
&g
> -Original Message-
> From: Chris Wilson
> Sent: Thursday, June 14, 2018 5:00 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Bloomfield, Jon
> ; Joonas Lahtinen
> ; Matthew Auld
>
> Subject: [PATCH 4/5] drm/i915: Reject attempted pwrites into a
BXT requires accesses to the GTT (i.e. PTE updates) to be serialized
when IOMMU is enabled. This patch guarantees this by wrapping all
updates in stop_machine and using a flushing read to guarantee that
the GTT writes have reached their destination before restarting.
Signed-off-by: Jon Bloomfield
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, May 22, 2017 1:05 PM
> To: Bloomfield, Jon
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Serialize GTT Updates on BXT
>
> On Mon, Ma
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Tuesday, May 23, 2017 12:33 AM
> To: Bloomfield, Jon
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Serialize GTT Updates on BXT
>
> On Mon, Ma
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Tuesday, May 23, 2017 1:41 AM
> To: Bloomfield, Jon
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Serialize GTT Updates on BXT
>
> On Mon, Ma
> -Original Message-
> From: Bloomfield, Jon
> Sent: Tuesday, May 23, 2017 7:28 AM
> To: 'Chris Wilson'
> Cc: intel-gfx@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH] drm/i915: Serialize GTT Updates on BXT
>
> > -Original Message--
tatic function
Signed-off-by: Jon Bloomfield
Cc: John Harrison
Cc: Chris Wilson
Cc: Daniel Vetter
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 9 +++
drivers/gpu/drm/i915/i915_gem_gtt.c | 114
2 files changed, 123 insertions(+)
diff --
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Imre Deak
> Sent: Tuesday, June 6, 2017 5:34 AM
> To: Jani Nikula
> Cc: intel-gfx@lists.freedesktop.org; Mustaffa, Mustamin B
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/bxt: Enable VB
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Wednesday, June 7, 2017 1:16 AM
> To: Deak, Imre ; Bloomfield, Jon
>
> Cc: intel-gfx@lists.freedesktop.org; Mustaffa, Mustamin B
>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Saturday, June 08, 2013 10:22 PM
> To: Carsten Emde
> Cc: Chris Wilson; Jesse Barnes; Intel Graphics Development; Bloomfield, Jon;
> Steven Rost
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Monday, June 10, 2013 3:38 PM
> To: Bloomfield, Jon
> Cc: Carsten Emde; Chris Wilson; Jesse Barnes; Intel Graphics Development;
> Steven Rost
? Any plans to implement i2c backlight control in
i915?
Regards,
Jon Pry
jon...@gmail.com
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Do you know if the DSI patch set is being maintained? I noticed it is
not integrated into drm-intel-next, the patches don't apply cleanly to
anything, and there has been no activity in about a month on them.
-Jon
On Sun, May 11, 2014 at 1:45 PM, Daniel Vetter wrote:
> Asus T100 has a
What's the status of this patch ? I can't find any subsequent mention of it,
but we currently use it in one of our Android development trees. I'm trying to
work out whether to retain it or replace it.
Was it killed off, or is it still in the pipeline ?
Thanks.
> -Original Message-
> Fr
: Friday, December 06, 2013 12:07 PM
> To: Bloomfield, Jon
> Cc: Chris Wilson; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Introduce vblank work function
>
> On Fri, Dec 06, 2013 at 10:44:15AM +, Bloomfield, Jon wrote:
> > What's t
r.
>
> v2: move the test for a pending fb unpin to a common routine for later reuse
> during eviction
>
> Reported-and-tested-by: di...@gmx.net
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73696
> Signed-off-by: Chris Wilson
Review-by: Jon Bloomfield
case scenario is that it introduces temporary corruption.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Jon Bloomfield
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w be unpinned.
It doesn't address our underlying issue - userspace should still handle ENOSPC
gracefully. However it certainly seems to be improving things considerably, so
is beneficial if it really is a safe thing to do.
Jon
-
Thanks Daniel, sermon noted.
I hadn't twigged that we were pinning buffers to the mapable GTT region which
didn't really need to be there. Do we definitely never need to modify or
interrogate the hw contexts from the CPU ? What about for debug ?
Jon
> -Original Messag
> -Original Message-
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of Ben Widawsky
> Sent: Sunday, November 03, 2013 4:07 AM
> To: Intel GFX
> Cc: Daniel Vetter; Ben Widawsky; Widawsky, Benjamin
> Subject: [Intel-gfx] [PATCH 20
On Thu, 2010-11-04 at 13:41 +, Chris Wilson wrote:
> On Thu, 04 Nov 2010 09:37:01 -0400, Jon Masters
> wrote:
> > Also, the intel-gfx list is moderated with auto-rejection. Do I really
> > need to subscribe to the list just to get a mail through?
>
> A few of the In
On Thu, 2010-11-04 at 18:14 -0400, Jon Masters wrote:
> On Thu, 2010-11-04 at 13:41 +, Chris Wilson wrote:
> > On Thu, 04 Nov 2010 09:37:01 -0400, Jon Masters
> > wrote:
> > > Also, the intel-gfx list is moderated with auto-rejection. Do I really
> > > need
On Thu, 2010-11-04 at 03:29 -0400, Jon Masters wrote:
> On Thu, 2010-11-04 at 03:25 -0400, Jon Masters wrote:
>
> > I upgraded the userspace on my EeePC 1015PEM netbook to the latest
> > Fedora (F15) rawhide and booted a custom kernel in order to test both
> > the RC1 an
re is something
specific to this system or panel used.
Jon.
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On Mon, 2010-11-08 at 05:18 -0500, Jon Masters wrote:
> The following patch that you recently committed breaks my ASUS Eee PC
> 1015PEM by causing the display to be offset by about 1 inch (a few
> centimeters) when the mode is (re)set during boot. I previously posted
> both photograp
On Mon, 2010-11-08 at 10:27 +, Chris Wilson wrote:
> On Mon, 08 Nov 2010 05:18:32 -0500, Jon Masters
> wrote:
> > Hi Chris,
> >
> > The following patch that you recently committed breaks my ASUS Eee PC
> > 1015PEM by causing the display to be offset by about
On Mon, 2010-11-08 at 05:54 -0500, Jon Masters wrote:
> Here is the EDID output after booting:
>
> [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> 000 ff00 00ff 6422 03e9 8544 0001
> 010 141c 0301 1680 780d 860a 9426 5157 2790
> 020 4f21 0
On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> On Mon, 2010-11-08 at 05:54 -0500, Jon Masters wrote:
>
> > Here is the EDID output after booting:
> >
> > [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> > 000 ff00 00ff 6422 0
On Mon, 2010-11-08 at 11:26 +, James Courtier-Dutton wrote:
> On 8 November 2010 10:27, Chris Wilson wrote:
> > On Mon, 08 Nov 2010 05:18:32 -0500, Jon Masters
> > wrote:
> >> Hi Chris,
> >>
> >> The following patch that you recently committed bre
On Mon, 2010-11-08 at 06:29 -0500, Jon Masters wrote:
> On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > On Mon, 2010-11-08 at 05:54 -0500, Jon Masters wrote:
> >
> > > Here is the EDID output after booting:
> > >
> > > [...@monticello ~]
On Mon, 2010-11-08 at 11:33 +, James Courtier-Dutton wrote:
> On 8 November 2010 10:54, Jon Masters wrote:
> >
> > Here is the EDID output after booting:
> >
> > [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> > 000 ff00 00ff 642
On Mon, 2010-11-08 at 12:13 +, Chris Wilson wrote:
> On Mon, 08 Nov 2010 06:29:09 -0500, Jon Masters
> wrote:
> > On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > > As I mentioned on IRC, I'm familiar with how I2C works electrically, and
> > >
On Mon, 2010-11-08 at 12:13 +, Chris Wilson wrote:
> On Mon, 08 Nov 2010 06:29:09 -0500, Jon Masters
> wrote:
> > On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > > As I mentioned on IRC, I'm familiar with how I2C works electrically, and
> > >
,
> which sometimes is wide of the mark.
>
> Reported-by: Jon Masters
> Signed-off-by: Chris Wilson
I have tested this patch, and my LVDS panel display on this Eee PC
1015PEM is now working correctly :) Obviously I suspect others will be
affected in due course, so hopefully this can
On Thu, 2010-11-11 at 09:02 +0100, Maciej Rutecki wrote:
> On czwartek, 4 listopada 2010 o 08:25:58 Jon Masters wrote:
> > Folks,
> >
> > I upgraded the userspace on my EeePC 1015PEM netbook to the latest
> > Fedora (F15) rawhide and booted a custom kernel in order t
> -Original Message-
> From: Nguyen, Michael H
> Sent: Wednesday, November 26, 2014 9:54 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Bloomfield, Jon; Volkin, Bradley D
> Subject: [PATCH v5 1/7] drm/i915: Implement a framework for batch buffer
> pools
>
> F
00
> +#define INSTR_26_TO_24_SHIFT 24
>
> /*
> * Memory interface instructions used by the kernel @@ -233,6 +235,7 @@
> #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0)
> #define MI_SUSPEND_FLUSH MI_INSTR(0x0b, 0)
> #define MI_SUSPEND_FLUSH_EN(1
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Daniel Vetter
> Sent: Tuesday, December 09, 2014 1:18 PM
> To: Nguyen, Michael H
> Cc: Brad Volkin; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v6 1/5] drm/i915: Impl
> -Original Message-
> From: Nguyen, Michael H
> Sent: Wednesday, December 10, 2014 4:34 PM
> To: Bloomfield, Jon
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v6 1/5] drm/i915: Implement a framework for
> batch buffer pools
&g
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