patch. Removed
PSR state tracker in i915_drrs. Jani's review comments.
v10: Added log for DRRS not supported in drrs_init
v11: Modification in drrs_init. suggested by Jani
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Cc: Jani Nikula
--
.
v9: Jani's review comments. Modified comment in set_drrs. Changed index to
type edp_drrs_refresh_rate_type. Check if PSR is enabled before setting
registers fo DRRS.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 5 ++
driver
PSR is enable/disabled.
v11: Moved DRRS not supported log to patch2.
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
Cc: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 7 ++
drivers/gpu/drm/i915/i915_params.c | 8 ++
drivers/gpu/drm/i915/intel_display.c | 16 +++
On Apr-07-2014 3:33 PM, Kannan, Vandana wrote:
> Added a property to enable user space to set aspect ratio.
> This patch contains declaration of the property and code to create the
> property.
>
> Signed-off-by: Vandana Kannan
> Cc: dri-de...@lists.freedesktop.org
> ---
In case user has specified an input for aspect ratio through the property,
then the user space value for PAR would take preference over the value from
CEA mode list.
Signed-off-by: Vandana Kannan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_edid.c | 9 +++--
1 file changed, 7
Added a property to enable user space to set aspect ratio.
This patch contains declaration of the property and code to create the
property.
Signed-off-by: Vandana Kannan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_crtc.c | 31 +++
include/drm
Create and attach the drm property to set aspect ratio. If there is no user
specified value, then PAR_NONE/Automatic option is set by default. User can
select aspect ratio 4:3 or 16:9. The aspect ratio selected by user would
come into effect with a mode set.
Signed-off-by: Vandana Kannan
Added a property to enable user space to set aspect ratio.
This patch contains declaration of the property and code to create the
property.
Signed-off-by: Vandana Kannan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_crtc.c | 31 +++
include/drm
In case user has specified an input for aspect ratio through the property,
then the user space value for PAR would take preference over the value from
CEA mode list.
Signed-off-by: Vandana Kannan
Cc: dri-de...@lists.freedesktop.org
---
drivers/gpu/drm/drm_edid.c | 9 +++--
1 file changed, 7
Create and attach the drm property to set aspect ratio. If there is no user
specified value, then PAR_NONE/Automatic option is set by default. User can
select aspect ratio 4:3 or 16:9. The aspect ratio selected by user would
come into effect with a mode set.
Signed-off-by: Vandana Kannan
On Apr-10-2014 2:28 PM, Daniel Vetter wrote:
> On Thu, Apr 10, 2014 at 11:43:15AM +0300, Jani Nikula wrote:
>>
>> Reviewed-by: Jani Nikula
>>
>>
>> On Sat, 05 Apr 2014, Vandana Kannan wrote:
>>> From: Pradeep Bhat
>>>
>>> This pat
Adding relevant read out comparison code, in check_crtc_state, for the new
member of crtc_config, dp_m2_n2, which was introduced to store link_m_n
values for a DP downclock mode (if available). Suggested by Daniel.
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
---
drivers/gpu/drm/i915
On Apr-11-2014 2:56 PM, Daniel Vetter wrote:
> On Fri, Apr 11, 2014 at 02:48:53PM +0530, Vandana Kannan wrote:
>> On Apr-10-2014 2:28 PM, Daniel Vetter wrote:
>>> On Thu, Apr 10, 2014 at 11:43:15AM +0300, Jani Nikula wrote:
>>>>
>>>> Reviewed-by: Jani
-display mode.
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
---
drivers/gpu/drm/i915/i915_drv.h | 19 ++
drivers/gpu/drm/i915/intel_display.c | 13
drivers/gpu/drm/i915/intel_dp.c |9 +++
drivers/gpu/drm/i915/intel_pm.c | 113
-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_dp.c | 91 ++
drivers/gpu/drm/i915/intel_drv.h | 35 +++
2 files changed, 126 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7619eae
active use cases like video playback. This feature
is for PV2 and not for PV1.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_dp.c | 36
drivers/gpu/drm/i915/intel_drv.h |7 +++
2 files changed, 43
: Adding support for DMRRS for media playback
Vandana Kannan (1):
drm/i915: Idleness detection for DRRS
drivers/gpu/drm/i915/i915_drv.h | 30
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_bios.c| 25 +++
drivers/gpu/drm/i915/intel_bios.h| 31
resh rate based on its policy. This feature enables user space
in acheiving better power savings for certain use cases. This
feature is for PV2 and not PV1.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_
feature is for PV2 and not PV1.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu/drm/i915/intel_bios.c |4 +++-
drivers/gpu/drm/i915/intel_bios.h |4 +++-
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/i915_drv.h |9 +
drivers/gpu/drm/i915/intel_bios.c | 23 +++
drivers/gpu/drm/i915/intel_bios.h | 29 +
3 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/i915
If one mode of a internal panel has more than one refresh rate, then a reduced
clock is found for the LFP (LVDS/eDP). This enables switching between low
and high frequency dynamically. Moving downclock calculation to intel_panel
so that it is common for LVDS and eDP.
Signed-off-by: Vandana Kannan
If one mode of a internal panel has more than one refresh rate, then a reduced
clock is found for the LFP (LVDS/eDP). This enables switching between low
and high frequency dynamically. Moving downclock calculation to intel_panel
so that it is common for LVDS and eDP.
Signed-off-by: Vandana Kannan
-display mode.
Change-Id: I17b011b3867a39588375f2b97b992444972f7760
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
---
drivers/gpu/drm/i915/i915_drv.h | 19 ++
drivers/gpu/drm/i915/intel_display.c | 13
drivers/gpu/drm/i915/intel_dp.c |9 +++
drivers/gpu/drm
[Intel-gfx] drm/i915: Parse EDID probed modes for DRRS support
[Intel-gfx] drm/i915: Add support for DRRS to switch RR
Vandana Kannan (2):
[Intel-gfx] drm/i915: Idleness detection for DRRS
[Intel-gfx] drm/i915/bdw: Add support for DRRS to switch RR
drivers/gpu/drm/i915/i915_drv.h
From: Pradeep Bhat
This patch computes and stored 2nd M/N/TU for switching to different
refresh rate dynamically. PIPECONF_EDP_RR_MODE_SWITCH bit helps toggle
between alternate refresh rates programmed in 2nd M/N/TU registers.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
next frame
that is output.
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
---
drivers/gpu/drm/i915/intel_dp.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 209be3c..183
supports seamless DRRS or not.
This information is needed for supporting seamless DRRS switch for
certain power saving usecases. This patch is tested by enabling the DRM logs
and user should see whether Seamless DRRS is supported or not.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
us decide if seamless DRRS can be done
at runtime to support certain power saving features. This patch
was tested by setting necessary bit in VBT struct and merging
the new VBT with system BIOS so that we can read the value.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
---
drivers
On Dec-17-2013 5:56 PM, Chris Wilson wrote:
> On Tue, Dec 17, 2013 at 10:58:23AM +0530, Vandana Kannan wrote:
>> From: Pradeep Bhat
>>
>> This patch reads the DRRS support and Mode type from VBT fields.
>> The read information will be stored in VBT struct during
On Dec-17-2013 5:58 PM, Chris Wilson wrote:
> On Tue, Dec 17, 2013 at 10:58:24AM +0530, Vandana Kannan wrote:
>> From: Pradeep Bhat
>>
>> This patch and finds out the lowest refresh rate supported for the resolution
>> same as the fixed_mode, based on the implementaion
On Dec-17-2013 5:59 PM, Chris Wilson wrote:
> On Tue, Dec 17, 2013 at 10:58:26AM +0530, Vandana Kannan wrote:
>> Adding support to detect display idleness by tracking page flip from
>> user space. Switch to low refresh rate is triggered after 2 seconds of
>> idleness. The dela
On Dec-17-2013 6:00 PM, Chris Wilson wrote:
> On Tue, Dec 17, 2013 at 10:58:27AM +0530, Vandana Kannan wrote:
>> For Broadwell, there is one instance of Transcoder MN values per transcoder.
>> For dynamic switching between multiple refreshr rates, M/N values may be
>> reprogra
On Dec-18-2013 2:31 PM, Chris Wilson wrote:
> On Wed, Dec 18, 2013 at 01:54:56PM +0530, Vandana Kannan wrote:
>> On Dec-17-2013 6:00 PM, Chris Wilson wrote:
>>> On Tue, Dec 17, 2013 at 10:58:27AM +0530, Vandana Kannan wrote:
>>>> For Broadwell, there is one instan
On Dec-18-2013 2:34 PM, Chris Wilson wrote:
> On Wed, Dec 18, 2013 at 01:48:12PM +0530, Vandana Kannan wrote:
>> On Dec-17-2013 5:59 PM, Chris Wilson wrote:
>>> On Tue, Dec 17, 2013 at 10:58:26AM +0530, Vandana Kannan wrote:
>>>> Adding support to detect display idlen
On Dec-18-2013 2:36 PM, Chris Wilson wrote:
> On Wed, Dec 18, 2013 at 01:41:21PM +0530, Vandana Kannan wrote:
>> On Dec-17-2013 5:58 PM, Chris Wilson wrote:
>>> On Tue, Dec 17, 2013 at 10:58:24AM +0530, Vandana Kannan wrote:
>>>> From: Pradeep Bhat
>>>>
On Dec-18-2013 2:41 PM, Chris Wilson wrote:
> On Wed, Dec 18, 2013 at 01:38:44PM +0530, Vandana Kannan wrote:
>> On Dec-17-2013 5:56 PM, Chris Wilson wrote:
>>> On Tue, Dec 17, 2013 at 10:58:23AM +0530, Vandana Kannan wrote:
>>>> From: Pradeep Bhat
>>>>
On Dec-18-2013 2:54 PM, Daniel Vetter wrote:
> On Tue, Dec 17, 2013 at 10:58:22AM +0530, Vandana Kannan wrote:
>> Dynamic Refresh Rate Switching (DRRS) is a power conservation feature which
>>
>> enables switching between low and high refresh rates based on the usage
pect ratio. Adding this field
>> as part of drm_display_mode. This is required to be sent as part of AVI
>> infoframe for HDMI compliance.
>
>>
>> Signed-off-by: Vandana Kannan
>> ---
>> drivers/gpu/drm/drm_edid.c | 374
>>
based on intel_find_panel_downclock
v3: Chris's review comments
Moved edp_downclock_avail and edp_downclock to intel_panel
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Reviewed-by: Daniel Vetter
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_dp
next frame
that is output.
v2: Incorporated Chris's review comments
Changed to check for gen >=8 or gen > 5 before setting M/N registers
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_dp.c | 31 +++
[Intel-gfx] drm/i915: Add support for DRRS to switch RR
Vandana Kannan (2):
[Intel-gfx] drm/i915: Idleness detection for DRRS
[Intel-gfx] drm/i915/bdw: Add support for DRRS to switch RR
drivers/gpu/drm/i915/i915_drv.h | 25 +
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers
quot; as a prefix for DRRS specific declarations.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h |9 +
drivers/gpu/drm/i915/intel_bios.c | 23 +++
drivers/gpu/drm/i915/intel_bio
g and storing it in crtc_config
v3: Modified reference to edp_downclock and edp_downclock_avail based on the
changes made to move them from dev_private to intel_panel.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_reg.h |
-display mode.
v2: Chris's review comments
Modify idleness detection implementation to make it similar to the
implementation of intel_update_fbc/intel_disable_fbc
Change-Id: I17b011b3867a39588375f2b97b992444972f7760
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
Reviewed-by:
Adding picture aspect ratio for CEA modes based on CEA-861D Table 3 or
CEA-861E Table 4. This is useful for filling up the detail in AVI
infoframe.
v2: Ville's review comments incorporated
Added picture aspect ratio as part of edid_cea_modes instead of DRM_MODE
Signed-off-by: Vandana K
On Dec-19-2013 5:21 PM, Jani Nikula wrote:
> On Tue, 17 Dec 2013, Vandana Kannan wrote:
>> From: Pradeep Bhat
>>
>> This patch and finds out the lowest refresh rate supported for the resolution
>> same as the fixed_mode, based on the implementaion find_panel_downclock
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Reviewed-by: Daniel Vetter
Reviewed-by: Chris Wilson
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 45 ++
drivers/gpu/drm/i915/intel_drv.h | 30 +
2 fi
quot; as a prefix for DRRS specific declarations.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h |9 +
drivers/gpu/drm/i915/intel_bios.c | 23 +++
drivers/gpu/drm/i915/intel_bio
[Intel-gfx] drm/i915: Add support for DRRS to switch RR
Vandana Kannan (2):
[Intel-gfx] drm/i915: Idleness detection for DRRS
[Intel-gfx] drm/i915/bdw: Add support for DRRS to switch RR
drivers/gpu/drm/i915/i915_drv.h | 25 +
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers
-display mode.
v2: Chris's review comments
Modify idleness detection implementation to make it similar to the
implementation of intel_update_fbc/intel_disable_fbc
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h |
next frame
that is output.
v2: Incorporated Chris's review comments
Changed to check for gen >=8 or gen > 5 before setting M/N registers
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_dp.c | 32
igned-off-by: Vandana Kannan
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_dp.c | 106 ++
drivers/gpu/drm/i915/intel_drv.h |6 ++-
3 files changed, 112 insertions(+), 1 deletion(-)
diff --git a/dr
On Dec-20-2013 7:35 PM, Daniel Vetter wrote:
> On Fri, Dec 20, 2013 at 1:29 PM, Jani Nikula
> wrote:
>>> Signed-off-by: Pradeep Bhat
>>> Signed-off-by: Vandana Kannan
>>> Reviewed-by: Daniel Vetter
>>> Reviewed-by: Chris Wilson
>>> Reviewed
Adding picture aspect ratio for CEA modes based on CEA-861D Table 3 or
CEA-861E Table 4. This is useful for filling up the detail in AVI
infoframe.
v2: Ville's inputs incorporated. Added picture aspect ratio as part of
edid_cea_modes instead of DRM_MODE
Signed-off-by: Vandana Kannan
Review
igned-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_dp.c | 106 ++
drivers/gpu/drm/i915/intel_drv.h |6 ++-
3 files changed, 112 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_re
quot; as a prefix for DRRS specific declarations.
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/i915_drv.h |9 +
drivers/gpu/drm/i915/intel_bios.c | 23 +++
drivers/gpu/drm/i915/intel_bios.h | 29 ++
-display mode.
v2: Chris Wilson's review comments incorporated.
Modify idleness detection implementation to make it similar to the
implementation of intel_update_fbc/intel_disable_fbc
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
---
drivers/gpu/drm/i915/i915_drv.h |
Signed-off-by: Pradeep Bhat
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_dp.c | 45 ++
drivers/gpu/drm/i915/intel_drv.h | 30 +
2 files changed, 75 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drive
for DRRS to switch RR
Vandana Kannan (2):
drm/i915: Idleness detection for DRRS
drm/i915/bdw: Add support for DRRS to switch RR
drivers/gpu/drm/i915/i915_drv.h | 25 +
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i915/intel_bios.c| 23 +
drivers/gpu/drm
next frame
that is output.
v2: Incorporated Chris's review comments
Changed to check for gen >=8 or gen > 5 before setting M/N registers
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
---
drivers/gpu/drm/i915/intel_dp.c | 32 +---
1 file changed
On Jan-02-2014 4:05 AM, Ben Widawsky wrote:
> Hi Daniel, and welcome back.
>
> Tomorrow I go on vacation, and since it's more or less the end of the
> day for anyone still submitting or reviewing patches, I figured now is
> as good a time as any to do this.
>
> http://cgit.freedesktop.org/~bwidaw
On Jan-22-2014 6:39 PM, Jani Nikula wrote:
> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>> From: Pradeep Bhat
>>
>> This patch reads the DRRS support and Mode type from VBT fields.
>> The read information will be stored in VBT struct during BIOS
>> parsing. The
On Jan-22-2014 7:03 PM, Jani Nikula wrote:
> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>> From: Pradeep Bhat
>>
>> This patch and finds out the lowest refresh rate supported for the resolution
>> same as the fixed_mode, based on the implementaion find_panel_downclock
On Jan-22-2014 7:44 PM, Jani Nikula wrote:
> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>> From: Pradeep Bhat
>>
>> This patch computes and stored 2nd M/N/TU for switching to different
>> refresh rate dynamically. PIPECONF_EDP_RR_MODE_SWITCH bit helps toggle
>>
On Jan-22-2014 7:56 PM, Jani Nikula wrote:
> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>> Adding support to detect display idleness by tracking page flip from
>> user space. Switch to low refresh rate is triggered after 2 seconds of
>> idleness. The delay is configurable. If
On Jan-22-2014 8:04 PM, Jani Nikula wrote:
> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>> For Broadwell, there is one instance of Transcoder MN values per transcoder.
>> For dynamic switching between multiple refreshr rates, M/N values may be
>> reprogrammed on the fl
On Jan-30-2014 11:50 AM, Jani Nikula wrote:
> On Thu, 30 Jan 2014, Vandana Kannan wrote:
>> On Jan-22-2014 6:39 PM, Jani Nikula wrote:
>>> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>>>> From: Pradeep Bhat
>>>>
>>>> This patch reads the DRR
On Jan-30-2014 12:22 PM, Jani Nikula wrote:
> On Thu, 30 Jan 2014, Vandana Kannan wrote:
>> On Jan-22-2014 7:44 PM, Jani Nikula wrote:
>>> On Mon, 23 Dec 2013, Vandana Kannan wrote:
>>>> From: Pradeep Bhat
>>>>
>>>> This patch com
Modifying PPS functions in intel_dp.c to avoid using too many conditional
statements based on platform.
Calling vlv_initial_power_sequencer_setup() from vlv specific pps functions
to just initialize vlv specific data and continue with the rest of the generic
code.
Signed-off-by: Vandana Kannan
vlv_power_sequencer_pipe() calls into init PPS functions. Changing this
function to make it only return pipe and not call PPS init.
This is because PPS init calls into this function to get a pipe ID and all
other callers just need the pipe ID.
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm
pps_lock/unlock, other pps delay functions.
Also, the code rearrangement is for eDP alone.
Vandana Kannan (3):
drm/i915: Move PPS calls to edp_init
drm/i915: Use vlv_power_sequencer_pipe() only to get pipe
drm/i915: Splitting PPS functions based on platform
drivers/gpu/drm/i915/intel_dp.c | 226
Calls to setup eDP panel power sequencer were there in dp_init_connector()
function. Moving these calls to edp_init_connector() to keep all PPS calls
together and under edp init.
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_dp.c | 15 +--
1 file changed, 5 insertions
From: vkorjani
The VBT now contains i2c sequences to allow the graphics driver to
bring up the device by directly writing to any devices that need to be
programmed.
Signed-off-by: vkorjani
Signed-off-by: Nabendu Maiti
Signed-off-by: Deepak M
Signed-off-by: Rafael Barbalho
---
drivers/gpu/dr
From: vkorjani
New sequence are added in GOP to support Backlight enabling
and Disabling. also new sequence element I2C is been added
this patch provide support to parse thse sequences in driver.
Signed-off-by: vkorjani
---
drivers/gpu/drm/i915/intel_bios.c | 8 +++-
drivers/gpu/drm/i915/i
next frame
that is output.
Signed-off-by: Vandana Kannan
Signed-off-by: Pradeep Bhat
---
drivers/gpu/drm/i915/intel_display.c | 9 +++--
drivers/gpu/drm/i915/intel_dp.c | 15 ++-
drivers/gpu/drm/i915/intel_drv.h | 3 +++
3 files changed, 20 insertions(+), 7 deletions(-)
Definition of VLV RR switch bit and corresponding toggling in
set_drrs function.
Signed-off-by: Vandana Kannan
Signed-off-by: Uma Shankar
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_dp.c | 10 --
2 files changed, 9 insertions(+), 2
calls.
The call to fb_obj_invalidate (in flip) is placed before queuing flip for this
obj.
drrs_invalidate() and drrs_flush() check for drrs.dp which would be NULL if
it was setup in drrs_enable(). This covers for the condition when DRRS is
not supported.
Signed-off-by: Vandana Kannan
---
drivers
functions, to make
sure the functions go through only if DRRS will work on the platform with
the attached panel.
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_ddi.c | 2 ++
drivers/gpu/drm/i915/intel_dp.c | 54
drivers/gpu/drm/i915/intel_drv.h
: Vandana Kannan
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/i915_params.c | 8
drivers/gpu/drm/i915/intel_dp.c| 11 ++-
3 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
, aligning with frontbuffer tracking mechanism, the new structure
contains data for busy frontbuffer bits.
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/i915_drv.h | 32 ++---
drivers/gpu/drm/i915/intel_dp.c | 50 ++--
drivers/gpu/drm
Add DRRS work function to trigger a switch to low refresh rate when activity
is detected on screen.
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_dp.c | 36
1 file changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915
added, carrying forward the input from the
previous submission of the feature. This param indicates the delay in ms after
which a switch to low RR can be made. By default, this is set to 0
indicating that the feature is disabled.
Durgadoss R (1):
drm/i915: Enable eDP DRRS for CHV
Vandana Kannan (7):
s R
Signed-off-by: Vandana Kannan
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_dp.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 411d34e..07a6abf 100
ler to 0 instead of using control pin define
- check controller bounds
- remove superfluous changes in intel_parse_bios
Signed-off-by: Deepak M
Signed-off-by: Vandana Kannan
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i91
From: vkorjani
New parsing logic for the mipi sequence block for GOP
version 3 and above. The new version of the GOP includes
the pmic, power on/off sequence which are newly adding
to the existing sequences which are present.
Also, there are new fields which are added in
the sequence to indicate
On Jun-13-2014 7:42 PM, Jani Nikula wrote:
> On Thu, 22 May 2014, Vandana Kannan wrote:
>> Adding relevant read out comparison code, in check_crtc_state, for the new
>> member of crtc_config, dp_m2_n2, which was introduced to store link_m_n
>> values for a DP downclo
On Jun-17-2014 10:12 PM, Daniel Vetter wrote:
> On Tue, Jun 17, 2014 at 05:52:24PM +0300, Jani Nikula wrote:
>> On Mon, 16 Jun 2014, Vandana Kannan wrote:
>>> On Jun-13-2014 7:42 PM, Jani Nikula wrote:
>>>> On Thu, 22 May 2014, Vandana Kannan wrote:
>>>>
For Gen < 8, set M2_N2 registers on every mode set. This is required to make
sure M2_N2 registers are set during boot, resume from sleep for cross-
checking the state. The register is set only if DRRS is supported.
v2: Patch rebased
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
---
driv
On Jun-18-2014 4:16 PM, Daniel Vetter wrote:
> On Wed, Jun 18, 2014 at 10:11:20AM +0530, Vandana Kannan wrote:
>> On Jun-17-2014 10:12 PM, Daniel Vetter wrote:
>>> On Tue, Jun 17, 2014 at 05:52:24PM +0300, Jani Nikula wrote:
>>>> On Mon, 16 Jun 2014, Vandana Kannan
egisters. Modified
get_m_n() to get M2_N2 registers as well. Modified the macro which compares
hw.dp_m_n against sw.dp_m2_n2/sw.dp_m_n for gen > 8.
v6: Added check to compare dp_m2_n2 only when DRRS is enabled
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
Cc: Jani Nikula
---
drivers/g
DRRS(dev) and added bool has_drrs to pipe_config to
track drrs support
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 36
drivers/gpu/drm/i915/intel_dp.c | 16 ++--
drivers/gpu/drm/i915/int
egisters. Modified
get_m_n() to get M2_N2 registers as well. Modified the macro which compares
hw.dp_m_n against sw.dp_m2_n2/sw.dp_m_n for gen > 8.
v6: Added check to compare dp_m2_n2 only when DRRS is enabled
v7: Modified drrs check to use has_drrs
Signed-off-by: Vandana Kannan
Cc: Daniel Vette
t; v3: Thierry's review comments.
> - Fixed indentation
>
> v4: Thierry's review comments.
> - Return ENOMEM when property creation fails
>
> Signed-off-by: Vandana Kannan
> Cc: Thierry Reding
> ---
> drivers/gpu/drm/drm_crtc.c | 33 +++
On Jun-18-2014 9:22 PM, Daniel Vetter wrote:
> On Wed, Jun 18, 2014 at 07:47:24PM +0530, Vandana Kannan wrote:
>> For Gen < 8, set M2_N2 registers on every mode set. This is required to make
>> sure M2_N2 registers are set during boot, resume from sleep for cross-
>>
On Jul-07-2014 2:11 PM, Daniel Vetter wrote:
> On Tue, Jul 01, 2014 at 10:39:52AM +0530, Vandana Kannan wrote:
>> On Jun-18-2014 9:22 PM, Daniel Vetter wrote:
>>> On Wed, Jun 18, 2014 at 07:47:24PM +0530, Vandana Kannan wrote:
>>>> For Gen < 8, set M2_N2 reg
DRRS(dev) and added bool has_drrs to pipe_config to
track drrs support
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 36
drivers/gpu/drm/i915/intel_dp.c | 16 ++--
drivers/gpu/drm/i915/int
egisters. Modified
get_m_n() to get M2_N2 registers as well. Modified the macro which compares
hw.dp_m_n against sw.dp_m2_n2/sw.dp_m_n for gen > 8.
v6: Added check to compare dp_m2_n2 only when DRRS is enabled
v7: Modified drrs check to use has_drrs
Signed-off-by: Vandana Kannan
Cc: Daniel Vette
On Jul-10-2014 2:42 AM, Jesse Barnes wrote:
> On Mon, 7 Jul 2014 14:59:45 +0530
> Vandana Kannan wrote:
>
>> For Gen < 8, set M2_N2 registers on every mode set. This is required to make
>> sure M2_N2 registers are set during boot, resume from sleep for cross-
>> ch
DRRS(dev) and added bool has_drrs to pipe_config to
track drrs support
v4: Jesse's review comments
- Made changes to set m2_n2 in intel_dp_set_m_n()
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
Cc: Jesse Barnes
---
drivers/gpu/drm/i915/intel_d
ers
Signed-off-by: Vandana Kannan
Cc: Daniel Vetter
Cc: Jani Nikula
Cc: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 75
1 file changed, 67 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/g
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