Make sure all the macros are next to each other so it's easier to spot
all the options available.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gp
Instead of duplicating the macro everywhere, add a single definition
for it and call it just like we do with the _PICK3 macros.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm
All of the macros that call _PICK are named _X_3, so let's rename
_PICK to _PICK3. The reason we're doing this is because we're going to
have _PICK and _PICK2. Consider _PICK3 as the third variation of the
PICK macros (well, actually it *is* the third variation...).
Signed-off-b
There's no need to create a new macro every time the number of
parameters change.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
The macro takes a port as an argument, not a pipe.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a1d3cca..1983b75 100644
--- a/drivers
Em Qua, 2017-06-14 às 18:16 +0300, Ville Syrjälä escreveu:
> On Tue, Jun 13, 2017 at 04:33:50PM -0300, Paulo Zanoni wrote:
> > Do it just like we do with _PICK and _PICK3, so our code looks a
> > little more uniform.
> >
> > Signed-off-by: Paulo Zanoni
> &
Em Sex, 2017-06-16 às 13:15 -0700, Rodrigo Vivi escreveu:
> Paulo noticed that we were missing few bits clear
> before writing values back to the register on
> these RMW MMIO operations.
>
> Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing
> sequence.")
>
Em Sex, 2017-06-30 às 12:12 -0700, Jim Bride escreveu:
> v2: * Minor functional tweaks and bug fixes
> * Rebase
>
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Signed-off-by: Jim Bride
This patch is not just a refactor. It changes a how the code behaves.
Please split it into
helper function
> * Misc. bug fixes
> * Rebase
>
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Signed-off-by: Jim Bride
> ---
> lib/Makefile.sources | 2 +
> lib/igt.h| 1 +
> lib/igt_psr.c| 235
> +
Em Sex, 2017-06-30 às 12:12 -0700, Jim Bride escreveu:
> v2: * Minor functional tweaks and bug fixes
> * Rebase
>
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Signed-off-by: Jim Bride
> ---
> tests/kms_frontbuffer_tracking.c | 119 +++
> ---
Em Sex, 2017-06-30 às 12:12 -0700, Jim Bride escreveu:
> v2: * Minor functional tweaks and bug fixes
> * Rebase
>
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Signed-off-by: Jim Bride
> ---
> tests/kms_fbcon_fbt.c | 54 +--
> ---
Em Sex, 2017-06-30 às 12:12 -0700, Jim Bride escreveu:
> The multidraw subtest was not taking whether or not the GEM buffer
> had
> ever been in write-combining mode when checking for PSR state, so fix
> that.
Reviewed-by: Paulo Zanoni
>
> Signed-off-by: Jim Bri
Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> This function can be used by igt_draw to get accurate
> tile dimensions for all tile formats.
>
> v2: Added comments to function igt_get_fb_tile_size (Daniel)
>
> Signed-off-by: Praveen Paneri
> ---
> lib/igt_fb.c | 16 +-
Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> igt_get_fb_tile_size function takes modifer as an argument
> This helper function will let users to convert tiling to
> modifier and use igt_get_fb_tile_size()
>
> Signed-off-by: Praveen Paneri
> ---
> lib/igt_fb.c | 26 ++
Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> From: Paulo Zanoni
>
> This is the program that's supposed to test lib/igt_draw. We just
> added Y tiling support for the library, so add the tests now.
>
This is not my original version of the patch, yet
Em Ter, 2017-07-11 às 15:48 -0700, Jim Bride escreveu:
> This work-around actually causes issues on HSW now. Without this
> code in-place I'm seeing good results on HSW.
Which issues?
>
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Signed-off-by: Ji
Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> Allow tests to create Y-tiled bufferes using a separate
> argument to the test without increasing the number of
> subtests.
>
> v2: Changed tiling option to string (Paulo)
I had some minor nitpicks for this patch: reshuffling parameter
Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> Now that we have support for Y-tiled buffers, add another
> iteration of tests for Y-tiled buffers.
Have you tested this on platforms that don't support Y-tiled buffers? I
don't see a check for that, so I wonder if we'll just fail some
olves the problems with the BLT operations on Y tiling.
There's only a minor nitpick with a line going beyond 80 columns, but I
can fix that while applying.
Reviewed-by: Paulo Zanoni
>
> Signed-off-by: Akash Goel
> Signed-off-by: Praveen Paneri
>
Em Qua, 2017-07-12 às 13:45 +0530, Praveen Paneri escreveu:
> Hi Paulo,
>
> On Wednesday 12 July 2017 12:33 AM, Paulo Zanoni wrote:
> > Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> > > From: Paulo Zanoni
> > >
> > > This is the progra
Em Qua, 2017-06-21 às 13:40 +0530, Lohith BS escreveu:
> Idleness DRRS:
> By default the DRRS state will be at DRRS_HIGH_RR. When a
> Display
> content is Idle for more than 1Sec Idleness will be declared
> and
> DRRS_LOW_RR will be invoked, changing the refresh rate to the
>
Em Sex, 2017-06-09 às 15:48 +0530, Praveen Paneri escreveu:
> This patch adds Y-tiling support for igt_draw_rect function.
>
> v2: Use helper function to get tile sizes (Ville)
>
> v3: Moved igt_get_fb_tile_size() out of the for loop
> for better performance (Paulo)
For some reason I thought th
Em Sex, 2017-07-14 às 19:25 +0530, Praveen Paneri escreveu:
> Hi Paulo,
>
> On Thursday 13 July 2017 02:31 AM, Paulo Zanoni wrote:
> > Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
> > > Now that we have support for Y-tiled buffers, add another
> > &g
* Don't define it twice.
* Define MSBs first, like the rest of i915_reg.h.
* Add CNL_ prefix to the bit that arrived in CNL.
Cc: Ville Syrjälä
Cc: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 8 +++-
drivers/gpu/drm/i915/intel_runtime_pm.
on limit factor)] * 8
>
> v2: Minor fix for a build error
>
> v3: Fixed subject, register name and platform check (Ville)
>
> v4: Added WA details in comment (Paulo)
>
> Cc: Paulo Zanoni
> Cc: Ville Syrjälä
> Signed-off-by: Praveen Paneri
> ---
> drivers/
ot;drm/i915/fbc: introduce struct intel_fbc_reg_params")
aaf78d276ba0 ("drm/i915/fbc: introduce struct intel_fbc_state_cache")
Cc: Praveen Paneri
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu
atch 5 contained a few coding style problems, which I fixed before
merging. Please try to keep the coding style used by the files touched.
>
> v2: Adressed review comments
> v3: Included original patches from Paulo and addressed more comments
>
> Paulo Zanoni (2):
> lib/
ion.
> While at it also remove the redundant paranthesis.
>
> Fixes: cf54ca8bc567 ("drm/i915/cnl: Implement voltage swing
> sequence.")
> Cc: Paulo Zanoni
> Cc: Rodrigo Vivi
> Signed-off-by: Manasi Navare
Reviewed-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i9
(Paulo)
> - Keep GLK out of the WA (Paulo)
>
> Cc: Paulo Zanoni
> Signed-off-by: Praveen Paneri
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_fbc.c | 19 +++
> 2 files changed, 22 insertions(+)
>
> diff --git a/d
s PCI ID? I mean, skip detection entirely.
>
> Cc: Anusha Srivatsa
> Cc: Paulo Zanoni
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_drv.c | 6 +++---
> drivers/gpu/drm/i915/i915_drv.h | 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
&
Em Seg, 2017-09-11 às 10:10 -0700, Rodrigo Vivi escreveu:
> On Mon, Sep 11, 2017 at 04:11:33PM +, Anuj Phogat wrote:
> > See Mesa commits: ebc5ccf and b2dae9f
>
> I believe we need to be in sync between multiple gfx stack
> components,
> but I don't believe we should remove ids.
>
> In the p
Looks like we were missing them.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 026fa54..64a4105 100644
--- a/drivers/gpu
Looks like we've been forgetting to add these since a long time ago.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_debugfs.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 13
These 2 patches just add the missing struct fields to the relevant parts of the
code. Future patches could probably break those structs into per-platform struct
inside an unions or something like that, but let's get this part done first.
Paulo Zanoni (2):
drm/i915: add the BXT and CNL
or the review.
>
> Anyways it is good for me
>
> Reviewed-by: Rodrigo Vivi
>
> On Fri, Sep 22, 2017 at 08:53:42PM +, Paulo Zanoni wrote:
> > Looks like we were missing them.
> >
> > Signed-off-by: Paulo Zanoni
> > ---
> > drivers/gpu/drm/i915/intel_d
sure things work in case we ever get crazy enough to put stolen
that far in memory.
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
b/drivers/gpu/drm
Stolen memory pointers are dma_addr_t, which means they can be 64 bit
things. By using u32 we leave room for bugs in case we ever get huge
amounts of stolen memory. By using size_t we don't risk running into
those problems.
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/cha
tags are appropriate since this is not a bug fix.
Reviewed-by: Paulo Zanoni
> Cc: Lyude
> Cc: Ville Syrjälä
> Cc: Daniel Vetter
> Cc: Radhakrishna Sripada
> Cc: Hans de Goede
> Cc: Matt Roper
> Cc: Maarten Lankhorst
> Cc: Paulo Zanoni
> Cc: Ville S
menting the 99% Wa.
> But we can revisit that decision later if we find out
> any limitation on later CNL SKUs.
>
> v2: Rebase on top of commit 'd305e0614601 ("drm/i915: Track
> minimum acceptable cdclk instead of "minimum dotclock")'
Reviewed-by: Paulo
ng HDMI on CNL I noticed that I missed to convert
> back the doubled pixel rate to cdclk.
>
Reviewed-by: Paulo Zanoni
> Cc: Paulo Zanoni
> Cc: Ville Syrjälä
> Cc: Dhinakaran Pandiyan
> Cc: Jani Nikula
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/int
eConnectorPtr connector)
> return (connector->connector_type ==
> DRM_MODE_CONNECTOR_eDP);
> }
>
> +static void psr_print_status(int fd)
> +{
> + static char buf[256];
> +
> + igt_debugfs_read(fd, "i915_edp_psr_status", buf);
> + igt_debug("FBC statu
Em Seg, 2017-11-06 às 16:16 -0200, Gabriel Krisman Bertazi escreveu:
> Paulo Zanoni writes:
>
> > Em Seg, 2017-10-30 às 15:54 -0200, Gabriel Krisman Bertazi
> > escreveu:
> > > knowing the assertion triggered on wait_until_enabled() is not
> > > that
>
ull-zero in
(possibly) uninitialized stuff, shouldn't we first check bit 1, which
is supposed to tell us if the whole reg is locked or not?
if ((reg_val & 0x3) != 0x3)
ignore stolen reserved stuff;
Anyway, this patch without my suggestions is probably better than the
current situati
Em Ter, 2017-11-14 às 20:19 +, Chris Wilson escreveu:
> Quoting Paulo Zanoni (2017-11-14 20:12:41)
> > Em Qui, 2017-11-02 às 17:17 +0200, Ville Syrjala escreveu:
> > > From: Ville Syrjälä
> > >
> > > Apparently there are some machines that put semi-sens
st that could happen is that some unhappy user will notify us that
we may still be missing something.
Speaking of that, is CI already able to call our attention to boot
error messages like this one?
Reviewed-by: Paulo Zanoni
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers
Em Ter, 2017-11-14 às 22:34 +0200, Ville Syrjälä escreveu:
> On Tue, Nov 14, 2017 at 06:12:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2017-11-02 às 17:17 +0200, Ville Syrjala escreveu:
> > > From: Ville Syrjälä
> > >
> > > Apparently there are some mac
and
should be reported back to us?
I'll let the Maintainers make the decision on whether it's fine to add
a WARN like that. Please ping them.
Anyway, just like you, I don't have the documents to back up the claims
of the patch, so giving a R-B tag is quite hard.
Acked-by: P
Em Qui, 2017-11-16 às 20:24 +0200, David Weinehall escreveu:
> On Wed, Nov 08, 2017 at 04:25:42PM +0200, David Weinehall wrote:
> > On Tue, Nov 07, 2017 at 05:18:21PM +0100, Daniel Vetter wrote:
> > > Now that we have CI, and that pm_rpm fully passes (I guess the
> > > audio
> > > folks have implem
Don't call it when we can do like the other functions and just look at
port->port. Also rename the intel_digital_port variable to make it
look like the other functions.
My main goal here is to prevent the copy-pasters from propagating the
call to other parts of the code.
Signed-off-b
debugging
in an unusual environment.
Cc: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ddi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index f7c91bb..be86eb6 100644
--- a/drivers/gp
Em Qui, 2017-10-05 às 14:49 -0700, Rodrigo Vivi escreveu:
> On Thu, Oct 05, 2017 at 09:38:41PM +0000, Paulo Zanoni wrote:
> > Don't call it when we can do like the other functions and just look
> > at
> > port->port. Also rename the intel_digital_port variable to ma
Em Sex, 2017-10-06 às 10:45 +, Patchwork escreveu:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: avoid unnecessary call
> to intel_hpd_pin_to_port
> URL : https://patchwork.freedesktop.org/series/31459/
> State : warning
>
> == Summary ==
>
> Series 31459v1 series
sometimes a good thing. But since you think it's
worth it and Ville acked it, feel free to remove it.
since we no longer use that apart from the GTT tracking I guess
> kms_fbc_crc can go.
>
> Acked-by: Ville Syrjälä
>
> >
> > This will cut a bit more than 3 m
, same function can be used
> > > for port clock == 0 now that we have the same default "2".
> > >
> > > v2: s/get/new: When documenting "get" sounded ambiguous
> > > because we could be getting the current level at pcode.
>
be enabled. No
> reason
> to fail these tests when PSR cannot be enabled.
>
> Cc: Paulo Zanoni
> Cc: Rodrigo Vivi
> Signed-off-by: Dhinakaran Pandiyan
> ---
> tests/kms_frontbuffer_tracking.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --
Em Qui, 2017-10-26 às 12:32 -0700, Rodrigo Vivi escreveu:
> On Thu, Oct 26, 2017 at 01:29:57PM +0000, Paulo Zanoni wrote:
> > Em Qua, 2017-10-25 às 17:37 -0700, Dhinakaran Pandiyan escreveu:
> > > The frontbuffer_tracking PSR tests fail if PSR cannot be
> > > activate
Just use the hardcoded tables provided by our spec.
v2: Rebase.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 86 ++-
1 file changed, 85 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm
s, same as DP (Paulo)
* Use combo_phy in ddi buf trans table defs (Paulo)
v2:
* Added DW4_scaling_hex column to the translation tables (Rodrigo)
Cc: Jani Nikula
Cc: Rodrigo Vivi
Reviewed-by: Paulo Zanoni
Signed-off-by: Manasi Navare
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/int
(from Paulo):
* Use _PORT instead of _PICK
* Change some mask names to our current coding standards
* Stay under 80 columns
v3:
* Rebase on new revision of patches
v2:
* Remove whitespaces in the #defines (Paulo)
Cc: Rodrigo Vivi
Cc: Jani Nikula
Signed-off-by: Manasi Navare
Signed-off-by: Paulo
:
* Add new defs fro ICL regs (Paulo)
Cc: Jani Nikula
Cc: Rodrigo Vivi
Reviewed-by: Paulo Zanoni
Signed-off-by: Manasi Navare
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 44 +
1 file changed, 44 insertions(+)
diff --git a/drivers
ream rework.
v8 (from Paulo):
* Adjust the code to the upstream output type changes.
* Squash the patch that moved some functions up.
* Merge both get_combo_buf_trans functions in order to simplify the
code.
* Change the changelog format.
Cc: Jani Nikula
Reviewed-by: Paulo Zanoni (v5)
Signed-off
igned-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_debugfs.c | 22 +++
drivers/gpu/drm/i915/intel_ddi.c | 102 ++-
drivers/gpu/drm/i915/intel_display.c | 14 ++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 311 +-
drivers/gpu/drm/i915/intel_dpll_
HDMI mode DPLL programming on ICL is the same as CNL, so just reuse
the CNL code.
v2:
- Properly detect HDMI crtcs.
- Rebase after changes to the cnl function (clock * 1000).
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 34 +++---
1 file
There's a lot of code for the PLL enabling, so let's first only
introduce the register definitions in order to make patch reviewing a
little easier.
v2: Coding style (Jani).
v3: Preparation for upstreaming.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_r
From: Manasi Navare
This table is used for voltage swing programming sequence during DDI
Buffer initialization for MG PHY DDI Buffers on Icelake.
v2 (from Paulo):
* Fix white space issues.
Cc: Rodrigo Vivi
Cc: Jani Nikula
Reviewed-by: Paulo Zanoni
Signed-off-by: Manasi Navare
Signed-off-by
From: Nabendu Maiti
Gen11 supports upto 5k source scaling
v2: Re-factoring of code as per review
v3: Corrected max Vertical size and indentation
v4: Added max Vertical dst size in same patch
Signed-off-by: Nabendu Maiti
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
drivers/gpu/dr
new revision of other patches in series
Cc: Rodrigo Vivi
Cc: Jani Nikula
Signed-off-by: Manasi Navare
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ddi.c | 85 +++-
1 file changed, 83 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
per before reviewing
this patch.
v2:
- Correctly identify DP encoders after upstream change.
- Small checkpatch issues.
- Rebase.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 217 +-
1 file changed, 216 insertions(+), 1 deletion(-)
di
ing table for MG PHY DDI Buffer
drm/i915/icl: Implement voltage swing programming sequence for MG PHY
DDI
drm/i915/icl: Fix the DP Max Voltage for ICL
Nabendu Maiti (1):
drm/i915/icl: Added 5k source scaling support for Gen11 platform
Paulo Zanoni (6):
drm/i915/icl: add definitions for th
From: Arkadiusz Hiler
Start using the new registers for ICL and on.
Cc: Manasi Navare
Cc: Rodrigo Vivi
Reviewed-by: Paulo Zanoni
Signed-off-by: Arkadiusz Hiler
---
drivers/gpu/drm/i915/intel_ddi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
From: Dhinakaran Pandiyan
Extend enum hpd_pin to port F so that we can start using this for ICL.
v2: Rebase.
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_hotplug.c | 3 +++
2 files changed, 4
done.
v2: Drop useless comment, and change !(GEN >= 11) to (GEN < 11). (Ville)
v3: No changes
Cc: Paulo Zanoni
Cc: Ville Syrjälä
Signed-off-by: James Ausmus
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
drivers/gpu/drm/i915/intel_display.c | 8 ++--
2 files changed, 8 inser
) (Paulo)
v2:
* Rebase after patch that adds voltage check inside buf trans
function (Rodrigo)
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Reviewed-by: Rodrigo Vivi
Signed-off-by: Manasi Navare
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ddi.c | 8 +++-
1 file changed, 7 insertions(+), 1
anasi Navare
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_ddi.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index c1f1966d471c..ad82ef91263e 100644
--- a/drivers/gpu/drm
bit (Mika)
> >* use raw accessors, better naming (Chris)
> >
> > v11:
> >* adapt to raw_reg_[read|write]
> >* bring back polling the valid bit (Daniele)
> >
> > Cc: Tvrtko Ursulin
> > Cc: Daniele Ceraolo Spurio
> > Cc: Chris W
.")
> Cc: Mahesh Kumar
> Cc: Paulo Zanoni
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_d
king.c.
If you really really want to change this to a function, can't you try
to find a way to pass a __LINE__ argument that corresponds to the exact
line of the do_assertions() call and print it somewhere? Maybe another
wrapper macro could auto-include __LINE__? But seriously, patch IGT to
e it a full revert if you don't need)
It would be nice to investigate why we're needing 5 seconds instead of
2 now, the document it in the commit message. Also document that this
is a partial revert.
Acked-by: Paulo Zanoni
> >
> > Bugzilla: https://bugs.freedesktop.org/
lso document that
> > this is a
> > partial revert.
>
> Paulo, do you have data backing up that 2 seconds was ever OK, I fail
> ~1/10 on various fbc subtests.
All the data I have is the commit message of 64590c7b and the testing I
did. I would imagine something changed in the ups
e first platform to run this. Correct code style. (Paulo)
>
Reviewed-by: Paulo Zanoni
> Sugested-by Ville Syrjala
> Cc: Ville Syrjala
> Cc: Paulo Zanoni
> Cc: Rodrigo Vivi
> Cc: Clinton Tayloe
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_hd
We have the macro, use it. Makes the code a little easier to
understand.
Cc: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915
(Paulo)
> - Keep GLK out of the WA (Paulo)
> v6:
> - added additional field in reg_params for gen9_wa_cfb_stride
> (Paulo)
> - Used appropriate bit mask while writing the register (Paulo)
>
> Cc: Paulo Zanoni
> Signed-off-by: Praveen Paneri
> ---
> drivers/
Em Sex, 2017-08-25 às 12:51 -0700, Rodrigo Vivi escreveu:
> Reviewed-by: Rodrigo Vivi
Merged. Thanks for the review!
>
> On Fri, Aug 25, 2017 at 12:40 PM, Paulo Zanoni com> wrote:
> > We have the macro, use it. Makes the code a little easier to
> > understand.
&
om 5s to 2s.
> > > > > After investigating the timeout needed, the conclusion is
> > > > > that the
> > > > > longer timeout is only needed when the test swaps between
> > > > > some
> > > > > specific draw domains, typically blt vs. mmap_cpu.
&
(silly me).
>
> Cc: Paulo Zanoni
> Signed-off-by: Daniel Vetter
Thanks for doing that. Works for me this way:
Reviewed-by: Paulo Zanoni
But I'm still waiting for the patch that removes those bogus line
numbers in every error message we print :).
> --
Em Ter, 2017-08-29 às 16:08 -0700, Rodrigo Vivi escreveu:
> Skip compressing 1 segment at the end of the frame,
> avoid a pixel count mismatch nuke event when last active
> pixel and dummy pixel has same color for Odd Plane
> Width / Height.
>
> Cc: Paulo Zanoni
> Signed
Em Sex, 2017-09-01 às 14:31 -0700, Rodrigo Vivi escreveu:
> On Fri, Sep 1, 2017 at 2:04 PM, Paulo Zanoni m> wrote:
> > Em Ter, 2017-08-29 às 16:08 -0700, Rodrigo Vivi escreveu:
> > > Skip compressing 1 segment at the end of the frame,
> > > avoid a pixel count mismat
Em Seg, 2017-09-04 às 10:00 +0200, Daniel Vetter escreveu:
> On Fri, Sep 01, 2017 at 04:44:38PM -0300, Paulo Zanoni wrote:
> > Em Seg, 2017-08-14 às 11:25 +0200, Daniel Vetter escreveu:
> > > Macros that should be C functions but aren't are really hard to
> > >
Em Seg, 2017-09-04 às 11:45 +0100, Chris Wilson escreveu:
> Quoting Paulo Zanoni (2017-09-01 20:12:01)
> > Em Sex, 2017-08-25 às 14:11 +0100, Chris Wilson escreveu:
> > > Quoting Lofstedt, Marta (2017-08-25 13:50:16)
> > > >
> > > >
> > > >
ke and Cannon Lake.
>
> v2: Use function-like macro and also use mask to clean
> to make sure bit 11 is 0. (Suggested by Paulo).
> v3: Add Display WA notation and also apply for GLK.
> Both Forgotten on v2.
> Using "GLK_" prefix since GLK came before CNL.
>
v4: Forgot to "|=" when moving directly macro to masked
> val. (Noticed by Paulo.)
Reviewed-by: Paulo Zanoni
>
> Cc: Imre Deak
> Cc: Paulo Zanoni
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/in
Em Sex, 2017-12-22 às 15:18 -0800, Rodrigo Vivi escreveu:
> By the Spec all CNL skus are GT2.
This is definitely not my understanding, some of the PCI IDs in our
driver are clearly marked as GT1 on the spec.
But since we don't use this GTX number anywhere for CNL for the Kernel
driver, can't we j
and enhancement boxes for
Icelake 11
drm/i915/icl: Make use of the SW counter field in the new context
descriptor
drm/i915/icl: Split out the servicing of the Selector and Shared IIR
registers
drm/i915/icl: Handle RPS interrupts correctly for Gen11
drm/i915/icl: Enable RC6 and R
From: Tvrtko Ursulin
Since it is not possible to mask individual engine instances
and they are all permanently unmasked we do not need to do
anything for engine interrupt management.
v2: Rebase.
v3: Remove gen 11 extra check in logical_render_ring_init.
v4: Rebase fixes.
v5: Rebase/refactor.
v6:
types that don't exist. PCH interrupts are not
here yet.
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Rodrigo Vivi
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Oscar Mateo
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_irq.c | 210 ++
: Tvrtko Ursulin
Signed-off-by: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_reg.h | 63 +
1 file changed, 63 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f773f2265af3..039ad46a4434
From: Tvrtko Ursulin
v2: Update for POR changes. (Daniele Ceraolo Spurio)
Signed-off-by: Tvrtko Ursulin
Signed-off-by: Rodrigo Vivi
Cc: Ceraolo Spurio, Daniele
---
drivers/gpu/drm/i915/i915_debugfs.c | 82 -
1 file changed, 81 insertions(+), 1 deletion(-)
For now it does nothing, except for avoiding a MISSING_CASE.
v2: Rebase.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index
).
Signed-off-by: Rodrigo Vivi
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 2 ++
4 files changed, 18
From: Tvrtko Ursulin
Gen11 will add more VCS and VECS rings so prepare the
infrastructure to support that.
Bspec: 7021
v2: Rebase.
v3: Rebase.
v4: Rebase.
v5: Rebase.
v6:
- Update for POR changes. (Daniele Ceraolo Spurio)
- Add provisional guc engine ids - to be checked and confirmed.
v7:
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