Re: [Intel-gfx] [PATCH i-g-t 2/8] lib: highlight subtest results on terminals

ow.tv_nsec - subtest_time.tv_nsec) * 1e-9; > > - printf("Subtest %s: %s (%.3fs)\n", in_subtest, result, elapsed); > + printf("%sSubtest %s: %s (%.3fs)%s\n", (istty) ? "\x1b[1m" : "", > + in_subtest, result, elapsed, (istty) ? &

Re: [Intel-gfx] [PATCH i-g-t 1/8] kms_frontbuffer_tracking: Increase the time we wait for PSR.

ers of op_disables_psr(), making them use DONT_ASSERT_PSR_STATUS so we won't eat the full 5s timeout during every single GTT mmap test. This will make the time it takes to run the full set of PSR tests even smaller than what it is today (!!!). With the improved commit message: Reviewed-by: Paulo Zanoni >

Re: [Intel-gfx] [PATCH i-g-t 2/8] kms_frontbuffer_tracking: Skip on unreliable CRC.

igt_assert(rc == SINK_CRC_SIZE); > } > > static bool sink_crc_equal(sink_crc_t *a, sink_crc_t *b) > -- > 2.4.3 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH i-g-t 4/8] kms_frontbuffer_tracking: Allow to skip suspend_resume sub test case.

heck", 0, 0, 'o'}, > { "no-fbc-action-check", 0, 0, 'a'}, > { "no-edp", 0, 0, 'e'}, > + { "no-suspend", 0, 0

Re: [Intel-gfx] [PATCH i-g-t 5/8] kms_frontbuffer_tracking: Add option to allow running tescases with PSR disabled.

rgc, char *argv[]) > { "no-fbc-action-check", 0, 0, 'a'}, > { "no-edp", 0, 0, 'e'}, > { "no-suspend", 0, 0, 'r'}, > + { "psr-disabled",

Re: [Intel-gfx] [PATCH i-g-t 3/8] kms_frontbuffer_tracking: Allow pipe crc or sink crc individually.

= { > { "no-status-check", 0, 0, 's'}, > { "no-crc-check", 0, 0, 'c'}, > + { "sink-crc-only",0, 0, 'S'}, > + { "pipe-crc-only",0, 0, 'P'}, > { "no-fbc-compression-check", 0, 0, 'o'}, > { "no-fbc-action-check", 0, 0, 'a'}, > { "no-edp", 0, 0, 'e'}, > -- > 2.4.3 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 5/6] drm/i915/kbl: Use propper ddi buffer translation table for Kabylake ULT and ULX.

> *skl_get_buf_trans_edp(struct drm_device *dev, > struct drm_i915_private *dev_priv = dev->dev_private; > const struct ddi_buf_trans *ddi_translations; > > - if (IS_SKL_ULX(dev)) { > + if (IS_SKL_ULX(dev) || IS_KBL_ULX(dev)) { There is an extr

Re: [Intel-gfx] [PATCH i-g-t 4/8] kms_frontbuffer_tracking: Allow to skip suspend_resume sub test case.

2015-11-05 18:40 GMT-02:00 Ville Syrjälä : > On Thu, Nov 05, 2015 at 06:34:07PM -0200, Paulo Zanoni wrote: >> 2015-11-05 16:53 GMT-02:00 Rodrigo Vivi : >> > There are few platforms with other suspend resume bugs that breaks >> > the full execution. So let's prov

Re: [Intel-gfx] [PATCH] drm/i915: A better maximum brightness for users.

panel->backlight.level, >> props.max_brightness); > > -- > Jani Nikula, Intel Open Source Technology Center > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 27/31] drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop.

I'm hoping this will fix bugs somewhere. Reviewed-by: Paulo Zanoni > > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_dp.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >

Re: [Intel-gfx] [PATCH 28/31] drm/i915: Make Sink crc calculation waiting for counter to reset.

> + ret = -ETIMEDOUT; > + } > + > intel_dp->sink_crc.started = false; > out: > intel_ips_enable(intel_crtc); > -- > 2.4.3 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 29/31] drm/i915: Stop tracking last calculated Sink CRC.

st makes things more confusing when test cases > are really expecting the same CRC and let test case skip if that's > not the case. > Much better this way. Reviewed-by: Paulo Zanoni > Signed-off-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_dp.c | 39 +---

Re: [Intel-gfx] [PATCH 30/31] drm/i915: Rely on TEST_SINK_START instead of tracking Sink CRC state on dev_priv.

2015-11-05 16:50 GMT-02:00 Rodrigo Vivi : > Signed-off-by: Rodrigo Vivi Another patch I was going to request in the review of the previous ones. Reviewed-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_dp.c | 14 ++ > drivers/gpu/drm/i915/intel_drv.h | 5

Re: [Intel-gfx] [PATCH 28/31] drm/i915: Make Sink crc calculation waiting for counter to reset.

2015-11-10 18:31 GMT-02:00 Paulo Zanoni : > 2015-11-05 16:50 GMT-02:00 Rodrigo Vivi : >> According to VESA DP spec TEST_CRC_COUNT (Bits 3:0) at >> TEST_SINK_MISC (00246h) is "Reset to 0 when TEST_SINK bit 0 = 0; >> >> So let's give few vblanks so we are reall

Re: [Intel-gfx] [PATCH i-g-t 2/4] tests/kms_flip: Disable all pipes before each test

+ disable_crtcs(); > + > if (set_mode(o, o->fb_ids[0], 0, 0)) { > /* We may fail to apply the mode if there are hidden > * constraints, such as bandwidth on the third pipe. > -- > 2.4.10 > > _

[Intel-gfx] [PATCH igt 08/10] kms_frontbuffer_tracking: expand badstride and stridechange

Make those subtests try to change the stride using multiple APIs so we can catch errors that affect full modesets, fast modesets and page flips. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 52 1 file changed, 48 insertions(+), 4

[Intel-gfx] [PATCH igt 07/10] kms_frontbuffer_tracking: move flip_type to struct test_mode

Handle it just like we handle t->format. IMHO, it's better. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 81 1 file changed, 40 insertions(+), 41 deletions(-) diff --git a/tests/kms_frontbuffer_tracking.c

[Intel-gfx] [PATCH igt 09/10] kms_frontbuffer_tracking: assert the stride changes at stridechange()

doing the right thing. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c index 436f1ec..5f6f3f1 100644 --- a/tests/kms_frontbuffer_trackin

[Intel-gfx] [PATCH igt 03/10] lib/igt_fb: fix open-coded ALIGN()

Maybe this will help someone's life in the future. Signed-off-by: Paulo Zanoni --- lib/igt_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 088bc0d..2818c9f 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -104,7 +104,7 @@ stati

[Intel-gfx] [PATCH igt 04/10] lib/igt_fb: also pass the stride to igt_create_fb_with_bo_size()

t have the same stride and size regardless of tiling method so I can exercise specific code paths. Signed-off-by: Paulo Zanoni --- lib/igt_fb.c | 25 - lib/igt_fb.h | 3 ++- tests/kms_flip.c | 2 +- 3 files changed, 19 insertions(+), 11 deletions(-) diff --git a/lib

[Intel-gfx] [PATCH igt 05/10] kms_frontbuffer_tracking: set our own size for the FBs we create

rong error path to be executed. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c index ee72532..74acc73 100644 -

[Intel-gfx] [PATCH igt 01/10] lib/igt_fb: fix fb->size when provided by the user

. So we fix this by returning the actual size, the one used in gem_create instead of the calculated size that's not used anywhere. Signed-off-by: Paulo Zanoni --- lib/igt_fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 13a6a34..c7

[Intel-gfx] [PATCH igt 06/10] kms_frontbuffer_tracking: do page flips using the planes API

Add a new FLIP_PLANES enum so we can do "page flips" using it too. The goal is to exercise the fast modeset paths on the Kernel. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 36 1 file changed, 36 insertions(+) diff --g

[Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

o fix this. This series alone should help reducing the number of kms_frontbuffer_tracking failures seen by QA. The last few patches make the FBC tests a little harder. They are all based on the feedback I got from the last patches I sent. Thanks, Paulo Paulo Zanoni (10): lib/igt_fb: fix fb-

[Intel-gfx] [PATCH igt 10/10] kms_frontbuffer_tracking: add tilingchange subtest

. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 48 1 file changed, 48 insertions(+) diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c index 5f6f3f1..63a2a0d 100644 --- a/tests/kms_frontbuffer_tracking.c

[Intel-gfx] [PATCH igt 02/10] lib/igt_fb: fix igt_create_fb_with_bo_size() documentation

If we pass zero as the bo_size we won't get the minimum needed size, we'll just get a size that works. The size is decided by create_bo_for_fb(). The selected size is really not minimal for tiled objects. Signed-off-by: Paulo Zanoni --- lib/igt_fb.c | 2 +- 1 file changed, 1 inser

[Intel-gfx] [PATCH 08/12] drm/i915: use a single intel_fbc_work struct

- Spelling fixes. - Rebase after changing the patch order. Reviewed-by: Chris Wilson (v1) Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 6 ++- drivers/gpu/drm/i915/intel_fbc.c | 106 +-- 2 files changed, 51 insertions(+), 61 deletions(-) dif

[Intel-gfx] [PATCH 12/12] drm/i915: only nuke FBC when a drawing operation triggers a flush

There's no need to stop and restart FBC: a nuke should be fine. v2: Make it simpler (Chris). v3: Rewrite the patch again due to patch order changes. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --

[Intel-gfx] [PATCH 06/12] drm/i915: alloc/free the FBC CFB during enable/disable

Rebase after changing the patch order. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 134 --- 1 file changed, 69 insertions(+), 65 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index

[Intel-gfx] [PATCH 11/12] drm/i915: get rid of FBC {, de}activation messages

anging the patch order. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 15 --- 1 file changed, 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index d18eb80..b80f232 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++

[Intel-gfx] [PATCH 07/12] drm/i915: check for FBC planes in the same place as the pipes

This moves the pre-gen4 check from update() to enable(). The HAS_DDI in the original code is not needed since only gen 2/3 have the plane swapping code. v2: Rebase. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions

[Intel-gfx] [PATCH 00/12] Yet another FBC series, v3 part 2

them. I'm leaving these to a next patch series, since my plans for them includes multiple patches. Thanks, Paulo Paulo Zanoni (12): drm/i915: fix the CFB size check drm/i915: set dev_priv->fbc.crtc before scheduling the enable work drm/i915: pass the crtc as an argument to int

[Intel-gfx] [PATCH 09/12] drm/i915: wait for a vblank instead of 50ms when enabling FBC

patch was originally proposed, the order of the FBC patches changed since then, so the actual numbers might be slightly different now. v2: - Rebase after changing the patch order. - Update the commit message. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gp

[Intel-gfx] [PATCH 10/12] drm/i915: kill fbc.uncompressed_size

Directly call intel_fbc_calculate_cfb_size() in the only place that actually needs it, and use the proper check before removing the stolen node. IMHO, this change makes our code easier to understand. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915

[Intel-gfx] [PATCH 05/12] drm/i915: introduce intel_fbc_{enable, disable}

ts the very basic code on enable() and disable(). The next commits will take care of moving more stuff from update() to the new functions. v2: - Rebase. - Improve commit message (Chris). v3: Rebase after changing the patch order. v4: Rebase again after upstream changes. Signed-off-by: P

[Intel-gfx] [PATCH 03/12] drm/i915: pass the crtc as an argument to intel_fbc_update()

p track of the previously selected CRTC when we do invalidate/flush. We're also going to continue the enable/disable/activate/deactivate concept in the next patches. v2: Rebase. v3: Rebase after changing the patch order. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c |

[Intel-gfx] [PATCH 04/12] drm/i915: introduce is_active/activate/deactivate to the FBC terminology

This patch by itself has no benefits other than making review and rebase easier. Please see the next patches for more details on the conversion. v2: - Rebase. - Improve commit message (Chris). v3: Rebase after changing the patch order. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm

[Intel-gfx] [PATCH 01/12] drm/i915: fix the CFB size check

me later. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 11fc528..611672f 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/

[Intel-gfx] [PATCH 02/12] drm/i915: set dev_priv->fbc.crtc before scheduling the enable work

introduce enable/disable + activate/deactivate, this will be even simpler as we'll set the CRTC at enable time. So all the activate/deactivate/update code can just look at the single CRTC variable regardless of the current state. v2: Improve commit message (Chris). v3: Rebase after changing the p

Re: [Intel-gfx] [PATCH 02/12] drm/i915: set dev_priv->fbc.crtc before scheduling the enable work

2015-11-13 18:56 GMT-02:00 Chris Wilson : > On Fri, Nov 13, 2015 at 05:53:34PM -0200, Paulo Zanoni wrote: >> This thing where we need to get the crtc either from the work >> structure or the fbc structure itself is confusing and unnecessary. >> Set fbc.crtc right when scheduli

Re: [Intel-gfx] [PATCH] drm/i915: Remove duplicated dpcd write on hsw_psr_enable_sink.

y Paulo. > Another side effect not mentioned in the commit message is that now we're flipping the DP_PSR_ENABLE bit a little later than we were before, but it looks like this is not a problem. Reviewed-by: Paulo Zanoni > Cc: Paulo Zanoni > Tested-by: Brian Norris > Signed-off-by:

Re: [Intel-gfx] [PATCH] drm/i915: PSR: Let's rely more on frontbuffer tracking.

the HW piece after we get the current bugs sorted. With those two explained in the commit message: Reviewed-by: Paulo Zanoni > > An alternative solution that makes us indepent and also > solve this case is to fully rely on our frontbuffer > tracking that is really mature right now. > &

Re: [Intel-gfx] [PATCH 4/4] drm/i915: PSR: Mask LPSP hw tracking back again.

EDP_PSR_DEBUG_MASK_MEMUP | > - EDP_PSR_DEBUG_MASK_HPD); > + EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP); > > /* Enable PSR on the panel */ > hsw_psr_enable_sink(intel_dp); > -- > 2.4.3 > >

Re: [Intel-gfx] [PATCH i-g-t 2/3] Unify handling of slow/combinatorial tests

2015-11-17 13:34 GMT-02:00 Daniel Vetter : > On Mon, Oct 26, 2015 at 03:59:24PM -0200, Paulo Zanoni wrote: >> 2015-10-26 15:30 GMT-02:00 David Weinehall : >> > On Mon, Oct 26, 2015 at 02:44:18PM -0200, Paulo Zanoni wrote: >> >> 2015-10-26 12:59 GMT-02:00 David Wei

Re: [Intel-gfx] i-g-t/libdrm email tagging & patchwork

that is quite important and high-ish the TODO >> list. >> >> HTH, >> >> -- >> Damien >> ___ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/li

Re: [Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

2015-11-18 13:59 GMT-02:00 Daniel Vetter : > On Fri, Nov 13, 2015 at 03:12:41PM -0200, Paulo Zanoni wrote: >> Hello >> >> I've been carrying some local IGT patches that reduced the size of buffers >> created by igt_create_fb() so they would fit the stolen memory, b

[Intel-gfx] [PATCH 00/25] FBC crtc/fb locking + smaller fixes

eries is the last one and that we may consider enabling FBC on HSW/BDW/SKL after it is merged :) For SKL specifically, I tested this series on a two-weeks old version of drm-intel-nightly since today's version is giving me a BUG() even without my patches applied. Thanks, Paulo Paulo Zanoni (

[Intel-gfx] [PATCH 04/25] drm/i915/fbc: introduce struct intel_fbc_reg_params

sible to access everything from dev_priv in those functions, but IMHO the new code will be harder to break. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 22 ++- drivers/gpu/drm/i915/intel_fbc.c | 131 ++- 2 files changed, 93 insertion

[Intel-gfx] [PATCH 05/25] drm/i915/fbc: replace frequent dev_priv->fbc.x with fbc->x

. But as I add more code I keep thinking about it, especially since it makes the code easier to read and it can make us fit 80 columns easier, so let's just do the change now. While at it, also rename from i915_fbc to intel_fbc because the whole FBC code uses intel_fbc. Signed-off-by: Pau

[Intel-gfx] [PATCH 02/25] drm/i915/fbc: extract intel_fbc_can_activate()

Extract all the code that checks if the FBC configuration is valid to its own function, making __intel_fbc_update() much simpler. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 92 ++-- 1 file changed, 50 insertions(+), 42 deletions

[Intel-gfx] [PATCH 01/25] drm/i915/fbc: wait for a vblank instead of 50ms when enabling

anging the patch order. - Update the commit message. v3: - Fix bogus vblank_get() instead of vblank_count() (Ville). - Don't forget to call drm_crtc_vblank_{get,put} (Chris, Ville) - Adjust the performance details on the commit message. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/

[Intel-gfx] [PATCH 07/25] drm/i915/fbc: don't flush for operations on the wrong frontbuffer

n and use plane->frontbuffer_bit instead of INTEL_FRONTBUFFER_PRIMARY. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_f

[Intel-gfx] [PATCH 08/25] drm/i915/fbc: unconditionally update FBC during atomic commits

where a disable isn't needed. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 22 ++ 1 file changed, 2 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f026ade..baab41046

[Intel-gfx] [PATCH 12/25] drm/i915/fbc: unexport intel_fbc_deactivate

With the addition and usage of intel_fbc_pre_update, intel_fbc_deactivate is not used anymore outside intel_fbc.c, so kill the exported function and rename __intel_fbc_deactivate. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_drv.h | 1 - drivers/gpu/drm/i915/intel_fbc.c | 28

[Intel-gfx] [PATCH 11/25] drm/i915/fbc: fix the FBC state checking code

27;ll only need to call intel_fbc_post_update. Also add the proper warnings in case we don't have the appropriate locks. Daniel mentioned the warnings will have to be removed for async commits, but let's keep them here while we can. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 16/25] drm/i915: simplify struct drm_device access at intel_atomic_check()

We already have a dev variable, there's no need to access state->dev. Also, I plan to add another dev_priv user here, so declare one for the current user. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(

[Intel-gfx] [PATCH 14/25] drm/i915/fbc: make sure we cancel the work function at fbc_disable

Just to be sure nothing will survive a module unload. We need to do this after the unlock in order to make sure the function won't get stuck trying to grab the lock we already own while we wait for it to finish. Reported-by: Reported-by: Daniel Vetter Signed-off-by: Paulo Zanoni --- dr

[Intel-gfx] [PATCH 13/25] drm/i915/fbc: rename the FBC disable functions

) And I also hope that the word "global" is going to help make it more explicit that "global" is the unusual case, not the opposite. Reported-by: Daniel Vetter Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_suspend.c | 2 +- drivers/gpu/drm/i915/intel_display.c |

[Intel-gfx] [PATCH 20/25] drm/i915/fbc: don't try to deactivate FBC if it's not enabled

During FBC invalidation, don't call intel_fbc_deactivate if it's not enabled. This doesn't fix any bug, but helps making the interface saner. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drive

[Intel-gfx] [PATCH 25/25] drm/i915/fbc: refactor some small functions called only once

number of indirections while reading the code. While at it, also improve the related comments a little bit. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 41 ++-- 1 file changed, 14 insertions(+), 27 deletions(-) diff --git a/drivers/gp

[Intel-gfx] [PATCH 23/25] drm/i915/fbc: call intel_fbc_pre_update earlier during page flips

Make sure we do the pre_update - which also deactivates FBC - before we actually schedule the page flip, just to make sure we don't flip to the new FB with FBC still activated for the previous FB. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file chang

[Intel-gfx] [PATCH 17/25] drm/i915/fbc: choose the new FBC CRTC during atomic check

don't actually need it, but I figured this patch would be an improvement on its own so I kept it on the series. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 1 + drivers/gpu/drm/i915/intel_drv.h | 4 ++ drivers/gpu/drm/i915/intel_fbc.

[Intel-gfx] [PATCH 09/25] drm/i915/fbc: introduce struct intel_fbc_state_cache

just can't precompute whether FBC can be activated during the update_state_cache stage. We may be able to do this later. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 23 +++ drivers/gpu/drm/i915/intel_fbc.c | 133 ++- 2 files c

[Intel-gfx] [PATCH 18/25] drm/i915/fbc: move intel_fbc_{enable, disable} call one level up

Instead of duplicating the calls for every platform, let's just put them in the correct places inside intel_atomic_commit. This will also make it easier for us to move the enable call in order to support fasbtoot. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 24/25] drm/i915/fbc: don't store/check a pointer to the FB

de to track when we need to free them, just don't track anything at all since we shouldn't need to. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/intel_fbc.c | 4 +--- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/drive

[Intel-gfx] [PATCH 22/25] drm/i915/fbc: don't store the fb_id on reg_params

backs. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 2 -- drivers/gpu/drm/i915/intel_fbc.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 65e5771..4763627 100644 --- a/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 10/25] drm/i915/fbc: split intel_fbc_update into pre and post update

alled pre_update + post_update. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 77 ++-- 1 file changed, 26 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 7396287..2983bcd 1

[Intel-gfx] [PATCH 21/25] drm/i915/fbc: don't print no_fbc_reason to dmesg

needs to investigate something. We already print when we enable and disable FBC anyway on a given pipe, so this should already help triaging bugs. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 43 +++- 1 file changed, 16 insertions(+), 27 del

[Intel-gfx] [PATCH 15/25] drm/i915/fbc: rewrite the multiple_pipes_ok() code for locking

ode at least looking sane, so if one day someone decide to fix FBC on these platforms, they may have less work to do. Not-tested-by: Paulo Zanoni (only on HSW+) Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 2 ++ drivers/gpu/

[Intel-gfx] [PATCH 06/25] drm/i915/fbc: don't use the frontbuffer tracking subsystem for flips

ntel_fbc_update() call, and in the other we have the planes disabled. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 1 + drivers/gpu/drm/i915/intel_fbc.c | 10 -- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_displ

[Intel-gfx] [PATCH 19/25] drm/i915/fbc: make FBC work with fastboot

Move intel_fbc_enable to a place where it is called regardless of the "modeset" variable, and make sure intel_fbc_enable can be called multiple times without intel_fbc_disable being called. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 4 +++- drivers/gp

[Intel-gfx] [PATCH 03/25] drm/i915/fbc: extract intel_fbc_can_enable()

Make our enable/activate checking model more explicit, especially since we now have intel_fbc_can_activate(). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 46 1 file changed, 28 insertions(+), 18 deletions(-) diff --git a/drivers

[Intel-gfx] [PATCH igt] tools: add intel_residency

iend when comparing results. v2: - Be more idle at setup_idle(). - Improve printing for /usr/bin/paste usage. Signed-off-by: Paulo Zanoni --- tools/.gitignore| 1 + tools/Makefile.sources | 1 + tools/intel_residency.c | 708 3

[Intel-gfx] [PATCH 01/25] drm/i915/fbc: wait for a vblank instead of 50ms when enabling

the vblank (Maarten) Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_fbc.c | 39 +-- 2 files changed, 30 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH 05/25] drm/i915/fbc: replace frequent dev_priv->fbc.x with fbc->x

. But as I add more code I keep thinking about it, especially since it makes the code easier to read and it can make us fit 80 columns easier, so let's just do the change now. While at it, also rename from i915_fbc to intel_fbc because the whole FBC code uses intel_fbc. v2: Rebase after the wo

[Intel-gfx] [PATCH 08/25] drm/i915/fbc: unconditionally update FBC during atomic commits

where a disable isn't needed. v2: Upstream moved and now our patch needs to remove dev_priv. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 23 ++- 1 file changed, 2 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.

[Intel-gfx] [PATCH igt 1/6] lib/igt_fb: make the automatic buffer sizes/strides smaller

buffers. I also need to export the size computation function so I won't need to reimplement it inside kms_frontbuffer_tracking. v2: - Fix the Yf sizes (Ville). - Don't change the non-tiled Gen 2/3 behavior. Requested-by: Daniel Vetter Signed-off-by: Paulo Zanoni --- lib/igt_

[Intel-gfx] [PATCH igt 3/6] kms_frontbuffer_tracking: standardize the used FB sizes

checks for buffer sizes. v2: Use the new igt_calc_fb_size() instead of implementing our own size calculation (Daniel). v3: We can now use igt_drm_format_to_bpp() (Daniel). Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 19 ++- 1 file changed, 18 insertions(+),

[Intel-gfx] [PATCH igt 5/6] lib/igt_fb: fix igt_get_all_formats documentation

We give the callers a const pointer to a static variable that we reuse between multiple calls: they're not supposed to free it, and they don't free it today. Fix the documentation and leave the still reachable pointer instead of reworking the function and its callers. Signed-off-by: Pa

[Intel-gfx] [PATCH igt 6/6] tests/igt_fb: rename igt_get_all_formats to igt_get_all_cairo_formats

e we start adding new formats without matching Cairo versions to format_desc, rename igt_get_all_formats to igt_get_all_cairo_formats and make it explicitly check for CAIRO_FORMAT_INVALID. Requested-by: Daniel Vetter Signed-off-by: Paulo Zanoni --- lib/igt_fb.c | 22 ++ li

[Intel-gfx] [PATCH igt 2/6] kms_frontbuffer_tracking: use igt_drm_format_to_bpp()

assume that all formats known by igt_fb have equivalent Cairo formats. Signed-off-by: Paulo Zanoni --- tests/kms_frontbuffer_tracking.c | 17 + 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c index e

[Intel-gfx] [PATCH igt 4/6] lib/igt_draw: use igt_drm_format_to_bpp()

Don't reimplement the function. Signed-off-by: Paulo Zanoni --- lib/igt_draw.c | 16 +--- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/lib/igt_draw.c b/lib/igt_draw.c index f85e376..45fa10f 100644 --- a/lib/igt_draw.c +++ b/lib/igt_draw.c @@ -594,20 +594,6 @@

[Intel-gfx] [PATCH igt] tools/intel_residency: use setitimer instead of {, u}alarm

rek Morton Signed-off-by: Paulo Zanoni --- tools/intel_residency.c | 25 +++-- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/tools/intel_residency.c b/tools/intel_residency.c index 7b820c1..74074c5 100644 --- a/tools/intel_residency.c +++ b/tools/intel_r

Re: [Intel-gfx] [PATCH igt 1/6] lib/igt_fb: make the automatic buffer sizes/strides smaller

2016-01-26 11:40 GMT-02:00 Chris Wilson : > On Tue, Jan 26, 2016 at 11:28:59AM -0200, Paulo Zanoni wrote: >> The big motivation behind this patch is that the current power-of-two >> granularity from igt_fb is way too big. There was more than one >> occasion where I had to wor

[Intel-gfx] [PATCH igt 1/2] tests/pm_rpm: remove POWER_DIR definition

Unused ever since we moved some code from pm_rpm.c to lib/. This is currently defined inside igt_aux.c. Signed-off-by: Paulo Zanoni --- tests/pm_rpm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c index 3a5e8ba..bc81144 100644 --- a/tests/pm_rpm.c +++ b

[Intel-gfx] [PATCH igt 2/2] tests/pm_rpm: find an appropriate CRTC instead of hardcoding CRTC 0

BSW does not allow CRTC 0 to be used on every connector, so we need to write code to actually find a suitable CRTC. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93124 Signed-off-by: Paulo Zanoni --- tests/pm_rpm.c | 52 ++-- 1 file

[Intel-gfx] [PATCH igt 2/3] lib/igt_draw: add support for Y tiling

Signed-off-by: Paulo Zanoni --- lib/igt_draw.c | 173 - 1 file changed, 123 insertions(+), 50 deletions(-) diff --git a/lib/igt_draw.c b/lib/igt_draw.c index 45fa10f..468a1eb 100644 --- a/lib/igt_draw.c +++ b/lib/igt_draw.c @@ -134,71 +134,11

[Intel-gfx] [PATCH igt 3/3] tests/kms_draw_crc: add support for Y tiling

This is the program that's supposed to test lib/igt_draw. We just added Y tiling support for the library, so add the tests now. Signed-off-by: Paulo Zanoni --- tests/kms_draw_crc.c | 55 ++-- 1 file changed, 40 insertions(+), 15 deletions(-)

[Intel-gfx] [PATCH igt 1/3] lib/igt_fb: also call __gem_set_tiling for Y tiling

The interesting thing is that if we don't do this, we still get a Y tiled framebuffer, but there won't be a fence around it, which makes the GTT mmaps less interesting. Is this a Kernel bug? Signed-off-by: Paulo Zanoni --- lib/igt_fb.c | 39 -

[Intel-gfx] [PATCH 2/3] drm/i915/fbc: unexport the HW level activation functions

gt;fbc and replace them with functions that can't be called from outside intel_fbc.c. This should make it much harder for new code to call these functions from outside intel_fbc.c. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 4 --- drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH 1/3] drm/i915: don't deactivate FBC at skylake_disable_primary_plane

ion: commit a8d201af68506b375b701d0d8dbe8487034256f2 Author: Maarten Lankhorst Date: Thu Jan 7 11:54:11 2016 +0100 drm/i915: Use plane state for primary plane updates. Cc: Maarten Lankhorst Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 3 --- 1 f

[Intel-gfx] [PATCH 3/3] drm/i915/fbc: set fbc->active from the new activation functions

Now that we have top-level gen-independent hw_activate and hw_deactivate functions, set fbc->active directly from them, removing the duplicated code. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_fbc.c | 22 -- 1 file changed, 8 insertions(+), 14 deleti

Re: [Intel-gfx] [PATCH RESEND] drm: i915: Preserve old FBC status for update without new planes

Em Qui, 2017-06-01 às 16:09 -0700, Manasi Navare escreveu: > The modified commit message looks good to me. > > Reviewed-by: Manasi Navare Reviewed-by: Paulo Zanoni As a longer term plan we could try to think some way to reduce the complexity between the Kernel and IGT interaction he

Re: [Intel-gfx] [PATCH] drm/i915: Implement fbc_status "Compressing" info for all platforms

etter to check for both > COMPRESSED and COMPRESSING as that should tell us that the > compressor is at least trying to do something. > > While at it move the IVB+ register define to the right place, unify > the naming convention of the compressed segment count masks, and > fix

Re: [Intel-gfx] [PATCH v2 0/7] Add Y-tiling support into IGTs

Em Sáb, 2017-04-29 às 08:44 +0530, Praveen Paneri escreveu: > HI Paulo, > > > > On Sat, Apr 29, 2017 at 12:51 AM, Paulo Zanoni com> wrote: > > Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu: > > > This series adds Y-tiled buffer creation support i

Re: [Intel-gfx] [PATCH RESEND] drm: i915: Preserve old FBC status for update without new planes

Em Sex, 2017-06-09 às 20:24 +0100, Chris Wilson escreveu: > Quoting Gabriel Krisman Bertazi (2017-06-01 16:36:08) > > If the atomic commit doesn't include any new plane, there is no > > need to > > choose a new CRTC for FBC, and the intel_fbc_choose_crtc() will > > bail out > > early.  Although, if

Re: [Intel-gfx] [PATCH RESEND] drm: i915: Preserve old FBC status for update without new planes

Em Sex, 2017-06-09 às 22:40 +0300, Ville Syrjälä escreveu: > On Fri, Jun 09, 2017 at 08:24:59PM +0100, Chris Wilson wrote: > > Quoting Gabriel Krisman Bertazi (2017-06-01 16:36:08) > > > If the atomic commit doesn't include any new plane, there is no > > > need to > > > choose a new CRTC for FBC, a

[Intel-gfx] [PATCH 1/7] drm/i915: reorder the register picking macros

We currently have pipe, plane, trans, port, pll and phy versions of these macros. Reorder their definitions so all macros of each type are in their own group, separated by blank lines. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 11 --- 1 file changed, 8 insertions

[Intel-gfx] [PATCH 0/7] Reorganize the register picking macros

pletely open to good naming suggestions. The only test I've done in the series was to boot SKL. Let's see what the CI system has to say about it. Cc: Rodrigo Vivi Paulo Zanoni (7): drm/i915: reorder the register picking macros drm/i915: _MMIO_PORT3 takes a port as an argument

[Intel-gfx] [PATCH 7/7] drm/i915: extract a _PICK2 macro

Do it just like we do with _PICK and _PICK3, so our code looks a little more uniform. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

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