We unconditionally disable/update FBC even during the page flip
IOCTLs, and an unconditional disable/update at every atomic commit
touching the primary plane shouldn't impact PC state residency
noticeably. Besides, the code that checks for rotation is a good hint
that we may be forgetting something else, so let's leave all the
decisions to intel_fbc.c, making the code much safer.

Once we have the code to properly make FBC enable/update decisions
based on atomic states, with proper locking, then we'll be able to
evaluate whether it will be worth trying to optimize the cases where a
disable isn't needed.

Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 22 ++--------------------
 1 file changed, 2 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index f026ade..baab41046 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11928,6 +11928,8 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
        case DRM_PLANE_TYPE_PRIMARY:
                intel_crtc->atomic.pre_disable_primary = turn_off;
                intel_crtc->atomic.post_enable_primary = turn_on;
+               intel_crtc->atomic.disable_fbc = true;
+               intel_crtc->atomic.update_fbc = true;
 
                if (turn_off) {
                        /*
@@ -11939,28 +11941,9 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
                         * disable.
                         */
                        intel_crtc->atomic.disable_ips = true;
-
-                       intel_crtc->atomic.disable_fbc = true;
                }
 
                /*
-                * FBC does not work on some platforms for rotated
-                * planes, so disable it when rotation is not 0 and
-                * update it when rotation is set back to 0.
-                *
-                * FIXME: This is redundant with the fbc update done in
-                * the primary plane enable function except that that
-                * one is done too late. We eventually need to unify
-                * this.
-                */
-
-               if (visible &&
-                   INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) &&
-                   dev_priv->fbc.crtc == intel_crtc &&
-                   plane_state->rotation != BIT(DRM_ROTATE_0))
-                       intel_crtc->atomic.disable_fbc = true;
-
-               /*
                 * BDW signals flip done immediately if the plane
                 * is disabled, even if the plane enable is already
                 * armed to occur at the next vblank :(
@@ -11968,7 +11951,6 @@ int intel_plane_atomic_calc_changes(struct 
drm_crtc_state *crtc_state,
                if (turn_on && IS_BROADWELL(dev))
                        intel_crtc->atomic.wait_vblank = true;
 
-               intel_crtc->atomic.update_fbc |= visible || mode_changed;
                break;
        case DRM_PLANE_TYPE_CURSOR:
                break;
-- 
2.6.4

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