Em Ter, 2016-12-13 às 18:01 -0200, Paulo Zanoni escreveu:
> Em Ter, 2016-12-13 às 17:57 -0200, Paulo Zanoni escreveu:
> >
> > BSpec got updated and this workaround is now listed as standard
> > required programming for all subsequent projects.
> >
Ok, so I got confirm
at means losing BIOS framebuffer
inheritance. Let's not use the HW in a way it's not supposed to be
used.
v2: don't even put the first page on the mm (Chris).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94605
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/
heory).
v2: this is the patch that fixes the screen flickering, document it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94605
Cc: sta...@vger.kernel.org
Tested-by: Dominik Klementowski
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_gem_stolen.c | 5 ++---
1 file chang
w_bug.cgi?id=94605
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_gem_gtt.h| 1 +
drivers/gpu/drm/i915/i915_gem_stolen.c | 34 +-
drivers/gpu/drm/i915/intel_fbc.c | 6 +++---
3 files changed, 17 insertions(+), 24 deletions(-)
documentation
of what's wrong, I think it's better to just close them since they're
actually fixed now. We can still go back to them later since they're
documented in the git commit message.
If anybody disagrees, please feel free to reopen them.
>
> On Tue, 20
://bugs.freedesktop.org/show_bug.cgi?id=94605
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_gem_gtt.h| 10 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 36 --
drivers/gpu/drm/i915/intel_fbc.c | 2 +-
3 files changed,
Em Qui, 2016-12-01 às 21:19 +0530, Mahesh Kumar escreveu:
> This patch implemnets Workariunds related to display arbitrated
> memory
> bandwidth. These WA are applicabe for all gen-9 based platforms.
3 typos above.
The WA is already implemented. What the patch does is that it opts-out
of the WA i
r than enum plane.
>
> Do the same for the scaler plane selector bits.
>
Reviewed-by: Paulo Zanoni
> Cc: Paulo Zanoni
> Suggested-by: Paulo Zanoni
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_reg.h | 46 ---
> -
Em Ter, 2016-11-22 às 18:02 +0200, ville.syrj...@linux.intel.com
escreveu:
> From: Ville Syrjälä
>
> With plane->plane now purely reserved for the primary planes, let's
> not even populate it for cursors and sprites. Let's switch the type
> to enum plane as well since it's no longer being abused
Em Qui, 2016-12-15 às 21:11 +0200, Ville Syrjälä escreveu:
> On Thu, Dec 15, 2016 at 05:05:05PM -0200, Paulo Zanoni wrote:
> >
> > Em Ter, 2016-11-22 às 18:02 +0200, ville.syrj...@linux.intel.com
> > escreveu:
> > >
> > > From: Ville Syrjälä
> > &
Em Qui, 2016-12-15 às 21:59 +0200, Ville Syrjälä escreveu:
> On Thu, Dec 15, 2016 at 05:50:02PM -0200, Paulo Zanoni wrote:
> >
> > Em Qui, 2016-12-15 às 21:11 +0200, Ville Syrjälä escreveu:
> > >
> > > On Thu, Dec 15, 2016 at 05:05:05PM -0200, Paulo Zanoni wrote:
cted check at can_choose() to avoid
misleading dmesg messages (DK).
Cc: Stefan Richter
Cc: Lyude
Cc: stevenhoney...@gmail.com
Cc: Dhinakaran Pandiyan
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h| 3 ++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drive
cted check at can_choose() to avoid
misleading dmesg messages (DK).
v5: Fix Engrish, use READ_ONCE on the unlocked read (Chris).
Cc: Stefan Richter
Cc: Lyude
Cc: stevenhoney...@gmail.com
Cc: Dhinakaran Pandiyan
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/
Hi
Here's the series with the reviews implemented. There's a new patch,
based on the additional issue spotted by Lyude.
Thanks for all the reviews,
Paulo
Paulo Zanoni (9):
drm/i915: SAGV is not SKL-only, so rename a few things
drm/i915: introduce intel_has_sagv()
drm/i915/kbl
x27;t seem to be
calling any functions whose name start with a platform name, so the
"intel_" naming scheme seems make more sense than the "firstplatorm_"
naming scheme here.
Reviewed-by: Lyude
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 10 +--
During watermarks calculations, this value is used in 3 different
places. Only one of them was not using a hardcoded 4. Move the code up
so everybody can benefit from the actual value.
This should only help on situations with Y tiling + 90/270 rotation +
1 or 2 bpp or NV12.
Signed-off-by: Paulo
Now that this code is part of the compute stage we can return -EINVAL
to prevent the modeset instead of giving a WARN and trying anyway.
Reported-by: Lyude
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a
According to BSpec, it's the "core CPUs" that need the code, which
means SKL and KBL, but not BXT.
I don't have a KBL to test this patch on it.
v2: Only SKL should have I915_SAGV_NOT_CONTROLLED.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 14 ++
;drm/i915/skl: Update watermarks for Y tiling")
Cc: sta...@vger.kernel.org
Cc: Tvrtko Ursulin
Reviewed-by: Lyude
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_p
ossibility that 0fda65680e92 matched our
specification at that time, and then later the specification changed.
v2: Try to add a "Fixes" tag (Maarten).
Fixes: 0fda65680e92 ("drm/i915/skl: Update watermarks for Y tiling")
Cc: sta...@vger.kernel.org
Cc: Tvrtko Ursulin
Reviewed-by:
tform.
v2: Move I915_SAGV_NOT_CONTROLLED to the new function (Lyude).
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 5 ++---
drivers/gpu/drm/i915/intel_pm.c | 22 ++
2 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm
Lyude
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2e6099b..9edc8ce 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu
sanitizing implementation from the WA implementation and
fix the WA implementation.
v2: Add Fixes tag (Maarten).
Fixes: 367294be7c25 ("drm/i915/gen9: Add 2us read latency to WM level")
Cc: sta...@vger.kernel.org
Cc: Vandana Kannan
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
cc had "gone
> wild trimming undefined code" :( This version acheives a rather more
> modest (but still worthwhile) gain of ~550 bytes.
>
> Signed-off-by: Dave Gordon
> Original-idea-by: Chris Wilson
> Cc: Chris Wilson
> Cc: Zanoni, Paulo R
Reviewed-by: Paulo
Em Sex, 2016-09-09 às 13:30 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
>
> This patch make changes to use linetime latency instead of allocated
> DDB size during plane watermark calculation in switch case, This is
> required to implement new DDB allocation algorithm.
>
> In New Algorith
Hi
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
>
> This patch adds support to decode system memory bandwidth
> which will be used for arbitrated display memory percentage
> calculation in GEN9 based system.
This is not a complete review of this patch since I
Em Sex, 2016-09-09 às 13:30 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
>
> This patch make use of plane_wm variable directly instead of passing
> skl_plane_wm struct. this way reduces number of argument requirement
> in watermark calculation functions.
>
> It also gives more freedom of
is needed? This
way we'll be able to discuss & merge the others before.
Thanks,
Paulo
>
>
> agree, out_ variable should not be local variables.
> If you think above points can be addressed, let me know, will update
> patches accordingly.
>
> thanks,
> -Mahesh
&
Hi
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
First of all, good catch with this patch!
>
> This patch changes Watermak calculation to fixed point calculation.
> Problem with current calculation is during plane_blocks_per_line
> calculation we divide interm
Hi
Lots of nitpicking in my review. Feel free to disagree with them.
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
>
> This patch adds IPC support for platforms. This patch enables IPC
> only for BXT platform as for SKL recommendation is to keep is
> disabled
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
>
> It implements the WA to enable IDLE_WAKEMEM bit of CHICKEN_DCPR_1
> register for Broxton platform. When IPC is enabled & Y-tile is
> enabled in any of the enabled plane, above bit should be set.
> Without this WA
Em Qua, 2016-09-14 às 17:24 +0530, Kumar, Mahesh escreveu:
> From: Mahesh Kumar
>
> This patch enables Transition WM for SKL+ platforms.
>
> Transition WM are used if IPC is enabled, to decide, number of blocks
> to be fetched before reducing the priority of display to fetch from
> memory.
>
>
Em Qua, 2016-09-21 às 11:22 -0700, Rodrigo Vivi escreveu:
> Avoid any kind of GuC handling if GuC is not supported
> on a giving platform.
>
> Besides being useless handling, our driver needs
> to be smarter than the user trying to use an invalid paramenter.
So the problem is when a platform does
Em Qui, 2016-09-22 às 15:13 +0530, Mahesh Kumar escreveu:
> Hi,
>
>
> On Thursday 22 September 2016 01:53 AM, Paulo Zanoni wrote:
> >
> > Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu:
> > >
> > > From: Mahesh Kumar
> > >
>
5.
If we conclude our CI system doesn't include these machines:
Reviewed-by: Paulo Zanoni
>
> BR,
> Jani.
>
> Jani Nikula (5):
> drm/i915/skl: drop workarounds for A0 and B0 revisions
> drm/i915/skl: drop workarounds for C0 revision
> drm/i915/skl: d
We just removed the implementation for all the pre-production
workarounds, so now tell the user that we expect his machine to not
work properly. Also convert this to DRM_ERROR so we can more easily
spot these problems in bug reports and CI/QA runs.
Cc: Jani Nikula
Signed-off-by: Paulo Zanoni
Em Qua, 2016-09-14 às 09:40 +0100, ch...@chris-wilson.co.uk escreveu:
> On Tue, Sep 13, 2016 at 03:21:48PM +0300, Mika Kuoppala wrote:
> >
> > Mika Kuoppala writes:
> > >
> > > "Zanoni, Paulo R" writes:
> > > >
> > > > >
> > > > > +#if IS_ENABLED(CONFIG_LOCKDEP)
> > > > > + GEM_BUG_ON(!!l
tform.
v2: Move I915_SAGV_NOT_CONTROLLED to the new function (Lyude).
Cc: sta...@vger.kernel.org
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_display.c | 5 ++---
drivers/gpu/drm/i915/intel_pm.c | 22 ++
2 files change
sanitizing implementation from the WA implementation and
fix the WA implementation.
v2: Add Fixes tag (Maarten).
Fixes: 367294be7c25 ("drm/i915/gen9: Add 2us read latency to WM level")
Cc: sta...@vger.kernel.org
Cc: Vandana Kannan
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
x27;t seem to be
calling any functions whose name start with a platform name, so the
"intel_" naming scheme seems make more sense than the "firstplatorm_"
naming scheme here.
Cc: sta...@vger.kernel.org
Reviewed-by: Lyude
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zan
According to BSpec, it's the "core CPUs" that need the code, which
means SKL and KBL, but not BXT.
I don't have a KBL to test this patch on it.
v2: Only SKL should have I915_SAGV_NOT_CONTROLLED.
Cc: sta...@vger.kernel.org
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo
t
push the series so we can move to the next watermarks patches that are
waiting.
Thanks for all the reviews and comments,
Paulo
Paulo Zanoni (9):
drm/i915: SAGV is not SKL-only, so rename a few things
drm/i915: introduce intel_has_sagv()
drm/i915/kbl: KBL also needs to run the SAGV code
...@vger.kernel.org
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 56 +++--
1 file changed, 32 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ee561c2
;drm/i915/skl: Update watermarks for Y tiling")
Cc: sta...@vger.kernel.org
Cc: Tvrtko Ursulin
Reviewed-by: Lyude
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --
: Lyude
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0957f5f..45a5f22 100644
--- a/drivers/gpu/drm/i915/inte
Now that this code is part of the compute stage we can return -EINVAL
to prevent the modeset instead of giving a WARN and trying anyway.
v2:
- Fix typo (Paul Menzel).
- Add MISSING_CASE() (Ville, Maarten).
Reported-by: Lyude
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
ude
Reviewed-by: Maarten Lankhorst
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 39 +++
1 file changed, 15 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a7f5f7f..a6ae7b
Em Seg, 2016-09-26 às 13:20 +, Patchwork escreveu:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915: add a few missing
> platform tags to workaround tags
> URL : https://patchwork.freedesktop.org/series/12925/
> State : warning
>
> == Summary ==
>
> Series 12925v1 Ser
Em Seg, 2016-09-26 às 15:07 +0300, Jani Nikula escreveu:
> Cc: Paulo Zanoni
> Signed-off-by: Jani Nikula
Reviewed-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 2 files changed, 2 insertio
Em Qui, 2016-09-22 às 21:49 +, Patchwork escreveu:
> == Series Details ==
>
> Series: SKL/KBL watermark fixes (rev3)
> URL : https://patchwork.freedesktop.org/series/12082/
> State : warning
>
> == Summary ==
>
> Series 12082v3 SKL/KBL watermark fixes
> https://patchwork.freedesktop.org/ap
+ if (intel_fbc_is_active(dev_priv) &&
> + INTEL_GEN(dev_priv) >= 7)
Reviewed-by: Paulo Zanoni
I'll push this patch soon. Thanks for the patch!
> seq_printf(m, "Compressing: %s\n",
> yesno(I915_READ(FBC_STATUS2
gger a change in DDB
partitioning.
Fixes: 05a76d3d6ad1 ("drm/i915/skl: Ensure pipes with changed wms get
added to the state")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97888
Cc: Lyude
Cc: Mike Lothian
Cc: sta...@vger.kernel.org
Reported-and-bisected-by: Mike Lothia
-and-bisected-by: Mike Lothian
Reviewed-by: Lyude
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 37 -
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index
lla: https://bugs.freedesktop.org/show_bug.cgi?id=97596
Bugzilla:
https://www.phoronix.com/scan.php?page=news_item&px=Intel-Skylake-Multi-Screen-Woes
Cc: sta...@vger.kernel.org
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletio
Em Ter, 2016-10-04 às 14:37 -0300, Paulo Zanoni escreveu:
> With the previous code we were only recomputing the DDB partitioning
> for the CRTCs included in the atomic commit, so any other active
> CRTCs
> would end up having their DDB registers zeroed. In this patch we make
>
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> This option allows us to manually control the SAGV at module load
> time.
> This can be useful in situations such as trying to debug watermark
> changes, since enabled SAGV + incorrect watermarks = total GPU
> annihilation.
I'm not a huge fan of
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> First part of cleaning up all of the skl watermark code. This moves
> the
> structures for storing the ddb allocations of each pipe into
> intel_crtc_state, along with moving the structures for storing the
> current ddb allocations active on hard
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Next part of cleaning up the watermark code for skl. This is easy,
> since
> it seems that we never actually needed to keep track of the linetime
> in
> the skl_wm_values struct anyway.
Reviewed-by: Paulo Zanoni
>
>
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Having skl_wm_level contain all of the watermarks for each plane is
> annoying since it prevents us from having any sort of object to
> represent a single watermark level, something we take advantage of in
> the next commit to cut down on all of
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Now that we've make skl_wm_levels make a little more sense, we can
> remove all of the redundant wm information. Up until now we'd been
> storing two copies of all of the skl watermarks: one being the
> skl_pipe_wm structs, the other being the gl
-10-05 at 15:50 +0200, Daniel Vetter wrote:
> >
> > On Thu, Sep 22, 2016 at 04:55:07PM +0000, Vivi, Rodrigo wrote:
> > >
> > > On Wed, 2016-09-21 at 18:00 -0300, Paulo Zanoni wrote:
> > > >
> > > > Em Qua, 2016-09-21 às 11:22 -0700, Rodrigo
Em Qua, 2016-10-05 às 16:50 -0700, Anusha Srivatsa escreveu:
> i915.enable_guc_loading/submission=2 forces the usage of GuC.
> For platforms that do not have a GuC, asking the kernel to
> use a GuC should not result in an error state. Do extra checks
> to see if the platform even has a GuC or not,
One day this function will have a complete implementation which won't
be a simple one-line return, so avoid unnecessarily calling it when we
can just store the value in a variable.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 8 ++--
1 file changed, 6 insertions(
Luckily, the necessary adjustments for when we're using the scaler are
exactly the same as the ones needed on ILK+, so just reuse the
function we already have.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
We used to call skl_pipe_pixel_rate(), which used to be a single
one-line return, but now we're calling ilk_pipe_pixel_rate() which is
not as simple, so it's better to just call it once and store the
computed value for reuse.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/inte
Luckily, the necessary adjustments for when we're using the scaler are
exactly the same as the ones needed on ILK+, so just reuse the
function we already have.
v2: Invert the patch order so stable backports get easier.
Cc: sta...@vger.kernel.org
Signed-off-by: Paulo Zanoni
---
drivers/gp
bugs.freedesktop.org/show_bug.cgi?id=96828
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97450
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97830
Cc: sta...@vger.kernel.org
Cc: Mahesh Kumar
Cc: Lyude
Cc: Dhinakaran Pandiyan
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/
We want to look at the mode that we're actually going to set. All the
other display checks for interlaced flags also look at adjusted_mode.
Cc: Lyude
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver
ge indentation, add back blank lines (Paulo)
(but I do have to add that the way you changed it was not the way I had
in mind, please see below)
>
> There's a bug for this, please find it and reference it.
>
> >
> > take on the implemenation.
> > Cc: Paulo Zanon
Pandiyan
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 49 ++---
1 file changed, 41 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fe6c1c6..13bd974 100644
--- a/drivers/gpu
tions active on hardware into intel_crtc.
>
> Changes since v1:
> - Don't replace alloc->start = alloc->end = 0;
>
> Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
> Reviewed-by: Maarten Lankhorst
> Cc: Ville Syrjälä
> Cc: Paulo Zanoni
> ---
> driver
wn on all of the copy paste code in here.
>
> Changes since v1:
> - Style nitpicks
> - Fix accidental usage of i vs. PLANE_CURSOR
> - Split out skl_pipe_wm_active_state simplification into separate
> patch
>
> Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
> Revi
parameter to something more meaningful.
Reviewed-by: Paulo Zanoni
>
> (adding Maarten's reviewed-by since this is just a split-up version
> of one
> of the previous patches)
>
> Signed-off-by: Lyude
> Reviewed-by: Maarten Lankhorst
> Cc: Ville Syrjäl
s worth trying to teach the coding style that's used by
everybody so the next patches all come in the expected format.
Anyway, I suppose we could amend this fix while applying the patch?
If someone fixes that while applying, we can add:
Reviewed-by: Paulo Zanoni
> if (!HAS_GUC_UCODE(
Em Qui, 2016-10-13 às 11:04 -0700, Dhinakaran Pandiyan escreveu:
> According to BSpec, cdclk has to be not less than 432 MHz with DP
> audio
> enabled, port width x4, and link rate HBR2 (5.4 GHz)
This is just for pre-production hardware, and we don't implement
workarounds for pre-prod.
A quick r
nges since v1:
> > - Fixup skl_write_wm_level()
> > - Fixup skl_wm_level_from_reg_val()
> > - Don't forget to copy *active to intel_crtc->wm.active.skl
> >
> > Signed-off-by: Lyude
> > Reviewed-by: Maarten Lankhorst
> > Cc: Ville Syrjälä
>
Em Qui, 2016-10-13 às 17:04 -0300, Paulo Zanoni escreveu:
> Em Qui, 2016-10-13 às 15:39 +0200, Maarten Lankhorst escreveu:
> >
> > Op 08-10-16 om 02:11 schreef Lyude:
> > >
> > >
> > > Now that we've make skl_wm_levels make a little more sense, we
Cc: Ville Syrjälä
> Cc: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_pm.c | 57
> +
> 1 file changed, 57 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 5cb537c..9e5
gt; need this function to be reusable for the next patch.
>
> Signed-off-by: Lyude
> Cc: Maarten Lankhorst
> Cc: Ville Syrjälä
> Cc: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_drv.h | 2 ++
> drivers/gpu/drm/i915/intel_pm.c | 27 +-
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> Helper we're going to be using for implementing verification of the
> wm
> levels in skl_verify_wm_level().
>
> Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
> Cc: Maarten Lankhorst
> Cc: Ville S
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> Thanks to Paulo Zanoni for indirectly pointing this out.
>
> Looks like we never actually added any code for checking whether or
> not
> we actually wrote watermark levels properly. Let's fix that.
Thanks for doing this!
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
Bikesheding: it would be nice to write a commit message explaining why,
even if the message just tells the user to read
Documentation/CodingStyle.
Reviewed-by: Paulo Zanoni
> Signed-off-by: Lyude
> Cc: Maarten Lankhorst
> Cc: Vill
Em Qui, 2016-10-13 às 18:15 -0300, Paulo Zanoni escreveu:
> Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> >
> > Thanks to Paulo Zanoni for indirectly pointing this out.
> >
> > Looks like we never actually added any code for checking whether or
> > no
BC is disabled, so it won't force TearFree.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index b8ba79c..7101880 10
so it's not something the users can
perceive, it just affects power consumption numbers on properly
configured machines.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/inte
automatic workaround disable during
dirtyfb/sw_finish.
Thanks,
Paulo
Paulo Zanoni (4):
drm/i915/fbc: update busy_bits even for GTT and flip flushes
drm/i915/fbc: sanitize i915.enable_fbc during FBC init
drm/i915: opt-out CPU and WC mmaps from FBC
drm/i915/fbc: enable FBC on SKL too
drive
checking.
- Restric to Gen 9.
Cc: Rodrigo Vivi
Cc: Daniel Vetter
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h | 9 +
drivers/gpu/drm/i915/i915_gem.c | 19 +++---
drivers/gpu/drm/i915/intel_display.c | 1 +
drivers/g
i915.enable_fbc=-1.
This fixes a bug that happens on SKL with FBC enabled: if you run
lightdm, your login/password won't appear as you type on your
keyboard. You have to move the mouse over the input box for them to be
displayed.
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
src/sna/sna_dr
please see:
commit a98ee79317b4091cafb502b4ffdbbbe1335e298c
Author: Paulo Zanoni
Date: Tue Feb 16 18:47:21 2016 -0200
drm/i915/fbc: enable FBC by default on HSW and BDW
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 3 ++-
1 file changed, 2 insertions(+),
still not sending dirtyfb or sw_finish calls, so
the Kernel keeps the workaround enabled since it doesn't know we're
properly behaving. So issue one dirtyfb call each time we create a
framebuffer, making sure the Kernel sets the FB_MMAP_WA_DISABLE flag.
Cc: Chris Wilson
Signed-off-by: Pa
BC is disabled, so it won't force TearFree.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index b8ba79c..7101880 10
Hi
The Kernel patches are mostly the same, but with the review
suggestions implemented. The DDX patch is new and should really help
things now.
Thanks,
Paulo
Paulo Zanoni (4):
drm/i915/fbc: update busy_bits even for GTT and flip flushes
drm/i915/fbc: sanitize i915.enable_fbc during FBC init
so it's not something the users can
perceive, it just affects power consumption numbers on properly
configured machines.
Testcase: igt/kms_frontbuffer_tracking/*fbc*onoff* (see above)
Reviewed-by: Daniel Vetter
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 7 ---
1 fi
j checking.
- Restric to Gen 9.
v3:
- Add missing parameter documentation (kbuild test robot).
- Convert flags from enum to defines (Jani).
- Make it SKL-only (Daniel).
Cc: Rodrigo Vivi
Cc: Daniel Vetter
Cc: Chris Wilson
Acked-by: Rodrigo Vivi (v2)
Signed-off-by: Paulo Zanoni
---
drivers/gp
on them too to make sure we fix FBC on them.
Also, it seems KBL is passing the tests.
If you reached this commit through git bisect or if you just want more
information about FBC, please see:
commit a98ee79317b4091cafb502b4ffdbbbe1335e298c
Author: Paulo Zanoni
Date: Tue Feb 16 18:4
.
This should help fix the SKL bug where nothing happens when you type
your username/password on lightdm.
This patch was originally pasted on an email by Chris and converted to
an actual git patch by Paulo.
Cc: # 4.6
Cc: Chris Wilson
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h
Now with the suggestion from Chris instead of the old workaround. We don't need
new DDX patches anymore, but now we need new IGT patches.
Chris Wilson (1):
drm/i915: use ORIGIN_CPU for frontbuffer invalidation on WC mmaps
Paulo Zanoni (3):
drm/i915/fbc: update busy_bits even for GTT and
so it's not something the users can
perceive, it just affects power consumption numbers on properly
configured machines.
Testcase: igt/kms_frontbuffer_tracking/*fbc*onoff* (see above)
Reviewed-by: Daniel Vetter
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 7 ---
1 fi
does this sort of mix is the multidraw subtest.
Signed-off-by: Paulo Zanoni
---
tests/kms_frontbuffer_tracking.c | 12
1 file changed, 12 insertions(+)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index f37de6d..89e6ea8 100644
--- a/
to avoid future related problems.
v2: New commit message.
Signed-off-by: Paulo Zanoni
---
tests/kms_frontbuffer_tracking.c | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_t
501 - 600 of 3545 matches
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