the hw was actually still using it
v4: Unwrapped context unpin to allow calling without a request
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 9
On 25/11/2015 01:11, Dai, Yu wrote:
On 11/24/2015 08:23 AM, Nick Hoath wrote:
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been saved.
Now that the context is pinned until later in the request/context
ngine cleanup from context_free as it
was getting unwieldy
Corrected locking (Dave Gordon)
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c
On 25/11/2015 19:29, Dai, Yu wrote:
From: Alex Dai
When GuC Work Queue is full, driver will wait GuC for avaliable
available
space by delaying 1ms. The wait needs to be out of spinlockirq /
unlock. Otherwise, lockup happens because jiffi
On 26/11/2015 08:48, Daniel Vetter wrote:
On Wed, Nov 25, 2015 at 05:02:44PM +0200, Mika Kuoppala wrote:
Nick Hoath writes:
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been written back to by the GPU
ppala)
Added explanation of the GuC hang that this fixes (Daniel Vetter)
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 3 +
drivers/gp
ppala)
Added explanation of the GuC hang that this fixes (Daniel Vetter)
v7: Removed extra per request pinning from ring reset code (Alex Dai)
Added forced ring unpin/clean in error case in context free (Alex Dai)
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc:
cases where the codepaths leaked (Mika Kuoppala)
NULL'd last_context in reset case - there was a pointer leak
if someone did reset->close context.
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
Cc: Mika Kuoppala
---
dr
lized() must
be simple and inline' patch now using ring->dev as an initialised
flag.
Rename the cleanup function to reflect what it actually does.
Also clean up some very annoying whitespace issues at the same time.
Signed-off-by: Nick Hoath
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: David G
er_unload (Chris Wilson)
Signed-off-by: Nick Hoath
Reviewed-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_dma.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 23 -
e fact that the HWSP and the default context are the different offsets
within the same object.
v2: Also make the fix in i915_load_modeset_init, not just
in i915_driver_unload (Chris Wilson)
v3: Folded in Dave Gordon's fix for HWSP kunmap issues.
Signed-off-by: Nick Hoath
Reviewed-by: Chr
Reviewed-by: Nick Hoath
On 16/12/2015 18:36, Gordon, David S wrote:
We set up engines in forwards order, so some things (notably the
default context) are "owned" by engine 0 (the render engine, aka "RCS").
For symmetry and to make sure such shared objects don't disap
llary that only one context doesn't belong to any
file.
Using pointers like this to provide 'magic' secondary state information
just adds to the fragility of the driver.
So:
Reviewed-by: Nick Hoath
to the original patch.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
() no longer
needs 'dev_priv'.
Reviewed-by: Nick Hoath
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 47 +++--
1 file changed, 22 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drive
mably
copypasted from legacy ringbuffer version at creation.
Reviewed-by: Nick Hoath
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/i915_gem.c | 5 -
drivers/gpu/drm/i915/intel_lrc.c | 10 ++
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm
e fact that the HWSP and the default context are the different offsets
within the same object.
v2: Also make the fix in i915_load_modeset_init, not just
in i915_driver_unload (Chris Wilson)
v3: Folded in Dave Gordon's fix for HWSP kunmap issues.
v4: Rebase over Dave Gordon's various cl
cases where the codepaths leaked (Mika Kuoppala)
NULL'd last_context in reset case - there was a pointer leak
if someone did reset->close context.
v9: Rebase over "Fix context/engine cleanup order"
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David G
omment was required.
And this patch has been held up two weeks just for a better comment.
Peter.
.Dave.
And what if the next reserved space is not for RC6?
But, I have not actual objection to the patch.
Peter.
Tested-by: Nick Hoath
Reviewed-by: Nick Hoath
--
Peter Antoin
On 05/05/2016 16:04, Dave Gordon wrote:
On 05/05/2016 15:02, Antoine, Peter wrote:
The attached version still does not explain that the WOPCM_TOP is to tell the
GuC not to use that space.
That's NOT what WOPCM_TOP means. The GuC is allowed to use the space up
to the value stored in the GUC_WO
Updates to Skylake firmware filename & support for loading
Broxton firmware.
Nick Hoath (1):
drm/i915/guc: Add Broxton GuC firmware loading support
Tom O'Rourke (1):
drm/i915/guc: Use major_minor version for filename
drivers/gpu/drm/i915/intel_guc_loader.c | 9 -
1 file c
be used by default without
some testing.
Issue: VIZ-7713
Signed-off-by: Tom O'Rourke
Signed-off-by: Nick Hoath
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_guc_loader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c
b/drive
Issue: VIZ-7772
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_guc_loader.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c
b/drivers/gpu/drm/i915/intel_guc_loader.c
index 46b01d7..d122e74 100644
--- a/drivers/gpu/drm/i915
On 09/05/2016 08:53, Patchwork wrote:
== Series Details ==
Series: drm/i915/guc: GuC firmware loading updates
URL : https://patchwork.freedesktop.org/series/6818/
State : warning
== Summary ==
Series 6818v1 drm/i915/guc: GuC firmware loading updates
http://patchwork.freedesktop.org/api/1.0/s
On 06/05/2016 13:18, Gordon, David S wrote:
On 06/05/16 10:37, Nick Hoath wrote:
On 05/05/2016 16:04, Dave Gordon wrote:
On 05/05/2016 15:02, Antoine, Peter wrote:
The attached version still does not explain that the WOPCM_TOP is to
tell the GuC not to use that space.
That's NOT
Ursulin
Reviewed-by: Tvrtko Ursulin (v5)
Signed-off-by: Tvrtko Ursulin
Reviewed-by: Nick Hoath (v6)
---
drivers/gpu/drm/i915/i915_gem.c| 5 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/i915_params.c | 14 +++-
drivers/gpu/drm/i915
eased/made continuously as this is
an expensive process.
Nick Hoath (4):
drm/i915: Unify execlist and legacy request life-cycles
drm/i915: Improve dynamic management/eviction of lrc backing objects
drm/i915: Add the CPU mapping of the hw context to the pinned items.
drm/i915: Only update ri
Shovel all context related objects through the active queue and obj
management.
- Added callback in vma_(un)bind to add CPU (un)mapping at same time
if desired
- Inserted LRC hw context & ringbuf to vma active list
Issue: VIZ-4277
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_d
Pin the hw ctx mapping so that it is not mapped/unmapped per bb
when doing GuC submission.
Issue: VIZ-4277
Cc: David Gordon
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 --
drivers/gpu/drm/i915/i915_drv.h | 4 ++-
drivers/gpu/drm/i915/intel_lrc.c| 56
We now only need to update the address of the ringbuf object in the
hw context when it is pinned, and the hw context is first CPU mapped
Issue: VIZ-4277
Cc: David Gordon
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_lrc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion
pin leaks
Issue: VIZ-4277
Signed-off-by: Thomas Daniel
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_drv.h | 6 +++
drivers/gpu/drm/i915/i915_gem.c | 67 +--
drivers/gpu/drm/i915/i915_irq.c | 81 +
drivers
On 14/10/2015 15:42, Dave Gordon wrote:
On 13/10/15 12:36, Chris Wilson wrote:
On Tue, Oct 13, 2015 at 01:29:56PM +0200, Daniel Vetter wrote:
On Fri, Oct 09, 2015 at 06:23:50PM +0100, Chris Wilson wrote:
On Fri, Oct 09, 2015 at 07:18:21PM +0200, Daniel Vetter wrote:
On Fri, Oct 09, 2015 at 10
On 08/10/2015 14:35, Chris Wilson wrote:
On Wed, Oct 07, 2015 at 06:05:46PM +0200, Daniel Vetter wrote:
On Tue, Oct 06, 2015 at 03:52:02PM +0100, Nick Hoath wrote:
Shovel all context related objects through the active queue and obj
management.
- Added callback in vma_(un)bind to add CPU (un
On 19/10/2015 10:48, Daniel Vetter wrote:
On Fri, Oct 16, 2015 at 03:42:53PM +0100, Nick Hoath wrote:
On 08/10/2015 14:35, Chris Wilson wrote:
On Wed, Oct 07, 2015 at 06:05:46PM +0200, Daniel Vetter wrote:
On Tue, Oct 06, 2015 at 03:52:02PM +0100, Nick Hoath wrote:
Shovel all context related
uest pin of context.
(Chris Wilson/Daniel Vetter)
Issue: VIZ-4277
Signed-off-by: Thomas Daniel
Signed-off-by: Nick Hoath
Cc: Daniel Vetter
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 23 -
drivers/gpu
Shovel all context related objects through the active queue and obj
management.
- Added callback in vma_(un)bind to add CPU (un)mapping at same time
if desired
- Inserted LRC hw context & ringbuf to vma active list
Issue: VIZ-4277
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_d
Renamed tmp variable to the more descriptive iir. (Daniel Vetter/
Thomas Daniel)
Issue: VIZ-4277
Signed-off-by: Nick Hoath
Cc: Daniel Vetter
Cc: David Gordon
Cc: Thomas Daniel
---
drivers/gpu/drm/i915/i915_irq.c | 46 -
1 file changed, 23 insertions
Break out common code from gen8_gt_irq_handler and put it in to
an always inlined function. gcc optimises out the shift at compile
time. (Thomas Daniel/Daniel Vetter/Chris Wilson)
Issue: VIZ-4277
Signed-off-by: Nick Hoath
Cc: Thomas Daniel
Cc: Daniel Vetter
Cc: Chris Wilson
---
drivers/gpu
We now only need to update the address of the ringbuf object in the
hw context when it is pinned, and the hw context is first CPU mapped
Issue: VIZ-4277
Signed-off-by: Nick Hoath
Cc: David Gordon
---
drivers/gpu/drm/i915/intel_lrc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion
Pin the hw ctx mapping so that it is not mapped/unmapped per bb
when doing GuC submission.
v2: Removed interim development extra mapping. (Daniel Vetter)
Issue: VIZ-4277
Signed-off-by: Nick Hoath
Cc: David Gordon
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/i915_debugfs.c | 14
x27;t released/made continuously as this is
an expensive process.
V2: Removed unecessary changes in the lrc retiring code path
Removed unecessary map/unmap
Nick Hoath (6):
drm/i195: Rename gt_irq_handler variable
drm/i915: Break out common code from gen8_gt_irq_handler
drm/i915: Unify execlis
refcount on the context also has to be extended to cover this
new longer period.
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 7 +
drivers/gpu/drm
on dev.
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 3 +
drivers/gpu/drm/i915/i
On 14/01/2016 07:20, Patchwork wrote:
== Summary ==
Built on 058740f8fced6851aeda34f366f5330322cd585f drm-intel-nightly:
2016y-01m-13d-17h-07m-44s UTC integration manifest
Test gem_ctx_basic:
pass -> FAIL (bdw-ultra)
Test failed to load - not patch related
Test
On 14/01/2016 11:36, Chris Wilson wrote:
On Wed, Jan 13, 2016 at 04:19:45PM +, Nick Hoath wrote:
+ if (ctx->engine[ring->id].dirty) {
+ struct drm_i915_gem_request *req = NULL;
+
+ /**
+* If there is already a request pend
On 14/01/2016 12:31, Chris Wilson wrote:
On Thu, Jan 14, 2016 at 11:56:07AM +, Nick Hoath wrote:
On 14/01/2016 11:36, Chris Wilson wrote:
On Wed, Jan 13, 2016 at 04:19:45PM +, Nick Hoath wrote:
+ if (ctx->engine[ring->id].dirty) {
+ struct drm_i915_gem_reques
On 14/01/2016 12:37, Nick Hoath wrote:
On 14/01/2016 12:31, Chris Wilson wrote:
On Thu, Jan 14, 2016 at 11:56:07AM +, Nick Hoath wrote:
On 14/01/2016 11:36, Chris Wilson wrote:
On Wed, Jan 13, 2016 at 04:19:45PM +, Nick Hoath wrote:
+ if (ctx->engine[ring->id]
ing->default_context, &req);
if (err) ...
NEW:
req = i915_gem_request_alloc(ring, NULL);
if (IS_ERR(req)) ...
Signed-off-by: Dave Gordon
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_drv.h| 6 ++--
d
each of the engine[] elements. This make refcounting more sensible
too, as we now have a refcount of one for the one pointer, rather than
a refcount of one but multiple pointers.
From an idea by Chris Wilson.
Signed-off-by: Dave Gordon
Reviewed-by: Nick Hoath
---
drivers/gpu/
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_debugfs.c | 15 +--
drivers/gpu/drm/i915/i915_gem.c | 6 ++
drivers/gpu/drm/i915/intel_lrc.c| 38 +
3 files changed, 24 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu
ev.
v11: Kick BAT rerun
Signed-off-by: Nick Hoath
Issue: VIZ-4277
Cc: Daniel Vetter
Cc: David Gordon
Cc: Chris Wilson
Cc: Alex Dai
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 3 +
drivers/gpu/drm/i915/i
depends on
i915_gem_cleanup_ringbuffer running before itself.
Signed-off-by: Tvrtko Ursulin
Issue: VIZ-4277
Cc: Chris Wilson
Cc: Nick Hoath
---
I cannot test this with GuC but it passes BAT with execlists
and some real world smoke tests.
---
drivers/gpu/drm/i915/i915_gem_context.c | 4
On 13/01/2016 10:06, Arun Siluvery wrote:
Required for WaEnablePreemptionGranularityControlByUMD:skl,bxt
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++
2 files changed, 8
On 13/01/2016 10:06, Arun Siluvery wrote:
Required for WaAllowUMDToModifyHDCChicken1:skl,bxt
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +
2 files changed, 7 insertions
On 13/01/2016 10:06, Arun Siluvery wrote:
Required for,
WaDisableObjectLevelPreemptionForTrifanOrPolygon:bxt
WaDisableObjectLevelPreemptionForInstancedDraw:bxt
WaDisableObjectLevelPreemtionForInstanceId:bxt
According to WA database these are only applicable for BXT:A0 but since
A0 and A1 shares
On 13/01/2016 10:06, Arun Siluvery wrote:
Required for WaDisableLSQCROPERFforOCL:bxt
According to WA database these are only applicable for BXT:A0 but since
A0 and A1 shares the same GT these are extended for A1 as well.
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers
On 13/01/2016 10:06, Arun Siluvery wrote:
Required for WaDisableLSQCROPERFforOCL:skl
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b
On 13/01/2016 10:06, Arun Siluvery wrote:
Per context preemption granularity control is only available from SKL:E0+
Cc: Dave Gordon
Signed-off-by: Arun Siluvery
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++
2 files changed, 1
On 21/01/2016 14:00, Arun Siluvery wrote:
Per context preemption granularity control is only available from SKL:E0+
Cc: Dave Gordon
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_ringbuffer.c | 10
On 21/01/2016 14:00, Arun Siluvery wrote:
This is mainly required for preemption.
Cc: Dave Gordon
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915
the same GT these are extended for A1 as well.
These are also required for SKL until B0 but not adding them because they
are pre-production steppings.
v2: use lower case in register defines (Nick)
Signed-off-by: Arun Siluvery
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_reg.h
ev.
v11: Kick BAT rerun
v12: Rebase
Signed-off-by: Nick Hoath
Issue: VIZ-4277
---
drivers/gpu/drm/i915/intel_lrc.c | 37 +++--
1 file changed, 15 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index
On 25/01/2016 18:19, Daniel Vetter wrote:
On Fri, Jan 22, 2016 at 02:25:27PM +, Nick Hoath wrote:
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been written back to by the GPU.
Now that the context is
g that a mapping can occur beyond
the 32bit limit. This allows backward compatibility and user space
drivers that haven't been enhanced to support these workarounds to
function.
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_drv.h | 6 ++
drivers/gpu/drm/i915/i9
On 17/03/2015 09:39, Imre Deak wrote:
From: Nick Hoath
Adds framework for Broxton HW WAs
Signed-off-by: Nick Hoath
Signed-off-by: Imre Deak
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff
On 17/03/2015 09:39, Imre Deak wrote:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_pm.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b89ab4d..3d4a7c3 100644
--- a/drivers/gpu
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_drv.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eb38cd1..eec271a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_ringbuffer.c | 9 +
2 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/i
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/
On 17/03/2015 13:06, Imre Deak wrote:
On ti, 2015-03-17 at 11:35 +0100, Daniel Vetter wrote:
On Tue, Mar 17, 2015 at 11:39:40AM +0200, Imre Deak wrote:
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_pm.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/d
This stepping isn't listed separately in the specs, so needs confirmation.
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eec271a..68fb41a 100644
On 20/03/2015 10:25, Deak, Imre wrote:
On Fri, 2015-03-20 at 09:05 +, Nick Hoath wrote:
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915
On 20/03/2015 10:37, Deak, Imre wrote:
On Fri, 2015-03-20 at 09:08 +, Nick Hoath wrote:
On 17/03/2015 13:06, Imre Deak wrote:
On ti, 2015-03-17 at 11:35 +0100, Daniel Vetter wrote:
On Tue, Mar 17, 2015 at 11:39:40AM +0200, Imre Deak wrote:
Signed-off-by: Imre Deak
---
drivers/gpu/drm
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_reg.h | 8 +
drivers/gpu/drm/i915/intel_pm.c | 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.c | 53 +++--
3 files changed, 41 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915
On 27/03/2015 12:00, Deak, Imre wrote:
v2:
- Make the condition to select between SKL and BXT consistent with the
corresponding condition in init_workarounds_ring (Nick)
Reviewed-by: Nick Hoath
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/intel_pm.c | 12 +++-
1 file
On 17/03/2015 09:39, Imre Deak wrote:
On GEN9+ per specification a NULL PIPE_CONTROL needs to be emitted
before any PIPE_CONTROL command with the VS_INVALIDATE flag set.
Signed-off-by: Imre Deak
Reviewed-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_lrc.c | 19 ++-
1
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h
On 17/03/2015 09:39, Imre Deak wrote:
From: Robert Beckett
Set TLBPF in TILECTL. This fixes an issue with BXT HW seeing
corrupted pte entries.
v2:
- move the workaround to bxt_init_clock_gating (imre)
Signed-off-by: Robert Beckett (v1)
Signed-off-by: Imre Deak
Reviewed-by: Nick Hoath
On 08/04/2015 14:10, Deak, Imre wrote:
On ke, 2015-04-08 at 14:04 +0100, Nick Hoath wrote:
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4
On 20/03/2015 10:33, Deak, Imre wrote:
On Fri, 2015-03-20 at 09:07 +, Nick Hoath wrote:
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
Bearing in mind having to revisit all these with the stepping checks:
Reviewed-by
On 08/04/2015 14:38, Nick Hoath wrote:
On 08/04/2015 14:10, Deak, Imre wrote:
On ke, 2015-04-08 at 14:04 +0100, Nick Hoath wrote:
On 17/03/2015 09:39, Imre Deak wrote:
From: Ben Widawsky
Signed-off-by: Ben Widawsky
Signed-off-by: Imre Deak
Reviewed-by: Nick Hoath
---
drivers/gpu
Where there were duplicate variables for the tail, context and ring (engine)
in the gem request and the execlist queue item, use the one from the request
and remove the duplicate from the execlist queue item.
Issue: VIZ-4274
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_debugfs.c | 4
Z-4274
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_lrc.c | 31 +--
drivers/gpu/drm/i915/intel_lrc.h | 5 -
2 files changed, 29 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 09d548d..
: Integrate this changeset with the removal of duplicate request/execlist
queue item members.
Signed-off-by: Nick Hoath
Issue: VIZ-4268
---
drivers/gpu/drm/i915/i915_gem.c | 7 ++--
drivers/gpu/drm/i915/intel_lrc.c| 67 +
drivers/gpu/drm/i915
: Integrate this changeset with the removal of duplicate request/execlist
queue item members.
Signed-off-by: Nick Hoath
Issue: VIZ-4268
---
drivers/gpu/drm/i915/i915_gem.c | 7 ++--
drivers/gpu/drm/i915/intel_lrc.c| 67 +
drivers/gpu/drm/i915
Move all remaining elements that were unique to execlists queue items
in to the associated request.
Signed-off-by: Nick Hoath
Issue: VIZ-4274
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 +++
drivers/gpu/drm/i915/i915_drv.h | 22 +
drivers/gpu/drm/i915/i915_gem.c
Z-4274
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_lrc.c | 31 +--
drivers/gpu/drm/i915/intel_lrc.h | 5 -
2 files changed, 29 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c8b3827..
Signed-off-by: Nick Hoath
Issue: VIZ-4274
---
drivers/gpu/drm/i915/intel_lrc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b6ec012..f3f1428 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b
an.
v2: merge intel_ctx_submit_request and drm_i915_gem_request, rebase changes &
add cover letter
Issue: VIZ-4274
Nick Hoath (5):
drm/i915: execlist request keeps ptr/ref to gem_request
drm/i915: Removed duplicate members from submit_request
drm/i915: Remove FIXME_lrc_ctx backpointer
Where there were duplicate variables for the tail, context and ring (engine)
in the gem request and the execlist queue item, use the one from the request
and remove the duplicate from the execlist queue item.
Issue: VIZ-4274
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/i915_debugfs.c | 4
On 12/11/2014 11:24, Chris Wilson wrote:
On Wed, Nov 12, 2014 at 10:53:26AM +, Nick Hoath wrote:
seq_putc(m, '\n');
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index afa9c35..0fe238c 100644
--- a/drivers/gpu/drm/i915/i915_d
From: Rafael Barbalho
Signed-off-by: Rafael Barbalho
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_pm.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d635d0a..f29e575 100644
--- a
From: Rafael Barbalho
Signed-off-by: Rafael Barbalho
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_pm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 32ff034..d635d0a 100644
--- a/drivers/gpu/drm
Signed-off-by: Nick Hoath
Cc: Rafael Barbalho
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b9f6b8c..115911a 100644
--- a/drivers/gpu/drm
description for TILECTL setting (JonB)
Cc: Peter Lawthers
Cc: Chris Harris
Cc: Jon Bloomfield
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_pm.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915
Nick Hoath (2):
drm/i915/bxt: Enable WaOCLCoherentLineFlush
drm/i915/bxt: Clean up bxt_init_clock_gating
Rafael Barbalho (2):
drm/i915/bxt: Enable WaVSRefCountFullforceMissDisable
drm/i915/bxt: Enable WaDSRefCountFullforceMissDisable
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu
On 29/06/2015 15:08, Mika Kuoppala wrote:
Hi,
Nick Hoath writes:
From: Rafael Barbalho
Signed-off-by: Rafael Barbalho
Signed-off-by: Nick Hoath
---
drivers/gpu/drm/i915/intel_pm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu
On 18/08/2015 15:31, Chris Wilson wrote:
On Tue, Aug 18, 2015 at 03:23:32PM +0100, Nick Hoath wrote:
Extend init/init_hw split to context init.
- Move context initialisation in to i915_gem_init_hw
- Move one off initialisation for render ring to
i915_gem_validate_context
river load time. This prevents the seqno
being reset on reinit (Chris Wilson)
Issue: VIZ-4798
Signed-off-by: Nick Hoath
Cc: Daniel Vetter
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h| 1 -
drivers/gpu/drm/i915/i915_gem.c| 18 ++--
drivers/gpu/drm/i915/i915_g
On 19/08/2015 13:37, Chris Wilson wrote:
On Wed, Aug 19, 2015 at 01:24:28PM +0100, Nick Hoath wrote:
Extend init/init_hw split to context init.
- Move context initialisation in to i915_gem_init_hw
- Move one off initialisation for render ring to
i915_gem_validate_context
river load time. This prevents
the seqno being reset on reinit (Chris Wilson)
v4: Set seqno back to ~0 - 0x1000 at start-of-day, and increment by 0x100
on reset.
This makes it obvious which bbs are which after a reset. (David Gordon
& John Harrison)
Rebase.
Issue: VIZ-4798
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