[Intel-gfx] [PATCH v5 0/8] All sort of cdclk stuff

This patch series rebases Ville's original cdclk patch series excluding the ones that has already been reviewed. http://lists.freedesktop.org/archives/intel-gfx/2014-November/055633.html The patches are rebased to the latest drm-intel-nightly. The major change to the original series is the patch

Re: [Intel-gfx] [PATCH v5 1/8] drm/i915: Cache current cdclk frequency in dev_priv

On Tue, 2015-06-02 at 18:17 +0300, Jani Nikula wrote: > On Tue, 02 Jun 2015, Mika Kahola wrote: > > From: Ville Syrjälä > > > > Rather that extracting the current cdclk freuqncy every time someone > > wants to know it, cache the current value and use that. VLV/CHV

[Intel-gfx] [PATCH v6 1/8] drm/i915: Cache current cdclk frequency in dev_priv

: Rebased to the latest v5: Removed spurious call to 'intel_update_cdclk(dev)' based on Damien Lespiau's comment Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahola Author:Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 24 +++- 1 file changed

[Intel-gfx] [PATCH v6 0/8] All sort of cdclk stuff

This patch series rebases Ville's original cdclk patch series excluding the ones that has already been reviewed. http://lists.freedesktop.org/archives/intel-gfx/2014-November/055633.html The patches are rebased to the latest drm-intel-nightly. The major change to the original series is the patch

[Intel-gfx] [PATCH v6 3/8] drm/i915: Unify ilk and hsw .get_aux_clock_divider

From: Ville Syrjälä ilk_get_aux_clock_divider() is now a subset of hsw_get_aux_clock_divider() so unify them. v2: Rebased to the latest v3: Rebased to the latest v4: Fix for patch style problems Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahola Author:Ville Syrjälä --- drivers

[Intel-gfx] [PATCH v6 8/8] drm/i915: HSW cdclk support

: Rebased to the latest v5: Reformatting 'haswell_modeset_global_pipes' function to support atomic state v6: Shuffling the patch order so the Broadwell CD clock patch can be applied before this Haswell CD clock patch v7: Fix for patch style problems Signed-off-by: Ville Syrjälä Signed-of

[Intel-gfx] [PATCH v6 4/8] drm/i915: Store max cdclk value in dev_priv

: Rebased to the latest v3: Rebased to the latest v4: Fix for patch style problems Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahola Author:Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_display.c | 20 +++- 2 files changed, 20

[Intel-gfx] [PATCH v6 7/8] drm/i915: BDW clock change support

ll CD clock change v7: Fix for patch style problems Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahola Author:Ville Syrjälä --- drivers/gpu/drm/i915/i915_reg.h | 2 + drivers/gpu/drm/i915/intel_display.c | 216 +-- 2 files changed, 208 inser

[Intel-gfx] [PATCH v6 2/8] drm/i915: Use cached cdclk value

From: Ville Syrjälä Rather than reading out the current cdclk value use the cached value we have tucked away in dev_priv. v2: Rebased to the latest v3: Rebased to the latest v4: Fix for patch style problems Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahola Author:Ville Syrjälä

[Intel-gfx] [PATCH v6 5/8] drm/i915: Don't enable IPS when pixel rate exceeds 95%

(Chris) v3: Compare against the max cdclk insted of the current cdclk v4: Rebased to the latest v5: Rebased to the latest v6: Fix for patch style problems Tested-by: Timo Aaltonen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83497 Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahol

[Intel-gfx] [PATCH v6 6/8] drm/i915: Add IS_BDW_ULX

From: Ville Syrjälä We need to tell BDW ULT and ULX apart. v2: Rebased to the latest v3: Rebased to the latest v4: Fix for patch style problems Signed-off-by: Ville Syrjälä Signed-off-by: Mika Kahola Author:Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 1 file changed, 3

[Intel-gfx] [PATCH] drm/i915: DP link training optimization

Reuse existing DP link training values i.e. voltage swing and pre-emphasis levels, if DP port that we are connected to hasn't changed. If we are unable to re-initialize DP link, the fallback is to reset the link training values, and restart. modified: intel_dp.c modified: intel_

[Intel-gfx] [PATCH] drm/i915: DP link training optimization

VBT. The fallback on both cases is to reset the link training parameters and restart. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 93 +++- drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 84 insertions(+), 10 deletions(-) diff

Re: [Intel-gfx] [PATCH 6/9] drm/i915: Check pixel clock when setting mode for DSI

On Fri, 2015-07-03 at 13:38 +0100, Chris Wilson wrote: > On Fri, Jul 03, 2015 at 02:35:54PM +0300, Mika Kahola wrote: > > It is possible the we request to have a mode that has > > higher pixel clock than our HW can support. This patch > > checks if requested pixel clock

Re: [Intel-gfx] [PATCH 1/9] drm/i915: Check pixel clock when setting mode for DP

On Fri, 2015-07-03 at 15:57 +0300, Ville Syrjälä wrote: > On Fri, Jul 03, 2015 at 02:35:49PM +0300, Mika Kahola wrote: > > It is possible the we request to have a mode that has > > higher pixel clock than our HW can support. This patch > > checks if requested pixel clock

[Intel-gfx] [PATCH v2 07/11] drm/i915: CRT pixel clock check

: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_crt.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 5d78c1f..6e29bce 100644 --- a/drivers/gpu

[Intel-gfx] [PATCH v2 04/11] drm/i915: LVDS pixel clock check

: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_lvds.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index cb634f4..5648295 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 03/11] drm/i915: HDMI pixel clock check

: - removed computation for max dot clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_hdmi.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 70bad5b..b85efaa 100644 --- a/drivers

[Intel-gfx] [PATCH v2 02/11] drm/i915: DisplayPort pixel clock check

. V2: - removed computation for max DOT clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 44f8a32..89a150d 100644 --- a/drivers/gpu

[Intel-gfx] [PATCH v2 01/11] drm/i915: Store max dotclock

Store max dotclock into dev_priv structure so we are able to filter out the modes that are not supported by our platforms. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 20 2 files changed, 21 insertions

[Intel-gfx] [PATCH v2 06/11] drm/i915: DSI pixel clock check

: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dsi.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 18dd7d7..2882978 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 09/11] drm/i915: DisplayPort-MST pixel clock check

MST. V2: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp_mst.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 585f0a4..5c65f5c 100644 --- a

[Intel-gfx] [PATCH v2 10/11] drm/i915: DVO pixel clock check

: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dvo.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index fd5e522..7afcfa4 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 11/11] drm/i915: Max DOT clock frequency to debugfs

Information on maximum supported DOT clock frequency to i915_frequency_info. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 23a69307

[Intel-gfx] [PATCH v2 05/11] drm/i915: SDVO pixel clock check

: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_sdvo.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 2c435a7..753b670 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 08/11] drm/i915: TV pixel clock check

: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_tv.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 8b9d325..0990f22 100644 --- a/drivers/gpu/drm/i915/intel_tv.c

[Intel-gfx] [PATCH v2 00/11] Check pixel clock when setting mode

playPort, HDMI, LVDS, DVO, SDVO, DSI, CRT, TV, and DP-MST. V2: - The maximum DOT clock frequency is added to debugfs i915_frequency_info. - max dotclock cached in dev_priv structure - moved computation of max dotclock to 'intel_display.c' Mika Kahola (11): drm/i915: Store max dotclock

Re: [Intel-gfx] [PATCH v2 01/11] drm/i915: Store max dotclock

On Thu, 2015-07-30 at 08:00 +0100, Chris Wilson wrote: > On Thu, Jul 30, 2015 at 09:49:28AM +0300, Mika Kahola wrote: > > Store max dotclock into dev_priv structure so we are able > > to filter out the modes that are not supported by our > > platforms. > > >

Re: [Intel-gfx] [PATCH v2 03/11] drm/i915: HDMI pixel clock check

On Thu, 2015-07-30 at 07:54 +0100, Chris Wilson wrote: > On Thu, Jul 30, 2015 at 09:49:30AM +0300, Mika Kahola wrote: > > It is possible the we request to have a mode that has > > higher pixel clock than our HW can support. This patch > > checks if requested pixel clock

Re: [Intel-gfx] [PATCH v2 06/11] drm/i915: DSI pixel clock check

On Thu, 2015-07-30 at 07:52 +0100, Chris Wilson wrote: > On Thu, Jul 30, 2015 at 09:49:33AM +0300, Mika Kahola wrote: > > It is possible the we request to have a mode that has > > higher pixel clock than our HW can support. This patch > > checks if requested pixel clock

[Intel-gfx] [PATCH v3 00/11] Check pixel clock when setting mode

frequency is limited to 90% of the 2X CD clock frequency as we have on option to use double wide mode - cleanup Mika Kahola (11): drm/i915: Store max dotclock drm/i915: DisplayPort pixel clock check drm/i915: HDMI pixel clock check drm/i915: LVDS pixel clock check drm/i915: SDVO pix

[Intel-gfx] [PATCH v3 03/11] drm/i915: HDMI pixel clock check

: - removed computation for max dot clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_hdmi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 70bad5b

[Intel-gfx] [PATCH v3 01/11] drm/i915: Store max dotclock

older gens - for Cherryview the max dot clock frequency is limited to 95% of the max CD clock frequency - for gen2 and gen3 the max dot clock limit is set to 90% of the 2X max CD clock frequency Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3 08/11] drm/i915: TV pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_tv.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 8b9d325..beeed25

[Intel-gfx] [PATCH v3 06/11] drm/i915: DSI pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dsi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 18dd7d7..3def6f9

[Intel-gfx] [PATCH v3 09/11] drm/i915: DisplayPort-MST pixel clock check

MST. V2: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp_mst.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c

[Intel-gfx] [PATCH v3 07/11] drm/i915: CRT pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_crt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 5d78c1f..40ded5f

[Intel-gfx] [PATCH v3 11/11] drm/i915: Max DOT clock frequency to debugfs

Information on maximum supported DOT clock frequency to i915_frequency_info. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 23a69307

[Intel-gfx] [PATCH v3 04/11] drm/i915: LVDS pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_lvds.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index cb634f4

[Intel-gfx] [PATCH v3 02/11] drm/i915: DisplayPort pixel clock check

. V2: - removed computation for max DOT clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index

[Intel-gfx] [PATCH v3 05/11] drm/i915: SDVO pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_sdvo.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 2c435a7

[Intel-gfx] [PATCH v3 10/11] drm/i915: DVO pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dvo.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index fd5e522..2bfc51c

[Intel-gfx] [BUGFIX] drm/i915: Fix for VBT expected size

Depending on the VBT BDB version the maximum size can be up to 38 bytes. This fix increases the maximum of the VBT expected size from 33 bytes to 38 bytes and by doing so cures the kernel hang on BSW box. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_bios.h | 2 +- 1 file changed

Re: [Intel-gfx] [BUGFIX] drm/i915: Fix for VBT expected size

On Wed, 2015-08-12 at 15:43 +0200, Daniel Vetter wrote: > On Wed, Aug 12, 2015 at 04:42:53PM +0300, Jani Nikula wrote: > > On Wed, 12 Aug 2015, Daniel Vetter wrote: > > > On Tue, Aug 11, 2015 at 04:49:33PM +0300, Mika Kahola wrote: > > >> Depending on the VB

Re: [Intel-gfx] [PATCH v3 01/11] drm/i915: Store max dotclock

On Wed, 2015-08-12 at 22:01 +0300, Ville Syrjälä wrote: > On Wed, Aug 12, 2015 at 08:30:23PM +0300, Ville Syrjälä wrote: > > On Fri, Jul 31, 2015 at 03:13:50PM +0300, Mika Kahola wrote: > > > Store max dotclock into dev_priv structure so we are able > > > to filter

[Intel-gfx] [PATCH v4 01/11] drm/i915: Store max dotclock

() the rounding method changed from round up to round down when computing max dotclock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 19 +++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v4 02/11] drm/i915: DisplayPort pixel clock check

. V2: - removed computation for max DOT clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk renamed as max_dotclk Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c

[Intel-gfx] [PATCH v4 06/11] drm/i915: DSI pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk - moved dot clock checking inside 'if (fixed_mode)' Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dsi.c | 3 +++ 1 file changed, 3 insertion

[Intel-gfx] [PATCH v4 04/11] drm/i915: LVDS pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - moved supported dotclock check from mode_valid() to intel_lvds_init() Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_lvds.c | 15 +++ 1 file changed, 11 insertions(+), 4 deletions

[Intel-gfx] [PATCH v4 03/11] drm/i915: HDMI pixel clock check

: - removed computation for max dot clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk - check for stereo mode added Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_hdmi.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers

[Intel-gfx] [PATCH v4 00/11] Check pixel clock when setting mode

sistency the max_pixclk variable is renamed as max_dotclk throughout the whole series Mika Kahola (11): drm/i915: Store max dotclock drm/i915: DisplayPort pixel clock check drm/i915: HDMI pixel clock check drm/i915: LVDS pixel clock check drm/i915: SDVO pixel clock check drm/i915: DS

[Intel-gfx] [PATCH v4 07/11] drm/i915: CRT pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_crt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers

[Intel-gfx] [PATCH v4 11/11] drm/i915: Max DOT clock frequency to debugfs

Information on maximum supported DOT clock frequency to i915_frequency_info. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 86734be..3df7492

[Intel-gfx] [PATCH v4 05/11] drm/i915: SDVO pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_sdvo.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b

[Intel-gfx] [PATCH v4 08/11] drm/i915: TV pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_tv.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers

[Intel-gfx] [PATCH v4 10/11] drm/i915: DVO pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - clock check against max dotclock moved inside 'if (fixed_mode)' Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dvo.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gp

[Intel-gfx] [PATCH v4 09/11] drm/i915: DisplayPort-MST pixel clock check

MST. V2: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dp_mst.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH v4 01/11] drm/i915: Store max dotclock

On Fri, 2015-08-14 at 15:55 +0300, Ville Syrjälä wrote: > On Fri, Aug 14, 2015 at 01:03:21PM +0300, Mika Kahola wrote: > > Store max dotclock into dev_priv structure so we are able > > to filter out the modes that are not supported by our > > platforms. > > > >

Re: [Intel-gfx] [PATCH v4 04/11] drm/i915: LVDS pixel clock check

On Fri, 2015-08-14 at 16:09 +0300, Ville Syrjälä wrote: > On Fri, Aug 14, 2015 at 01:03:24PM +0300, Mika Kahola wrote: > > It is possible the we request to have a mode that has > > higher pixel clock than our HW can support. This patch > > checks if requested pixel clock

Re: [Intel-gfx] [PATCH v4 00/11] Check pixel clock when setting mode

On Fri, 2015-08-14 at 15:13 +0200, Daniel Vetter wrote: > On Fri, Aug 14, 2015 at 01:03:20PM +0300, Mika Kahola wrote: > > From EDID we can read and request higher pixel clock than > > our HW can support. This set of patches add checks if > > requested pixel clock is lower t

[Intel-gfx] [PATCH v5 3/4] drm/i915: DSI pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk - moved dot clock checking inside 'if (fixed_mode)' V5: - dot clock checked against fixed_mode clock Signed-off-by: Mika Kahola --- drivers/gp

[Intel-gfx] [PATCH v5 2/4] drm/i915: LVDS pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - moved supported dotclock check from mode_valid() to intel_lvds_init() V5: - dotclock check moved back to mode_valid() function - dotclock check for fixed mode Signed-off-by: Mika Kahola --- drivers/gpu

[Intel-gfx] [PATCH v5 1/4] drm/i915: Store max dotclock

() the rounding method changed from round up to round down when computing max dotclock V4: - Haswell and Broadwell supports now dot clocks up to max CD clock frequency Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_display.c | 20

[Intel-gfx] [PATCH v5 4/4] drm/i915: DVO pixel clock check

: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - clock check against max dotclock moved inside 'if (fixed_mode)' V5: - dot clock check against fixed_mode clock when available Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel

[Intel-gfx] [PATCH v5 0/4] Check pixel clock when setting mode

sistency the max_pixclk variable is renamed as max_dotclk throughout the whole series V5: - remaining tweaks for dotclock max frequency computation (HSW and BDW) and LVDS, DSI, and DVO fixes based on Ville's comments Thanks Ville for reviewing the rest of the series! Mika Kahola (4):

[PATCH v3] drm/i915/xe3lpd: Power request asserting/deasserting

stavo) Rename workaround function as wa_14020908590() (Gustvo) Use boolean enable instead of if-else structure (Gustavo) Signed-off-by: Mika Kahola --- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 8 drivers/gpu/drm/i915/display/intel_tc.c | 39 +++ 2 files

[PATCH v5 0/2] drm/i915/display: Power request asserting/deasserting

lue with 0x1 4. Read mailbox command and wait until run/busy bit is clear before continuing power request. while at it, let's start using struct intel_display instead of struct drm_i915_private as well. Signed-off-by: Mika Kahola Mika Kahola (2): drm/i915/xe3lpd: Power request asserti

[PATCH v5 1/2] drm/i915/xe3lpd: Power request asserting/deasserting

stavo) Rename workaround function as wa_14020908590() (Gustvo) Use boolean enable instead of if-else structure (Raag) v4: Drop drm_WARN_ON() (Raag) Fix function definition to fit into a single line (Raag) Reviewed-by: Raag Jadav Signed-off-by: Mika Kahola --- .../gpu/drm/i915/display/

[PATCH v5 2/2] drm/i915/display: Use struct intel_display instead of struct drm_i915_private

Let's start using struct intel_display instead of struct drm_i915_private when introducing new code. No functional changes. v2: Drop tc_to_intel_display() helper funtion (Jani) Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_tc.c | 12 ++-- 1 file chang

[PATCH v3 2/2] drm/i915/display: Use struct intel_display instead of struct drm_i915_private

Let's start using struct intel_display instead of struct drm_i915_private when introducing new code. No functional changes. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_tc.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/driver

[PATCH v4 1/2] drm/i915/xe3lpd: Power request asserting/deasserting

stavo) Rename workaround function as wa_14020908590() (Gustvo) Use boolean enable instead of if-else structure (Raag) v4: Drop drm_WARN_ON() (Raag) Fix function definition to fit into a single line (Raag) Reviewed-by: Raag Jadav Signed-off-by: Mika Kahola --- .../gpu/drm/i915/display/

[PATCH v4 2/2] drm/i915/display: Use struct intel_display instead of struct drm_i915_private

Let's start using struct intel_display instead of struct drm_i915_private when introducing new code. No functional changes. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_tc.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/driver

[PATCH v4 0/2] drm/i915/display: Power request asserting/deasserting

lue with 0x1 4. Read mailbox command and wait until run/busy bit is clear before continuing power request. while at it, let's start using struct intel_display instead of struct drm_i915_private as well. Signed-off-by: Mika Kahola Mika Kahola (2): drm/i915/xe3lpd: Power request asserti

[PATCH] drm/i915/xe3lpd: Power request asserting/deasserting

o) Move register defs from i915_reg.h to intel_cx0_phy_regs.h (Gustavo) Signed-off-by: Mika Kahola --- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 7 +++ drivers/gpu/drm/i915/display/intel_tc.c | 46 +++ 2 files changed, 53 insertions(+) diff --git a/drivers/

[PATCH v3 0/2] drm/i915/display: Power request asserting/deasserting

lue with 0x1 4. Read mailbox command and wait until run/busy bit is clear before continuing power request. while at it, let's start using struct intel_display instead of struct drm_i915_private as well. Signed-off-by: Mika Kahola Mika Kahola (2): drm/i915/xe3lpd: Power request asserti

[PATCH v3 1/2] drm/i915/xe3lpd: Power request asserting/deasserting

stavo) Rename workaround function as wa_14020908590() (Gustvo) Use boolean enable instead of if-else structure (Raag) Signed-off-by: Mika Kahola --- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 8 + drivers/gpu/drm/i915/display/intel_tc.c | 32 +++ 2 files

[PATCH v6 1/2] drm/i915/xe3lpd: Power request asserting/deasserting

macro (Jani) Rename WA function with some meaningful name and add comment on WA number (Jani) Use struct intel_display on WA calling function (Jani) Reviewed-by: Raag Jadav (v4) Signed-off-by: Mika Kahola --- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 7 drivers/gp

[PATCH v6 2/2] drm/i915/display: Use struct intel_display instead of struct drm_i915_private

Let's start using struct intel_display instead of struct drm_i915_private when introducing new code. No functional changes. v2: Drop tc_to_intel_display() helper funtion (Jani) Signed-off-by: Mika Kahola Reviewed-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_tc.

[PATCH v6 0/2] drm/i915/display: Power request asserting/deasserting

lue with 0x1 4. Read mailbox command and wait until run/busy bit is clear before continuing power request. while at it, let's start using struct intel_display instead of struct drm_i915_private as well. Signed-off-by: Mika Kahola Mika Kahola (2): drm/i915/xe3lpd: Power request asserti

[PATCH v2 2/2] drm/i915/display: Allow display PHYs to reset power state

more descriptive (Jani) For PTL, only port A needs this wa Add helpers to check presence of C10 phy and pll enabling (Imre) Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 45 +++ drivers/gpu/drm/i915/display/intel_cx0_phy.h | 1 + .../drm

[PATCH v2 1/2] drm/i915/display: Drop crtc_state from C10/C20 pll programming

lized as NULL. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 109 +++ 1 file changed, 64 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 48b0b97

[PATCH v2 0/2] drm/i915/display: Allow display PHYs to reset power state

x27;s refactor the pll enabling in such a way that the crtc_state structure is no longer needed. v2: reword commit messages (Jani) rename wa naming (Jani) add helper functions (Imre) use C10 only for the wa on PTL Mika Kahola (2): drm/i915/display: Drop crtc_state from C10/C20 pll progra

[PATCH v2] drm/i915/display: UHBR rates for Thunderbolt

forward ungate with mask parameter (Imre) Rename XE3LPDP_* to XE3D_* (Imre) Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 39 +-- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 4 ++ 2 files changed, 39 insertions(+), 4 deletions(-) diff --git a

[PATCH 1/2] drm/i915/display: Drop crtc_state from C10/C20 pll programming

For PLL programming for C10 and C20 we don't need to carry crtc_state but instead use only necessary parts of the crtc_state i.e. pll_state. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 109 +++ 1 file changed, 64 insertions(+), 45 dele

[PATCH 2/2] drm/i915/display: Allow display PHYs to reset power state

Enable Sequence, using any valid frequency such as DP 1.62 GHz. This brings lanes out of reset and enables the PLL to allow powerdown to be moved to the Disable state. 2. Follow PLL Disable Sequence. This moves powerdown to the Disable state and disables the PLL. Signed-off-by: Mika Kahola

[PATCH 0/2] drm/i915/display: Allow display PHYs to reset power state

x27;s refactor the pll enabling in such a way that the crtc_state structure is no longer needed. Mika Kahola (2): drm/i915/display: Drop crtc_state from C10/C20 pll programming drm/i915/display: Allow display PHYs to reset power state drivers/gpu/drm/i915/display/intel_cx0_phy.c

[PATCH v3 2/2] drm/i915/display: Allow display PHYs to reset power state

more descriptive (Jani) For PTL, only port A needs this wa Add helpers to check presence of C10 phy and pll enabling (Imre) v3: Rename wa function (Imre) Check return value of C10 pll tables readout (Imre) Use PLL request to check pll enabling (Imre) Signed-off-by: Mika Kahola

[PATCH v3 1/2] drm/i915/display: Drop crtc_state from C10/C20 pll programming

lized as NULL. v2: Use err instead of val for error handling Signed-off-by: Mika Kahola Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 109 +++ 1 file changed, 65 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy

[PATCH v3 0/2] drm/i915/display: Allow display PHYs to reset power state

adout (Imre) Use PLL request to check pll enabling (Imre) Use err instead of val for error handling (Imre) Mika Kahola (2): drm/i915/display: Drop crtc_state from C10/C20 pll programming drm/i915/display: Allow display PHYs to reset power state drivers/gpu/drm/i915/display/intel_cx0_

[PATCH v4 2/2] drm/i915/display: Allow display PHYs to reset power state

() right after intel_cx0_pll_disable() (Imre) Add drm_WARN_ON() if C10 state cannot be calculated from the tables (Imre) Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 54 +++ drivers/gpu/drm/i915/display/intel_cx0_phy.h | 1 + .../drm

[PATCH v4 1/2] drm/i915/display: Drop crtc_state from C10/C20 pll programming

lized as NULL. v2: Use err instead of val for error handling (Imre) Unify parameter order (Imre) Signed-off-by: Mika Kahola Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 121 +++ 1 file changed, 72 insertions(+), 49 deletions(-) diff --git a/driver

[PATCH v4 0/2] drm/i915/display: Allow display PHYs to reset power state

adout (Imre) Use PLL request to check pll enabling (Imre) v4: checpatch fixes and cleanups Mika Kahola (2): drm/i915/display: Drop crtc_state from C10/C20 pll programming drm/i915/display: Allow display PHYs to reset power state drivers/gpu/drm/i915/display/intel_cx0_phy.c

[PATCH v5 0/2] drm/i915/display: Allow display PHYs to reset power state

adout (Imre) Use PLL request to check pll enabling (Imre) v4: checpatch fixes and cleanups v5: Add check for intel_encoder_is_dig_port() and add debug message when applying wa (Imre) Mika Kahola (2): drm/i915/display: Drop crtc_state from C10/C20 pll programming drm/i915/display: Allow di

[PATCH v5 1/2] drm/i915/display: Drop crtc_state from C10/C20 pll programming

lized as NULL. v2: Use err instead of val for error handling (Imre) Unify parameter order (Imre) v3: Fix misplaced port_clock, and is_dp in intel_c20_pll_program() call (Imre) Signed-off-by: Mika Kahola Reviewed-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_cx0_phy.c

[PATCH v5 2/2] drm/i915/display: Allow display PHYs to reset power state

() right after intel_cx0_pll_disable() (Imre) Add drm_WARN_ON() if C10 state cannot be calculated from the tables (Imre) v5: Add debug message on PLL enabling (Imre) Add check for intel_encoder_is_dig_port() (Imre) Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/display

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