> > + FILE *file;
> > + int debug_fd;
> > + char *line = NULL;
> > + size_t line_size = 0;
> > + char *dashes = NULL;
> > + char *ring_name = NULL;
> > + int bb_matched = 0;
> > + uint32_t gtt_offset;
> > + char expected_line[32];
> > + int req_matched = 0;
> > + int requests;
> > > > + &requests);
> > > > + if (req_matched == 1) {
> > > > + igt_assert(strstr(ring_name,
> > > > expected_ring_name));
> > > > + igt_assert(requests == 1);
> > >
> > > Bad assumption. You could still have
> I would add a little more smarts to both the kernel and error-decode.
> In the kernel, we can print the guilty request, which you can then use to
> confirm that it is yours. That seems to me to be a stronger validation of
> gem_error_capture, and a useful bit of information from hangstats that we
> Subject: [Intel-gfx] [PATCH 1/6] drm/i915: Replace hardcoded cacheline size
> with macro
>
> For readibility and guess at the meaning behind the constants.
>
> v2: Claim only the meagerest connections with reality.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Oscar Mateo
___
> Subject: [Intel-gfx] [PATCH 3/6] drm/i915: Allow the module to load even if we
> fail to setup rings
>
> Even without enabling the ringbuffers to allow command execution, we can still
> control the display engines to enable modesetting. So make the ringbuffer
> initialization failure soft, and m
> Subject: [Intel-gfx] [PATCH 2/6] drm/i915: Preserve ring buffers objects
> across
> resume
>
> Tearing down the ring buffers across resume is overkill, risks unnecessary
> failure and increases fragmentation.
>
> After failure, since the device is still active we may end up trying to write
>
> Subject: [Intel-gfx] [PATCH 5/6] drm/i915: Include a little more information
> about why ring init fails
>
> If we include the expected values for the failing ring register checks, it
> makes it
> marginally easier to see which is the culprit.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Osc
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Chris Wilson
> Sent: Wednesday, April 09, 2014 9:20 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 4/6] drm/i915: Mark device as wedged if we fail to
> resume
>
>
> Subject: [Intel-gfx] [PATCH 6/6] drm/i915: Kick start the rings
>
> On g4x, we have an issue where the register write to setup the rings do not
> always take. However, it appears that the current check also passes only by
> chance, a second reading of the register returns a different broekn valu
915_WRITE(GEN8_GT_IIR(0), tmp);
> >
> > to just inside the if (tmp) { conditional (or anywhere before this call)
> > fixes this
> > issue. There is no harm in acking the interrupt immediately as we have the
> > read stored in tmp.
> >
> -Original Mes
Hi Mika,
> > +static bool rings_stopped(void)
> > +{
> > + int fd;
> > + static char buf[128];
> > + unsigned long long val;
> > +
> > + fd = igt_debugfs_open("i915_ring_stop", O_RDONLY);
> > + igt_assert(fd >= 0);
> > +
> > + igt_assert(read(fd, buf, sizeof(buf)) > 0);
> > + close(f
On Tue, 2014-04-15 at 21:38 +0200, Daniel Vetter wrote:
> On Mon, Apr 14, 2014 at 01:03:58PM +0000, Mateo Lozano, Oscar wrote:
> > > I would add a little more smarts to both the kernel and error-decode.
> > > In the kernel, we can print the guilty request, which you can then
Hi Daniel,
Sorry, this fell through the cracks:
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Gracefully handle obj not bound to
> GGTT in is_pin_display
>
> On Wed, Apr 02, 2014 at 07:21:01PM +0100, oscar.ma...@intel.com wrote:
> > From: Oscar Mateo
> >
> > Otherwise, we do a NULL pointer deref
> Sent: Monday, May 12, 2014 11:09 AM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Gracefully handle obj not bound to
> GGTT in is_pin_display
>
> On Mon, May 12, 2014 at 09:05:45AM +, Mateo Lozano,
> I call this "review by asking for an igt" ;-) -Daniel
Ok, I´ll give it a try. At least I will learn something about the kms code,
a.k.a. "learning by igt" :D
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailm
Hi Mika,
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Mika Kuoppala
> Sent: Tuesday, May 06, 2014 3:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: b...@bwidawsk.net; m...@iki.fi; kris...@linux.intel.com
> Subject: [Intel-gfx] [PA
> -Original Message-
> From: Lespiau, Damien
> Sent: Wednesday, May 14, 2014 12:14 PM
> To: Mateo Lozano, Oscar
> Cc: Mika Kuoppala; intel-gfx@lists.freedesktop.org; b...@bwidawsk.net;
> m...@iki.fi; kris...@linux.intel.com
> Subject: Re: [Intel-gfx] [PATCH v3 1/2]
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Tuesday, May 13, 2014 2:36 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/50] drm/i915/bdw: Allo
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Tuesday, May 13, 2014 2:27 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org; Ben Widawsky; Widawsky, Benjamin
> Subject: Re: [Intel-gfx] [PAT
> > But looking at the code a better way should be:
> > 1. Create new bo, wrap it in a kms fb.
> > 2. Slap busy load onto that bo, e.g. reapeatedly fill it with the blitter.
> > 3. Enable evil interruptor (igt_fork_signal_helper).
> > 4. Submit pageflip
> >
> > -> Boom since the set_cache_level wil
> I've done a very cursory read of this, and my original comment from my
> original high-level review on the internal list still stands: I'm freaked out
> by how
> invasive this is into the existing ring code. All the changes in i915_dma.c
> look
> very suspicious, since that code is for the lega
> -Original Message-
> From: Lespiau, Damien
> Sent: Wednesday, May 14, 2014 2:26 PM
> To: Daniel Vetter
> Cc: Mateo Lozano, Oscar; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06/50] drm/i915:
> s/intel_ring_buffer/intel_engine
>
> On Tue,
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Thursday, May 15, 2014 2:34 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Gracefully handle obj not
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, May 16, 2014 12:05 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 09/50] drm/i915: Plumb the context everywhere
> in the ex
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Friday, May 16, 2014 1:14 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] tests/kms_flip: test a fb backed by a bo too
> b
Hi Daniel,
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Thursday, May 15, 2014 9:52 PM
> To: Mateo Lozano, Oscar
> Cc: Lespiau, Damien; Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Monday, May 19, 2014 1:21 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; Lespiau, Damien; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Monday, May 19, 2014 2:53 PM
> To: Mateo Lozano, Oscar
> Cc: Lespiau, Damien; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Monday, May 19, 2014 4:12 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; Lespiau, Damien; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06
Behalf Of Daniel Vetter
> Sent: Monday, May 19, 2014 4:50 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; Lespiau, Damien; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06/50] drm/i915:
> s/intel_ring_buffer/intel_engine
>
> On Mon, May 19, 2014 at 03:
> -Original Message-
> From: Volkin, Bradley D
> Sent: Monday, May 19, 2014 5:24 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06/50] drm/i915:
> s/intel_ring_buffer/intel_engine
>
> On Mon,
> -Original Message-
> From: Volkin, Bradley D
> Sent: Monday, May 19, 2014 5:34 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org; Ben Widawsky; Widawsky, Benjamin
> Subject: Re: [Intel-gfx] [PATCH 02/50] drm/i915: for_each_ring
>
> On Fri, Ma
> -Original Message-
> From: Volkin, Bradley D
> Sent: Monday, May 19, 2014 5:41 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06/50] drm/i915:
> s/intel_ring_buffer/intel_engine
>
> On Mon,
> -Original Message-
> From: Mika Kuoppala [mailto:mika.kuopp...@linux.intel.com]
> Sent: Tuesday, May 20, 2014 12:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Mateo Lozano, Oscar
> Subject: [PATCH 1/2] tests/drv_hangman: Convert test from shell script to c
>
> -Original Message-
> From: Mika Kuoppala [mailto:mika.kuopp...@linux.intel.com]
> Sent: Tuesday, May 20, 2014 12:56 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Mateo Lozano, Oscar
> Subject: [PATCH 2/2] tests/drv_hangman: Add subtest for error state
> capture/dump
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 11, 2014 12:50 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 49/50] drm/i915/bdw: He
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 11, 2014 12:52 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org; Daniel, Thomas
> Subject: Re: [Intel-gfx] [PATCH 40/50]
Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 11, 2014 2:58 PM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 49/50] drm/i915/bdw: Help out the ctx switch
> interrupt handler
>
> On Wed, Jun 11, 2014 at
> > > - Ack the interrupt inmediately, before trying to handle it (fix for
> > > missing interrupts by Bob Beckett ).
> >
> > This interrupt handling change is interesting since it might explain
> > our irq handling woes on gen5+ with the two-level GT interrupt handling
> scheme.
> > Can you please
I already got a review from Brad Volkin on this that I agree with: change the
"write_tail" vfunc name to something different, like "submit". If no one
disagrees, I´ll change it in the next submission.
> -Original Message-----
> From: Mateo Lozano, Oscar
> Sen
it (several things need careful
consideration if we do this, e.g.: should the hang_stats also be per-engine?)
> -Original Message-
> From: Mateo Lozano, Oscar
> Sent: Thursday, March 27, 2014 6:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Mateo Lozano, Oscar
> Sub
You are right on the money: it looks like I am missing the "Force Posted" bit.
I´ll add in the next patch series version.
Thanks,
Oscar
> -Original Message-
> From: Lespiau, Damien
> Sent: Tuesday, April 01, 2014 1:01 AM
> To: Mateo Lozano, Oscar
> Cc: intel-
Bummer. I´ll fix it on the next version.
Thanks!
Oscar
> -Original Message-
> From: Lespiau, Damien
> Sent: Monday, March 31, 2014 5:43 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 39/49] drm/i915/bdw: Swap the
> > --- a/drivers/gpu/drm/i915/i915_lrc.c
> > +++ b/drivers/gpu/drm/i915/i915_lrc.c
> > @@ -41,7 +41,45 @@
> > #include
> > #include "i915_drv.h"
> >
> > +#define GEN8_LR_CONTEXT_SIZE (21 * PAGE_SIZE)
>
> I'm a bit puzzled by that number:
> - I found a sentence saying: "the Context Image for
> > > + req = (struct drm_i915_gem_request *)
> > > + kmalloc(sizeof(struct drm_i915_gem_request), GFP_KERNEL);
> > > + req->ring = ring;
> > > + req->ctx = to;
> > > + i915_gem_context_reference(req->ctx);
> > > + req->tail = tail;
> >
> > Need to test if the allocation has succeeded and r
> On Mon, Apr 07, 2014 at 03:05:39PM +0100, Damien Lespiau wrote:
> > Execlist are relatively new, and so it'd be wise to be able to merge
> > that support disabled by default while still allowing a module
> > parameter to enable that feature.
> >
> > Even if we end up enabling execlists by default
> You're always calling gen8_write_pdp_ctx() and gen8_write_tail_ctx()
> together, kmapping the page twice is a bit wastful.
You are totally right... I´ll join them in the next version.
-- Oscar
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
It seems to be completely managed by SW, for SW (or, at least, it does not seem
to have any visible effect in the HW). But you are right, it is probably worth
updating.
-- Oscar
> -Original Message-
> From: Lespiau, Damien
> Sent: Thursday, April 03, 2014 3:25 PM
> To:
Hey Damien,
> I already got a fair review comment from Brad Volkin on this: he proposes to
> do this instead
>
> struct i915_hw_context {
> struct i915_address_space *vm;
> struct {
> struct drm_i915_gem_object *ctx_obj;
>
----
> From: Mateo Lozano, Oscar
> Sent: Friday, April 11, 2014 2:00 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Mateo Lozano, Oscar
> Subject: [PATCH] tests/gem_error_capture: Initial testcase for error state
> capture/dump
>
> From: Oscar Mateo
>
> Signe
> -Original Message-
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of Daniel Vetter
> Sent: Friday, November 15, 2013 5:23 PM
> To: Lespiau, Damien
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [igt] Making t
> > This test hasn't been terribly effective at provoking the bug it tries
> > to hit, so I think we can just unconditionally use the lower limit.
> > That also helps with the really long runtime of this case a bit.
> > -Daniel
Understood. I´ll simplify the patch and send it again then.
> FWIW,
> Oops, we seem to be pretty bad at breaking the Android build :(
Or very good, depends on how you look at it :)
It´s my bad: preparing our Jenkins to automatically compile-test i-g-t after
every check-in is in my backlog, but I have no bandwidth at the moment. I´ll
try to give it a go after t
> -Original Message-
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of devon.dav...@intel.com
> Sent: Wednesday, January 08, 2014 4:07 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Davies, Devon
> Subject: [Intel-gfx] [PATCH] b
Reviewed-by: Oscar Mateo
(sorry, I forgot about this one)
> -Original Message-
> From: intel-gfx-boun...@lists.freedesktop.org [mailto:intel-gfx-
> boun...@lists.freedesktop.org] On Behalf Of joao.san...@intel.com
> Sent: Thursday, January 23, 2014 6:30 PM
> To: intel-gfx@lists.freedeskt
s via drop caches at the end of gem_quiescent_gpu?).
-- Oscar
> -Original Message-
> From: Ben Widawsky [mailto:benjamin.widaw...@intel.com]
> Sent: Friday, November 01, 2013 3:38 AM
> To: Mateo Lozano, Oscar
> Cc: Chris Wilson; Daniel Vetter
> Subject: Re: new PPGTT pat
definitely when called at the end!).
What do you think?
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Friday, November 01, 2013 7:08 PM
> To: Ben Widawsky
> Cc: Daniel Vetter; Mateo Lozano
> > This is basically a "drop cache" interface to the igt_debugfs
> > facilities. Also, update existing users.
> >
> > Signed-off-by: Oscar Mateo
> > Cc: Damien Lespiau
> > ---
> > lib/igt_debugfs.c | 28
> > lib/igt_debugfs.h | 15 +++
> > IMHO, gem_quiescent_gpu() does need the drop cache call, otherwise it
> doesn´t really do what it advertises. However, calling gem_quiescent_gpu()
> inside get_object_count() is probably overkill, and could potentially mask
> something going wrong (not so much when called at the beginning of a
t;cat" was going into std output instead of /dev/null and creating all kinds of
craziness). I sent a patch to the mailing list.
Cheers,
Oscar
> -Original Message-
> From: Ben Widawsky [mailto:b...@bwidawsk.net]
> Sent: Monday, November 11, 2013 12:30 AM
> To: Daniel Vet
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, June 13, 2014 6:11 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 05/53] drm/i915: Move
> i915_gem_validate_context()
Behalf Of Daniel
> Vetter
> Sent: Friday, June 13, 2014 6:01 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 02/53] drm/i915: Rename ctx->obj to ctx-
> >render_obj
>
> On Fri, Jun 13, 2014 at 04:37:20PM +0100, o
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Friday, June 13, 2014 5:51 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 51/53] drm/i915/bdw: Document Logical
> Rings, LR c
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Monday, June 16, 2014 6:56 PM
> To: Mateo Lozano, Oscar
> Cc: Chris Wilson; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 51/53] d
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Monday, June 16, 2014 7:07 PM
> To: Deak, Imre
> Cc: Mateo Lozano, Oscar; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 2/4] drm/i91
Behalf Of Daniel
> Vetter
> Sent: Tuesday, June 17, 2014 10:40 AM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; Chris Wilson; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 51/53] drm/i915/bdw: Document Logical
> Rings, LR contexts and Execlists
>
> On T
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Tuesday, June 17, 2014 11:09 AM
> To: Mateo Lozano, Oscar
> Cc: Chris Wilson; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATC
No, dear reader, you are not missing patches: this series should be 1/4, 2/4,
3/4 and 4/4, but git went rogue on me :(
I can resend the series if that helps...
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of oscar.ma...@intel.com
> S
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:16 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 06/53] drm/i915/bdw:
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:17 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 07/53] drm/i915/bdw:
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:19 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 08/53] drm/i915/bd
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:25 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 09/53] drm/i915/bd
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:50 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 42/53] drm/i915/bdw
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 10:01 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 53/53] !UPSTREAM: drm/i
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Thursday, June 19, 2014 11:08 AM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 09/53] drm/i91
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Thursday, June 19, 2014 11:14 AM
> To: Mateo Lozano, Oscar
> Cc: Daniel Vetter; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 53/53] !UPSTREAM: drm/i915: Use MMIO
&
> -Original Message-
> From: Volkin, Bradley D
> Sent: Wednesday, June 18, 2014 10:39 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 04/53] drm/i915: Extract ringbuffer destroy &
> make alloc outside accesible
> -Original Message-
> From: Volkin, Bradley D
> Sent: Thursday, June 19, 2014 1:04 AM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 19/53] drm/i915: Extract pipe control fini &
> make init outside accesible
>
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 8:51 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/8] drm/i915: Get rid of
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Thursday, June 19, 2014 8:57 AM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add ppgtt init/release trace
> point
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Chris Wilson
> Sent: Thursday, June 19, 2014 8:47 AM
> To: ville.syrj...@linux.intel.com
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Unpin last_conte
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 18, 2014 9:49 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 41/53] drm/i915/bdw: A
014 11:19 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 11/53] drm/i915/bdw: Allocate ringbuffers
> for Logical Ring Contexts
>
> On Fri, Jun 13, 2014 at 08:37:29AM -0700, oscar.ma...@intel.com wrote:
> > From: Oscar
> -Original Message-
> From: Volkin, Bradley D
> Sent: Thursday, June 19, 2014 12:24 AM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 12/53] drm/i915/bdw: Populate LR contexts
> (somewhat)
>
> On Fri, Jun 1
014 12:43 AM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 15/53] drm/i915/bdw: Don't write PDP in the
> legacy way when using LRCs
>
> On Fri, Jun 13, 2014 at 08:37:33AM -0700, oscar.ma...@intel.com wrote:
> > From: O
> -Original Message-
> From: Volkin, Bradley D
> Sent: Friday, June 20, 2014 9:28 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 25/53] drm/i915/bdw: GEN-specific logical
> ring submit context (somewhat)
>
>
> -Original Message-
> From: Volkin, Bradley D
> Sent: Friday, June 20, 2014 10:01 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
> submission mechanism
>
> On Fri, Jun 1
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, June 23, 2014 2:14 PM
> To: Mateo Lozano, Oscar
> Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, June 23, 2014 2:27 PM
> To: Mateo Lozano, Oscar
> Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, June 23, 2014 2:42 PM
> To: Mateo Lozano, Oscar
> Cc: Volkin, Bradley D; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical
> -Original Message-
> From: Volkin, Bradley D
> Sent: Monday, June 23, 2014 4:06 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 12/53] drm/i915/bdw: Populate LR contexts
> (somewhat)
>
> On Mon, Jun 23, 2014
> -Original Message-
> From: Volkin, Bradley D
> Sent: Friday, June 20, 2014 10:18 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 27/53] drm/i915/bdw: GEN-specific logical
> ring emit request
>
> On Fri,
Ok, let´s try to extract something positive out of all this.
OPTION A (Ben´s proposal):
> I think the only solution for what Chris is asking for is to implement this
> as 1
> context per engine, as opposed to 1 context with a context object per
> engine. As you correctly stated, I think we all a
> -Original Message-
> From: Volkin, Bradley D
> Sent: Monday, June 23, 2014 8:10 PM
> To: Mateo Lozano, Oscar
> Cc: Chris Wilson; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
> submission mechanism
>
>
> -Original Message-
> From: Jesse Barnes [mailto:jbar...@virtuousgeek.org]
> Sent: Tuesday, June 24, 2014 6:20 PM
> To: Chris Wilson
> Cc: Mateo Lozano, Oscar; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i915/bdw: New logical ring
>
-
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org]
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rodrigo Vivi
> Sent: Monday, June 30, 2014 5:51 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vivi, Rodrigo
> Subject: [Intel-gfx] [PATCH 1/3] drm/i915: Fix VCS2's ring name.
>
> It just
> -Original Message-
> From: Jesse Barnes [mailto:jbar...@virtuousgeek.org]
> Sent: Monday, June 30, 2014 9:54 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 4/8] drm/i915: Rename ctx->id to ctx->handle
>
>
Submitting again (this time copying the mailing list correctly):
The bo_pin ioctl has been discarded in GEN6+ with this patch:
drm/i915: Reject the pin ioctl on gen6+
Especially with ppgtt this kinda stopped making sense. And if we
indeed need this to hack around an issue, we nee
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Tuesday, July 01, 2014 5:30 PM
> To: Mateo Lozano, Oscar
> Cc: Intel-gfx@lists.freedesktop.org; Madajczak, Tomasz
> Subject: Re: [Intel-gfx] pin OABUFFER to GGTT
>
> On Tue, Ju
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