On Mon, 2022-06-06 at 17:56 +0530, Anshuman Gupta wrote:
> Currently i915 disables d3cold for i915 pci dev.
> This blocks D3 for i915 gfx pci upstream bridge (VSP).
> Let's disable d3cold at gfx root port to make sure that
> i915 gfx VSP can transition to D3 to save some power.
(nit) It's better t
From: Luca Coelho
The intel_dp_dsc_get_output_bpp() function outputs two lines of
unconditional logs, which was okay when it was called only once. But
now, we also call this function from intel_dp_mode_valid(), which is
in turn called for every mode we need to validate. This causes a lot
of
On Tue, 2022-06-07 at 11:05 +0300, Jani Nikula wrote:
> On Tue, 07 Jun 2022, Luca Coelho wrote:
> > From: Luca Coelho
> >
> > The intel_dp_dsc_get_output_bpp() function outputs two lines of
> > unconditional logs, which was okay when it was called only once. But
On Mon, 2022-08-29 at 02:48 +, Murthy, Arun R wrote:
> > -Original Message-
> > From: Intel-gfx On Behalf
> > Of
> > Animesh Manna
> > Sent: Friday, August 26, 2022 5:48 PM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Added restriction
> >
t be first IVB in list */
> INTEL_IVB_M_IDS(&ivb_display),
> INTEL_IVB_D_IDS(&ivb_display),
> INTEL_HSW_IDS(&hsw_display),
> @@ -837,6 +850,11 @@ intel_display_device_probe(struct drm_i915_private
> *i915, bool has_gmdid,
> if (has_gmdid)
> return probe_gmdid_display(i915, gmdid_ver, gmdid_rel,
> gmdid_step);
>
> + if (has_no_display(pdev)) {
> + drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
> + return &no_display;
> + }
> +
> for (i = 0; i < ARRAY_SIZE(intel_display_ids); i++) {
> if (intel_display_ids[i].devid == pdev->device)
> return intel_display_ids[i].info;
Looks good to me.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
l == 0) {
> + drm_dbg_kms(&i915->drm, "Device doesn't have display\n");
> return &no_display;
> + }
>
> *ver = REG_FIELD_GET(GMD_ID_ARCH_MASK, val);
> *rel = REG_FIELD_GET(GMD_ID_RELEASE_MASK, val);
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
gment" typo, as reported by checkpatch.
In v4:
* Rebased;
* Renamed port_max to lane_max (Lucas' comment).
Please review.
Cheers,
Luca.
Luca Coelho (4):
drm/i915/tc: rename mtl_tc_port_get_pin_assignment_mask()
drm/i915/tc: make intel_tc_port_get_lane_mask() static
drm/i915/
This function is only used locally, so make it static and remove the
definition from the header file.
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.h | 1 -
2 files changed, 1 insertion(+), 2
This makes the code a bit more symmetric and readable, especially when
we start adding more display version-specific alternatives.
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 32 +++--
1 file changed, 19 insertions
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant. Rename the function accordingly.
Reviewed-by: Lucas De Marchi
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca Coelho
---
drivers/gp
This function doesn't really return the pin assignment mask, but the
max lane count derived from that. So rename the function to
mtl_tc_port_get_max_lane_count() to better reflect what it really does.
Reviewed-by: Lucas De Marchi
Reviewed-by: Suraj Kandpal
Signed-off-by: Luca C
On Thu, 2023-03-16 at 13:13 +0200, Mika Kahola wrote:
> From: Anusha Srivatsa
>
> Unlike previous platforms that used PORT_TX_DFLEXDPSP
> for max_lane calculation, MTL uses only PORT_TX_DFLEXPA1
> from which the max_lanes has to be calculated.
>
> Bspec: 50235, 65380
>
> Cc: Mika Kahola
> Cc:
; initiated commits.
>
> Should be far less fragile since now we just need to remember
> to flag the internal commits, and not worry about where new
> crtcs might get pulled in.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5260
> Signed-off-by: Ville Syrjälä
> ---
Looks good to me.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Thu, 2023-08-24 at 11:04 +0300, Imre Deak wrote:
> A follow-up patch will need to limit the output link bpp both in the
> non-DSC and DSC configuration, so track the pipe and link bpp limits
> separately in the link_config_limits struct.
>
> Use .4 fixed point format for link bpp matching the 1
On Thu, 2023-09-14 at 12:55 +0300, Imre Deak wrote:
> On Thu, Sep 14, 2023 at 12:33:59PM +0300, Luca Coelho wrote:
> > On Thu, 2023-08-24 at 11:04 +0300, Imre Deak wrote:
> > > A follow-up patch will need to limit the output link bpp both in the
> > > non-DSC and DSC
On Thu, 2023-09-14 at 14:08 +0300, Imre Deak wrote:
> On Thu, Sep 14, 2023 at 01:51:16PM +0300, Luca Coelho wrote:
> > On Thu, 2023-09-14 at 12:55 +0300, Imre Deak wrote:
> > > On Thu, Sep 14, 2023 at 12:33:59PM +0300, Luca Coelho wrote:
> > > > On Thu, 2023-08-24 a
Declaration is '.. c:struct:: i915_context_engines_parallel_submit'.
>
> Use the Sphinx C domain namespace for the rfc document to fix this.
>
> Signed-off-by: Jani Nikula
> ---
This looks pretty straightforward.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
entication, to correctly do so the
> * HuC binary must be loaded before the GuC one.
> * Loading the HuC is optional; however, not using the HuC might negatively
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2023-06-26 at 11:28 +0300, Stanislav Lisovskiy wrote:
> Currently we just clamp that value to the highest supported one, however that
> means, we are not able to fit this into our available bandwidth range, so we
> might see glitches or FIFO underruns.
> While choosing less compressed bpp t
fg->bits_per_component == 14)
> - vdsc_cfg->rc_range_params[0].range_bpg_offset = 0;
> }
>
> /*
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
able to
> comply
> with bandwidth requirements and fail.
>
> v2: - s/clamp_t/min_t/ (Luca Coelho)
>
> Signed-off-by: Stanislav Lisovskiy
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 13 +++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
>
ld_crtc_state))
> + !intel_crtc_is_bigjoiner_master(old_crtc_state))
> continue;
>
> intel_old_crtc_state_disables(state, old_crtc_state,
Looks good to me.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Hi,
Here are four patches with some clean-ups in the code that handles the
max lane count of Type-C connections.
This is done mostly in preparation for a new way to read the pin
assignments and lane count in future devices.
Please review.
Cheers,
Luca.
Luca Coelho (4):
drm/i915/tc: rename
This function doesn't really return the pin assigment mask, but the
max lane count derived from that. So rename the function to
mtl_tc_port_get_max_lane_count() to better reflect what it really does.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 4 ++--
1
This makes the code a bit more symmetric and readable, especially when
we start adding more display version-specific alternatives.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant. Rename the function accordingly.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
drivers/gpu/drm/i9
This function is only used locally, so make it static and remove the
definition from the header file.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a
.
Luca Coelho (4):
drm/i915/tc: rename mtl_tc_port_get_pin_assignment_mask()
drm/i915/tc: make intel_tc_port_get_lane_mask() static
drm/i915/tc: move legacy code out of the main _max_lane_count() func
drm/i915/tc: remove "fia" from intel_tc_port_fia_max_lane_count()
drivers/gp
This function is only used locally, so make it static and remove the
definition from the header file.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a
This function doesn't really return the pin assigment mask, but the
max lane count derived from that. So rename the function to
mtl_tc_port_get_max_lane_count() to better reflect what it really does.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 4 ++--
1
This makes the code a bit more symmetric and readable, especially when
we start adding more display version-specific alternatives.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 32 +++--
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant. Rename the function accordingly.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 +-
drivers/gpu/drm/i9
This function is only used locally, so make it static and remove the
definition from the header file.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a
This makes the code a bit more symmetric and readable, especially when
we start adding more display version-specific alternatives.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 32 +++--
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git
gment" typo, as reported by checkpatch.
Please review.
Cheers,
Luca.
Luca Coelho (4):
drm/i915/tc: rename mtl_tc_port_get_pin_assignment_mask()
drm/i915/tc: make intel_tc_port_get_lane_mask() static
drm/i915/tc: move legacy code out of the main _max_lane_count() func
drm/i915/tc: r
This function doesn't really return the pin assignment mask, but the
max lane count derived from that. So rename the function to
mtl_tc_port_get_max_lane_count() to better reflect what it really does.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 4 ++--
1
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant. Rename the function accordingly.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 +-
drivers/gpu/drm/i9
On Wed, 2023-04-26 at 16:50 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> To avoid annoying spec lookups let's define more PS_CTRL
> bits in the header.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_reg.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> di
org/series/114608/ [1]
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++--
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drive
id of the
flush_scheduled_work() usage.
Please review.
[1] https://patchwork.freedesktop.org/series/114608/
Cheers,
Luca.
Luca Coelho (3):
drm/i915: add a dedicated workqueue inside drm_i915_private
drm/i915/gt: create workqueue dedicated to wake references
drm/i915/selftests: add local work
Add a work queue in the intel_wakeref structure to be used exclusively
by the wake reference mechanism. This is needed in order to avoid
using the system workqueue and relying on flush_scheduled_work().
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
On Thu, 2023-05-11 at 14:54 +0300, Ville Syrjälä wrote:
> On Thu, May 11, 2023 at 10:29:01AM +0300, Luca Coelho wrote:
> > On Wed, 2023-04-26 at 16:50 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > To avoid annoying spec lookups let
org/series/114608/ [1]
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++--
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drive
Cc: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 20 +++-
drivers/gp
ule-global. I'm fine with any of this options. It's up to the
maintainers to decide which one to take.
Please review.
[1] https://patchwork.freedesktop.org/series/114608/
Cheers,
Luca.
Luca Coelho (3):
drm/i915: use pointer to i915 instead of rpm in wakeref
drm/i915: add a ded
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
pipe_config->fec_enable =
> + intel_de_read(dev_priv,
> + dp_tp_ctl_reg(encoder,
> pipe_config)) & DP_TP_CTL_FEC_ENABLE;
> +
> pipe_config->infoframes.enable |=
> intel_h
> TRANSCODER_A)
> + if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A)
> return true;
>
> return false;
Other than that, looks good:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Tue, 2023-05-02 at 17:39 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> ICL doesn't support FEC with a x1 DP link. Make sure
> we don't try to enable FEC in such cases.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 23 ---
> 1
c status: %u\n",
> - encoder->base.base.id, encoder->base.name,
> - pipe_config->fec_enable);
> - }
> + intel_de_read(dev_priv,
> + dp_tp_ctl_reg(encoder,
> pipe_config)) & DP_TP_CTL_FEC_ENABLE;
>
> if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink)
> pipe_config->infoframes.enable |=
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
sn't matter much, but it would be nice to say where you're
splitting the long lines? If nothing else, it would at least make the
commit message more unique:
"drm/i915: Split some long lines in hsw_fdi_link_train()"
Other than this nitpick:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
ivers/gpu/drm/i915/display/intel_crt.c
> index 13519f78cf9f..52af64aa9953 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -449,6 +449,8 @@ static int hsw_crt_compute_config(struct intel_encoder
> *encoder,
> /* FDI must always be 2.7 GHz */
> pipe_config->port_clock = 135000 * 2;
>
> + pipe_config->enhanced_framing = true;
> +
Just curious, why are you setting it to true by default here?
Otherwise, the changes look reasonable:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
t; } else {
> intel_c20pll_readout_hw_state(encoder,
> &crtc_state->cx0pll_state.c20);
> - intel_c20pll_dump_hw_state(i915, &crtc_state->cx0pll_state.c20);
> crtc_state->port_clock = intel_c20pll_calc_port_clock(encoder,
> &crtc_state->cx0pll_state.c20);
> }
>
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Tue, 2023-05-02 at 17:39 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> There's no need to check for both eDP and fixed_mode when
> deciding whether to do the pfit calculations or not.
>
> Signed-off-by: Ville Syrjälä
> ---
It would be nice to explain _why_ this is not needed. Is it
"Initializing combo PHY %c (Voltage/Process Info :
> %s)\n",
> + phy_name(phy), procmon->name);
>
> if (!has_phy_misc(dev_priv, phy))
> goto skip_phy_misc;
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
3c14f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.c
> @@ -5,8 +5,8 @@
>
> #include
>
> -#include "drm/i915_component.h"
> -#include "drm/i915_gsc_proxy_mei_interface.h"
> +#include
>
Looks good, I only have some nitpicks.
On Wed, 2023-05-24 at 18:01 +0300, Mika Kahola wrote:
> In case when only two or less lanes are owned such as MFD (DP-alt with x2
> lanes)
> we need to reset only one lane (lane0). With only x2 lanes we don't need
> to poll for the phy current status on both
On Tue, 2023-05-30 at 09:30 +, Kahola, Mika wrote:
> > -Original Message-
> > From: Luca Coelho
> > Sent: Tuesday, May 30, 2023 11:38 AM
> > To: Kahola, Mika ; intel-
> > g...@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl
chwork.freedesktop.org/series/114608/
Cheers,
Luca.
Luca Coelho (3):
drm/i915: use pointer to i915 instead of rpm in wakeref
drm/i915: add a dedicated workqueue inside drm_i915_private
drm/i915/selftests: add local workqueue for SW fence selftest
drivers/gpu/drm/i915/display/int
eviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 20 +++-
drivers/gp
org/series/114608/ [1]
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++--
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drive
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Jani Nikula
Cc: Ville Syrjälä
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
es to zero to keep it simple and safe.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display_device.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
gt; 1 file changed, 23 insertions(+), 16 deletions(-)
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
;
>
> return precharge + preamble;
If this really solves the problem, and since the comment clearly says
that the range is from 10 to 16, it looks good to me.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
e used in __intel_wakeref_put_last(), we were
accidentally using the ordered workqueue. Thanks, Tvrtko!
Please review.
[1] https://patchwork.freedesktop.org/series/114608/
Cheers,
Luca.
Luca Coelho (3):
drm/i915: use pointer to i915 instead of rpm in wakeref
drm/i915: add a dedicated
eviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 20 +++-
drivers/gp
org/series/114608/ [1]
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++--
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drive
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Jani Nikula
Cc: Ville Syrjälä
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
e used in __intel_wakeref_put_last(), we were
accidentally using the ordered workqueue. Thanks, Tvrtko!
In v5:
* Fix compilation error cause by change from dev_priv to i915 in
intel_hdcp_enable().
Please review.
[1] https://patchwork.freedesktop.org/series/114608/
Cheers,
Luca.
Luc
eviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 4 +---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 20 +++-
drivers/gp
org/series/114608/ [1]
Cc: Tetsuo Handa
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display.c | 5 ++--
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drive
Instead of using a global workqueue for the SW fence selftest,
allocate a separate one temporarily only while running the test.
Cc: Tetsuo Handa
Cc: Jani Nikula
Cc: Ville Syrjälä
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 16
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Currently all module parameters are handled by i915_param.c/h. This
> is a problem for display parameters when Xe driver is used. Add
> a mechanism to add parameters specific to the display. This is mainly
> copied from i915_[debugfs]_param
On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Currently all module parameters are handled by i915_param.c/h. This
> > > is a problem for
On Mon, 2023-10-23 at 11:14 +0300, Luca Coelho wrote:
> On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> > On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > Currently all mo
ogic inside the display code.
Signed-off-by: Luca Coelho
---
Note: this patch was accidentally sent only to intel-xe[1], but should
have been sent to intel-gfx. Thus, this is v2.
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, res
ump. Display parameters are also included in
> i915_capabilities
>
> v2: Add parameters to i915_capabilities as well
>
> Signed-off-by: Jouni Högander
> ---
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
ogic inside the display code.
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h
;
> return 0;
> }
> @@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct
> drm_i915_private *i915)
> */
> static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
> {
> - if (i915->params.enable_fbc >= 0)
> -
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> .../gpu/drm/i915/display/intel_display_params.c | 15 +++
> .../gpu/drm/i915/display/intel_display_params.h | 5 +
> drivers/gpu/drm/i915/display/intel_psr.c | 14 +++
rams.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -46,7 +46,6 @@ struct drm_printer;
> * debugfs file
> */
> #define I915_PARAMS_FOR_EACH(param) \
> - param(char *, vbt_firmware, NULL, 0400) \
> param(int, modeset, -1, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(char *, vbt_firmware, NULL, 0400) \
> - param(int, enable_fbc, -1, 0600) \
> + param(int, lvds_channel_mode, 0, 0400) \
> + param(int, enable_fbc, -1, 0600)\
The enable_fbc
644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
s/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
true)");
> -
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> "Force-enable the VGA load detect code for testing (default:false). "
> "For developers only.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index c3487b9d6937..b8728990cb8b 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
isplay_param_named_unsafe(enable_dpt, bool, 0400,
> "Enable display page table (DPT) (default: true)");
>
> +intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> + "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
> +
Shouldn't it be 0400 here?
With this fixed:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
, "Enable IPS (default: true)");
>
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 066f15783580..060464df03c2 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> param(int, enable_guc, -1, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/d
d_unsafe(disable_power_well, int,
> 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled
> when possible)");
>
> -i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +intel_display_param_named_unsafe(enable_ips, int, 0400, "Enable IPS
> (default: true)");
> +
This change is in the wrong patch. It should be moved to the previous
one.
With this fixed:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
h
> index ae0873443a65..c33edaee5032 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -55,7 +55,6 @@ struct drm_printer;
> param(char *, gsc_firmware_path, NULL, 0400) \
> param(bool, memtest, false, 0400) \
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> - param(int, edp_vswing, 0, 0400) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> param(int, enable_dpcd_backlight, -1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
u/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -57,7 +57,6 @@ struct drm_printer;
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> - param(int, enable_dpcd_backlight, -1, 0600) \
> param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
> param(unsigned int, request_timeout_ms,
> CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
> param(unsigned int, lmem_size, 0, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
/drivers/gpu/drm/i915/i915_params.h
> index 8169234338b1..cf5448bbc087 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,6 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, load_detect_test, false, 0600) \
> param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
+ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,7 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, force_reset_modeset_test, false, 0600) \
> + param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
> param(bool, nuclear_pageflip, false, 0400) \
> param(bool, enable_dp_mst, true, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
gt; -i915_param_named(verbose_state_checks, bool, 0600,
> +i915_param_named(verbose_state_checks, bool, 0400,
> "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state
> conditions.");
>
> i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display.h| 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/dr
drm/i915/i915_params.h
> index 4b543beb17ca..c7fff571db2c 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -64,7 +64,6 @@ struct drm_printer;
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, nuclear_pageflip, false, 0400) \
> param(bool, enable_dp_mst, true, 0600) \
> param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 :
> 0)
>
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
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