get_plane_config works with shared fbs (Jesse)
v3: s/ARGB/XRGB (Ville)
use pipesrc width/height (Ville)
fix fourcc comment (Bob)
use drm_format_plane_cpp (Ville)
v4: use fb for tracking fb data object (Ville)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h | 3
If we use a stolen buffer, our probe callback shouldn't allocate a new
buffer; we should re-use the one from the BIOS instead if possible.
v2: fix locking (Jesse)
Reviewed-by: Chris Wilson
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c
We want to preserve the BIOS/bootloader contents for later.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index c55d620..abe998c
And move it up in the file for earlier usage.
v2: add pre-gen4 support as well (Chris)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 53 ++--
1 file changed, 38 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915
plit from plane_config readout and other display changes (Jesse)
drop use_bios_fb option (Chris)
update comments (Jesse)
rework fbdev_init_bios for clarity (Jesse)
drop fb obj ref under lock (Chris)
v7: use fb object from plane_config instead (Ville)
Signed-off-by: Jesse Ba
On Tue, 26 Nov 2013 13:57:10 +
Chris Wilson wrote:
> On Mon, Nov 25, 2013 at 03:51:17PM -0800, Jesse Barnes wrote:
> > Read out the current plane configuration at init time into a new
> > plane_config structure. This allows us to track any existing
> > framebuffers atta
On Tue, 26 Nov 2013 14:09:48 +
Chris Wilson wrote:
> On Mon, Nov 25, 2013 at 03:51:18PM -0800, Jesse Barnes wrote:
> > Retrieve current framebuffer config info from the regs and create an fb
> > object for the buffer the BIOS or boot loader left us. This should
>
This is just a theoretical issue, but we need to do this to prevent the
WARN in pipe_from_connector at suspend time.
https://bugs.freedesktop.org/show_bug.cgi?id=71978
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c |2 ++
1 file changed, 2 insertions(+)
diff --git a
On Tue, 26 Nov 2013 19:28:27 +0200
Ville Syrjälä wrote:
> On Mon, Nov 25, 2013 at 03:51:15PM -0800, Jesse Barnes wrote:
> > And move it up in the file for earlier usage.
> >
> > v2: add pre-gen4 support as well (Chris)
> >
> > Signed-off-by: Jesse Barnes
elds
from the fb struct into the plane config struct. That makes cross
checking and readout simple, and allows us to allocate if possible in
the BIOS functions.
But damnit, then I'd have to drop back to an earlier version of the
patch and lose some changes... ugg
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On Tue, 26 Nov 2013 18:54:04 +0100
Daniel Vetter wrote:
> On Tue, Nov 26, 2013 at 02:09:48PM +, Chris Wilson wrote:
> > On Mon, Nov 25, 2013 at 03:51:18PM -0800, Jesse Barnes wrote:
> > > Retrieve current framebuffer config info from the regs and create an fb
> > >
This should just be a debug. Add another debug msg to the inherit path
while we're at it.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm
On Tue, 26 Nov 2013 15:10:22 -0800
Jesse Barnes wrote:
> On Mon, 11 Nov 2013 10:23:24 +0100
> Daniel Vetter wrote:
>
> > On Wed, Nov 06, 2013 at 12:51:05PM +0200, Ville Syrjälä wrote:
> > > On Wed, Nov 06, 2013 at 02:36:35PM +0800, Chon Ming Lee wrote:
> > >
gt; > Reviewed-by: Ville Syrjälä
>
> Queued for -next, thanks for the patch.
Looks like this one gives me bogus DPIO values at least some of the
time. Reverting to using 0x12 as the port ID seems to get me valid
values back...
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GT_FIFO_CPU_ERROR_MASK);
> > > > > + if (WARN(gtfifodbg, "GT wake FIFO error 0x%x\n", gtfifodbg))
> > > >
> > > > I think you still need mask, there are ro fields != 0 in the same
> > > > register.
> > >
> > > Which bits? VLV has those seven low bits, others just three low bits
> > > AFAICS.
> >
> > OK, so the problem is that bspec seems to list some bogus junk for these
> > registers. The gunit register HAS is what I used to write these patches.
> > Someone with a VLV on their hands should double check whether real
> > hardware agrees with the gunit register HAS. Any volunteers?
>
> Imre had a look on his VLV the other day, and the register contents seemed
> to match the Gunit register HAS. So I think these patches should be doing
> the right thing.
Reviewed-by: Jesse Barnes
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5_read32(dev_priv, GTFIFOCTL) &
> GT_FIFO_FREE_ENTRIES_MASK;
>
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> return ret;
I don't see this reg on HSW, but it looks like our HSW code uses this
routine?
Assuming the spec is just broken today..
re to review my earlier ones?
http://lists.freedesktop.org/archives/intel-gfx/2013-November/036112.html
http://lists.freedesktop.org/archives/intel-gfx/2013-November/036111.html
Thanks,
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This value is more correct, and matches what we read out in the fastboot
code. Without this, the watermark code will panic after the first mode
setting activity after a fastboot.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_pm.c | 14 +++---
1 file changed, 7 insertions
This value is more correct, and matches what we read out in the fastboot
code. Without this, the watermark code will panic after the first mode
setting activity after a fastboot.
v2: fix up HSW ->clock usage too (Ville)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_pm.c |
VLV 0x1300b8
> #define FORCEWAKE_ACK_MEDIA_VLV 0x1300bc
> #define FORCEWAKE_ACK_HSW 0x130044
This hunk is spurious, but doesn't really matter. Maybe Daniel can
trim it out when he applies.
Reviewed-by: Jesse Barnes
--
clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
> }
> @@ -443,6 +447,8 @@ static void i9xx_clock(int refclk, intel_clock_t *clock)
> {
> clock->m = i9xx_dpll_compute_m(clock);
> clock->p = clock->p1 * clock->p2;
> + if (WARN_ON(clock->n +
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_dp.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1e372d5..cb33b67 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915
On Wed, 4 Dec 2013 18:24:56 -0200
Paulo Zanoni wrote:
> 2013/12/4 Jesse Barnes :
> > This causes trouble on some VLV systems, and generally costs power
> > elsewhere.
> >
> > If this ends up causing trouble, it could just mean we need to get rid
> > of VDD force
d the
> implementation.
>
> So in short I know that my request extends the scope of your patches. But
> upstream also imposes differing constraints than a product tree.
It should be possible to still merge the automatic, in-kernel only DRRS
bits though, right? Then work on making d
for some reason Chris's code has been stalled the whole time (and
didn't we have a wq patch for the sprite unpin even before that?).
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);
> +
> + if ((pp & POWER_TARGET_ON) == 0)
> + msleep(intel_dp->panel_power_cycle_delay);
> }
> }
>
Lemme check the eDP docs on this one... it's supposed to be T12, which
is the time between power cycles. Yeah th
anel_vdd;
> + unsigned long last_power_cycle;
> + unsigned long last_power_on;
> + unsigned long last_backlight_off;
> bool psr_setup_done;
> struct intel_connector *attached_connector;
> };
> @@ -707,6 +710,7 @@ void hsw_enable_ips(struct intel_crtc *crt
t at the display */
> - if (IS_VALLEYVIEW(dev))
> - I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
> - DPLL_INTEGRATED_CRI_CLK_VLV);
> -
> intel_init_dpio(dev);
>
> mutex_lock(&dev->struct_mutex);
Reviewed-by: Jesse Barnes
--
Jesse Barnes, I
>
> intel_dp->psr_setup_done = false;
>
> - if (!intel_edp_init_connector(intel_dp, intel_connector)) {
> + if (!intel_edp_init_connector(intel_dp, intel_connector, &power_seq)) {
> i2c_del_adapter(&intel_dp->adapter);
> if (is_edp(intel_dp)) {
> cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
Yeah, seems reasonable.
Reviewed-by: Jesse Barnes
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It's needed for early mode state readout, which is in turn needed to
inherit the BIOS config. So split out the reset, which we need on
resume too, from the DPIO reg init, and do the latter earlier.
v2: split reset and reg init
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm
The BIOS code will need this to properly inherit the mode.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index af3717a..1ae3d44
)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 130 +--
drivers/gpu/drm/i915/intel_drv.h | 8 +++
3 files changed, 136 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915
We want to preserve the BIOS/bootloader contents for later.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index db75f22..53675d2
esse)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 4 +-
drivers/gpu/drm/i915/intel_drv.h | 4 +-
drivers/gpu/drm/i915/intel_fbdev.c | 235 ---
3 files changed, 224 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/
Otherwise subsequent fb activity will try to do blank/unblank on outputs
that were never fully enabled.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915
imary = drm_rect_equals(&dst, &clip);
> + disable_primary = drm_rect_equals(&dst, &clip) &&
> !colorkey_enabled(intel_plane);
> WARN_ON(disable_primary && !visible && intel_crtc->active);
>
> mutex_lock(&dev->struct_mutex
intel_drv.h
> @@ -580,6 +580,7 @@ void snb_enable_pm_irq(struct drm_i915_private *dev_priv,
> uint32_t mask);
> void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
> void hsw_pc8_disable_interrupts(struct drm_device *dev);
> void hsw_pc8_restore_interrupts(struct drm_device *dev);
> +int i915_get_crtc_scanline(struct drm_crtc *crtc);
>
>
> /* intel_crt.c */
Reviewed-by: Jesse Barnes
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pixel_size, fb->pitches[0]);
> linear_offset -= dvssurf_offset;
>
> + I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);
> + I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x);
> +
> if (obj->tiling_mode != I915_TILING_NONE)
> I915_WRITE(DVSTILEOFF(pipe), (y << 16) | x);
> else
Reviewed-by: Jesse Barnes
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9,8 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc
> *crtc,
> I915_MODIFY_DISPBASE(DVSSURF(pipe),
>i915_gem_obj_ggtt_offset(obj) + dvssurf_offset);
> POSTING_READ(DVSSURF(pipe));
> +
> + intel_pipe_update_end(crtc);
> }
>
> static void
> @@ -503,6 +571,8 @@ ilk_disable_plane(struct drm_plane *plane, struct
> drm_crtc *crtc)
> struct intel_plane *intel_plane = to_intel_plane(plane);
> int pipe = intel_plane->pipe;
>
> + intel_pipe_update_start(crtc);
> +
> I915_WRITE(DVSCNTR(pipe), I915_READ(DVSCNTR(pipe)) & ~DVS_ENABLE);
> /* Disable the scaler */
> I915_WRITE(DVSSCALE(pipe), 0);
> @@ -510,6 +580,8 @@ ilk_disable_plane(struct drm_plane *plane, struct
> drm_crtc *crtc)
> I915_MODIFY_DISPBASE(DVSSURF(pipe), 0);
> POSTING_READ(DVSSURF(pipe));
>
> + intel_pipe_update_end(crtc);
> +
> intel_update_sprite_watermarks(plane, crtc, 0, 0, false, false);
> }
>
It looks like we may need to check for preemption again on
local_irq_enable() according to preempt-locking.txt? Otherwise it
looks like this does the right thing.
With the above addressed or explained away:
Reviewed-by: Jesse Barnes
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951,8 +963,8 @@ intel_update_plane(struct drm_plane *plane, struct
> drm_crtc *crtc,
> else
> intel_plane->disable_plane(plane, crtc);
>
> - if (disable_primary)
> - intel_disable_primary(crtc);
> +
;
> local_irq_disable();
>
> + trace_i915_pipe_update_start(crtc, min, max);
> +
> intel_crtc->vbl_received = false;
> scanline = i915_get_crtc_scanline(crtc);
>
> @@ -78,10 +80,14 @@ static void intel_pipe_update_start(struct drm_crtc *crtc)
e
the sprite bits went in, but for some reason they've never been
merged. They're need to make the sprite stuff more usable by e.g.
Weston.
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On Thu, 12 Dec 2013 22:21:29 +0100
Daniel Vetter wrote:
> On Thu, Dec 12, 2013 at 12:41:52PM -0800, Jesse Barnes wrote:
> > The BIOS code will need this to properly inherit the mode.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i915/i
On Thu, 12 Dec 2013 22:30:41 +
Chris Wilson wrote:
> On Thu, Dec 12, 2013 at 12:41:57PM -0800, Jesse Barnes wrote:
> > Otherwise subsequent fb activity will try to do blank/unblank on outputs
> > that were never fully enabled.
>
> Hmm, actually this highlights a b
On Thu, 12 Dec 2013 23:39:39 +0100
Daniel Vetter wrote:
> On Thu, Dec 12, 2013 at 01:29:39PM -0800, Jesse Barnes wrote:
> > On Thu, 12 Dec 2013 22:21:29 +0100
> > Daniel Vetter wrote:
> >
> > > On Thu, Dec 12, 2013 at 12:41:52PM -0800, Jesse Barnes wrote:
> &
On Thu, 12 Dec 2013 23:54:37 +0100
Daniel Vetter wrote:
> On Thu, Dec 12, 2013 at 12:41:54PM -0800, Jesse Barnes wrote:
> > Retrieve current framebuffer config info from the regs and create an fb
> > object for the buffer the BIOS or boot loader left us. This should
>
ting wrong, but given how tricky it can be, can you explain
where we'll take the ref here, and show that the right thing will
happen if/when we mode set away from this buffer?
I haven't actually seen a bug here with or without this patch (no
crashes or warns), but I thought I neede
This allows us to hide queuing of enable/disable later.
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/intel_display.c | 83 +---
drivers/gpu/drm/i915/intel_drv.h | 1 +
4 files changed, 71 i
The intent is to get back to userspace as quickly as possible so it can
start doing drawing or whatever. It should also allow our
suspend/resume/init time to improve a lot.
---
drivers/gpu/drm/i915/i915_irq.c | 10 +-
drivers/gpu/drm/i915/intel_display.c | 27
Obviously still need a lot of work (and I didn't quite get the patch
split correctly, I meant commit the first bits earlier).
I think the approach may be sound though, and is actually not too hard
to get right with all the cross checking we have in place. Things to
fix:
- modeset cross check -
On Fri, 13 Dec 2013 21:47:45 +0100
Daniel Vetter wrote:
> On Fri, Dec 13, 2013 at 8:09 PM, Jesse Barnes
> wrote:
> > On Thu, 12 Dec 2013 23:54:37 +0100
> > Daniel Vetter wrote:
> >
> >> > @@ -258,8 +357,102 @@ static void intel_fbdev_de
rm_mode_config_reset(dev);
> > - intel_modeset_setup_hw_state(dev, false);
> > - drm_modeset_unlock_all(dev);
>
> As mention in the dpio fixup patch I'd like this code block move to be
> split out in a small prep patch.
Ok will do.
Thanks,
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On Sat, 14 Dec 2013 11:47:36 +0100
Daniel Vetter wrote:
> On Thu, Dec 12, 2013 at 12:41:56PM -0800, Jesse Barnes wrote:
> > It's needed for early mode state readout, which is in turn needed to
> > inherit the BIOS config. So split out the reset, which we need on
> >
On Sat, 14 Dec 2013 12:28:49 +0100
Daniel Vetter wrote:
> On Thu, Dec 12, 2013 at 12:41:55PM -0800, Jesse Barnes wrote:
> > We want to preserve the BIOS/bootloader contents for later.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > drivers/gpu/drm/i915/i
On Thu, 12 Dec 2013 22:30:41 +
Chris Wilson wrote:
> On Thu, Dec 12, 2013 at 12:41:57PM -0800, Jesse Barnes wrote:
> > Otherwise subsequent fb activity will try to do blank/unblank on outputs
> > that were never fully enabled.
>
> Hmm, actually this highlights a b
On Thu, 12 Dec 2013 14:44:33 -0800
Jesse Barnes wrote:
> On Thu, 12 Dec 2013 23:39:39 +0100
> Daniel Vetter wrote:
>
> > On Thu, Dec 12, 2013 at 01:29:39PM -0800, Jesse Barnes wrote:
> > > On Thu, 12 Dec 2013 22:21:29 +0100
> > > Daniel Vetter wrote:
> >
We only need to init the reg offset for DPIO once, but we need to reset
DPIO at resume time and at init time.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
: split out init ordering changes (Daniel)
don't fetch config if !CONFIG_FB
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 126 +++
drivers/gpu/drm/i915/intel_drv.h | 8 +++
3
We want to do this early on before we try to fetch the plane config,
which depends on some of the pipe config state.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915
Otherwise subsequent fb activity will try to do blank/unblank on outputs
that were never fully enabled.
v2: drop unnecessary enabled[] modifications in failure cases (Chris)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a
We want to preserve the BIOS/bootloader contents for later.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index db75f22..53675d2
Just add an early init since we may need to access DPIO regs early on.
The init call in modeset_init_hw is also needed for the resume case,
when we need to reset DPIO to keep things happy.
v2: split reset and reg init
v3: split patches (Daniel)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm
The BIOS code will need this to properly inherit the mode.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index af3717a..1ae3d44
esse)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 4 +-
drivers/gpu/drm/i915/intel_drv.h | 4 +-
drivers/gpu/drm/i915/intel_fbdev.c | 235 ---
3 files changed, 224 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/
roken state?
>
> Please file a bug report on bugs.freedesktop.org against DRI ->
> DRM(Intel). Also please always cc relevant mailing lists when
> reporting kernel issues.
Are you using X with a recent (well not ancient) X driver? Do you have
any other console drivers built in,
> >
> > Signed-off-by: Todd Previte
>
> Reviewed-by: Jani Nikula
Did this ever go in?
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On Tue, 17 Dec 2013 09:38:36 +0100
Daniel Vetter wrote:
> On Mon, Dec 16, 2013 at 04:01:41PM -0800, Jesse Barnes wrote:
> > On Sat, 14 Dec 2013 12:01:47 +0100
> > Daniel Vetter wrote:
> > > But I still think the fb lifetime management is a bit broken here and we
> &
On Tue, 17 Dec 2013 10:03:12 +
Chris Wilson wrote:
> On Mon, Dec 16, 2013 at 04:34:26PM -0800, Jesse Barnes wrote:
> > + if (INTEL_INFO(dev)->gen >= 4) {
> > + if (plane_config->tiled)
> > + offset = I915_READ(DSPTILEOFF
On Tue, 17 Dec 2013 10:34:39 +
Chris Wilson wrote:
> On Mon, Dec 16, 2013 at 04:34:27PM -0800, Jesse Barnes wrote:
> > @@ -333,7 +535,8 @@ MODULE_LICENSE("GPL and additional rights");
> > void intel_fbdev_output_poll_changed(struct drm_device *dev)
> > {
On Tue, 17 Dec 2013 22:17:22 +0100
Daniel Vetter wrote:
> On Tue, Dec 17, 2013 at 10:05 PM, Jesse Barnes
> wrote:
> >> On Mon, Dec 16, 2013 at 04:34:27PM -0800, Jesse Barnes wrote:
> >> > @@ -333,7 +535,8 @@ MODULE_LICENSE("GPL and a
On Tue, 17 Dec 2013 19:29:00 +
Chris Wilson wrote:
> On Mon, Dec 16, 2013 at 04:34:27PM -0800, Jesse Barnes wrote:
> > int intel_fbdev_init(struct drm_device *dev)
> > @@ -268,17 +461,25 @@ int intel_fbdev_init(struct drm_device *dev)
> > struct drm_i915_pr
Just add an early init since we may need to access DPIO regs early on.
The init call in modeset_init_hw is also needed for the resume case,
when we need to reset DPIO to keep things happy.
v2: split reset and reg init
v3: split patches (Daniel)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm
Along with refcounting changes and breakage.
---
drivers/gpu/drm/i915/i915_gem_stolen.c | 2 ++
drivers/gpu/drm/i915/intel_display.c | 39 ++
drivers/gpu/drm/i915/intel_drv.h | 1 -
drivers/gpu/drm/i915/intel_fbdev.c | 19 -
4 files cha
---
drivers/gpu/drm/i915/i915_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2d20390..f91cb12 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2119,9 +2119,9
: split out init ordering changes (Daniel)
don't fetch config if !CONFIG_FB
v8: use proper height in get_plane_config (Chris)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 130 +++
driver
For use by get_plane_config.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 0b8a058a..367d64d 100644
We only need to init the reg offset for DPIO once, but we need to reset
DPIO at resume time and at init time.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
We want to do this early on before we try to fetch the plane config,
which depends on some of the pipe config state.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915
Allocate this struct instead, so we can re-use another allocated
elsewhere if needed.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_fbdev.c | 27 +++
3 files
buffer if preallocated (Chris)
alloc ifbdev up front and pass to init_bios (Chris)
check for bad ifbdev in restore_mode too (Chris)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_fbdev.c | 111 ++---
2 file
.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_fbdev.c | 91 ++
1 file changed, 91 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index ee4b3c1..9e7f6d1 100644
--- a/drivers/gpu/drm/i915
even knew that when I was writing it... will fix.
--
Jesse Barnes, Intel Open Source Technology Center
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fbe0a188
> Author: Paulo Zanoni
> Date: Wed Jun 12 17:27:24 2013 -0300
> drm/i915: extract intel_edp_init_connector
>
> v2: - Rewrite commit message.
>
> Reviewed-by: Jesse Barnes
> Signed-off-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/in
diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 46aea6c..92de688 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -485,6 +485,9 @@ struct intel_dp {
> int backlight_off_delay;
> struct delayed_work panel_vdd_work;
> bool want_panel_vdd;
> + unsigned long last_power_cycle;
> + unsigned long last_power_on;
> + unsigned long last_backlight_off;
> bool psr_setup_done;
> struct intel_connector *attached_connector;
> };
We could bikeshed the name all day, but this looks like a great
improvement.
Reviewed-by: Jesse Barnes
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On Thu, 19 Dec 2013 14:29:41 -0200
Paulo Zanoni wrote:
> + * Reset everything, otherwise when suspend/resume gets very fast, we
> + * delay the resume based on the values that were set when we were still
> + * suspending.
> + */
> + intel_dp->last_power_on = tmp_jiffies -
CE_STATE_MASK)
> +#define IDLE_CYCLE_VALUE (0 | PP_SEQUENCE_NONE | 0
> | PP_SEQUENCE_STATE_OFF_IDLE)
>
> static void ironlake_wait_panel_status(struct intel_dp *intel_dp,
> u32 mask,
Reviewed-by: Jesse Barnes
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_OFF_VALUE (0 | PP_SEQUENCE_NONE | 0
> | 0)
>
> #define IDLE_CYCLE_MASK (PP_ON | PP_SEQUENCE_MASK |
> PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK)
> #define IDLE_CYCLE_VALUE (0 | PP_SEQUENCE_NONE | 0
>
NEL_POWER_UP_DELAY_SHIFT) |
> - (seq->t8 << PANEL_LIGHT_ON_DELAY_SHIFT);
> - pp_off = (seq->t9 << PANEL_LIGHT_OFF_DELAY_SHIFT) |
> + (1 << PANEL_LIGHT_ON_DELAY_SHIFT);
> + pp_off = (1 << PANEL_LIGHT_OF
On Thu, 19 Dec 2013 11:54:52 -0200
Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> We'll need this when we merge PC8 and Runtime PM: the PC8
> enable/disable functions need that lock.
>
> Also, it's good practice to not hold a lock for longer than strictly
> needed.
>
> Signed-off-by: Paulo Zano
On Thu, 19 Dec 2013 09:38:45 -0800
Jesse Barnes wrote:
> On Thu, 19 Dec 2013 14:29:43 -0200
> Paulo Zanoni wrote:
>
> > From: Paulo Zanoni
> >
> > Function ironlake_wait_panel_off should just wait for the power off
> > delay, while function ironlake_wait_
sible in the new mode.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 4d1357a..7e46d75 100644
--- a/drivers/gpu/drm/i915/intel_disp
uthor: Jesse Barnes
Date: Wed Nov 27 11:10:26 2013 -0800
drm/i915: use crtc_htotal in watermark calculations to match fastboot v2
It's needed for ILK+ platforms to fastboot without crashing on a divide
by 0 after a DPMS on action.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/
On Thu, 19 Dec 2013 10:48:01 -0800
Jesse Barnes wrote:
> When fastbooting, we read out the pipe timings early on, and then in a
> panel fitted config, disable the fitter later. But we weren't updating
> the pipe src h/w, which meant the mouse cursor was clipped to the
> pfitted
According to Art, we don't have a way to read back the state reliably at
runtime, at least not without risking disabling it again. So drop the
readout and checking on BDW.
References: https://bugs.freedesktop.org/show_bug.cgi?id=71906
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm
On Tue, 7 Jan 2014 08:07:13 +0100
Daniel Vetter wrote:
> On Tue, Jan 7, 2014 at 12:31 AM, Jesse Barnes
> wrote:
> > On Thu, 19 Dec 2013 10:48:01 -0800
> > Jesse Barnes wrote:
> >
> >> When fastbooting, we read out the pipe timings early on, and then in a
>
On Tue, 7 Jan 2014 08:07:13 +0100
Daniel Vetter wrote:
> On Tue, Jan 7, 2014 at 12:31 AM, Jesse Barnes
> wrote:
> > On Thu, 19 Dec 2013 10:48:01 -0800
> > Jesse Barnes wrote:
> >
> >> When fastbooting, we read out the pipe timings early on, and then in a
>
ranch in disable (Paulo)
always report IPS as enabled on BDW (Paulo)
References: https://bugs.freedesktop.org/show_bug.cgi?id=71906
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/intel_display.c | 19 +++
2 files change
On Tue, 7 Jan 2014 17:49:05 -0200
Paulo Zanoni wrote:
> 2014/1/6 Jesse Barnes :
> > According to Art, we don't have a way to read back the state reliably at
> > runtime, at least not without risking disabling it again. So drop the
> > readout and checking on BDW.
&
Otherwise we won't check the state until the next DPMS transition, which
may never happen.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
No idea if this is correct or not, all the WRPLL programming is new to
me. Paulo, can you take a look? At least it doesn't complain on my BDW
here...
Thanks,
Jesse
---
drivers/gpu/drm/i915/i915_reg.h | 6
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/intel_displa
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