_off()
Fixed in v2.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
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power_timestamps -> pps_init_timestamps
as this is what the functions do. Skip the intel_ prefix here to
emphasize these are static and not exported.
No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_pps.c | 37 ++--
1 file changed, 1
intel_display.c has some pps functions that belong to intel_pps.c. Move
them over.
While at it, refactor the duplicate intel_pps_init() in intel_display.c
into an orthogonal intel_pps_setup() in intel_pps.c, and call it earlier
in intel_modeset_init_nogem().
Signed-off-by: Jani Nikula
altogether.
Finally, remove some initialization from
vlv_initial_power_sequencer_setup() and do it in the caller to highlight
the similarity, not the difference, in the platforms.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_pps.c | 33 +++-
1 file c
Add some namespacing to highlight what belongs where. No functional
changes.
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_debugfs.c | 8 +-
.../drm/i915/display/intel_display_types.h| 61 +++---
drivers/gpu/drm/i915/display/intel_dp.c | 14 +-
drivers/gpu/drm
Split out the DP aux functionality to a new intel_dp_aux.[ch]. This is a
surprisingly clean cut.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 680 +--
drivers/gpu/drm/i915/display/intel_dp_aux.c
On Tue, 29 Dec 2020, Anshuman Gupta wrote:
> On 2020-12-22 at 20:19:46 +0530, Jani Nikula wrote:
>> Add a locked version of intel_pps_vdd_off_sync_unlocked() that does
>> everything the callers expect it to.
>>
>> Signed-off-by: Jani Nikula
>> ---
>>
(100,
>> 2000, 19200, 7000) and also nothing changed.
>>
>> Any thoughts?
>
> One possibility is that from the different backlight methods (DPCD,
> direct PWM on a CPU pin) the driver selects the incorrect one. Could you
> provide a log booting with
oday, so please hold off on
actually sending the rebased version for a bit longer.
BR,
Jani.
>
> On Fri, 2021-01-08 at 17:28 +0200, Jani Nikula wrote:
>> The pch_get_backlight(), lpt_get_backlight(), and lpt_set_backlight()
>> functions operate directly on the hardware register
--
> Colin Xu (1):
> drm/i915/gvt: Fix vfio_edid issue for BXT/APL
>
> drivers/gpu/drm/i915/gvt/display.c | 81
> +++---
> drivers/gpu/drm/i915/gvt/vgpu.c| 5 +--
> 2 files changed, 59 insertions(+), 27 deletions(-)
--
Jan
c99bf404a32 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -511,25 +511,34 @@ static u32 scale_hw_to_user(struct intel_connector
> *connector,
>0, user_max);
> }
>
> -static u32 intel_pan
ght() if we fail
> to read the current backlight mode from the DPCD
> * s/uint8_t/u8/
> * Remove unneeded parenthesis in intel_dp_aux_hdr_enable_backlight()
> * Use drm_dbg_kms() in intel_dp_aux_init_backlight_funcs()
>
> Signed-off-by: Lyude Paul
> Acked-by: Jani Nikula
> Cc:
rces i915 to only probe for the Intel
> backlight interface (might be useful if we find panels in the wild that
> report the VESA interface in their VBT, but actually only support the
> Intel backlight interface).
>
> v3:
> * Rebase
>
> Signed-off-by: Lyude Paul
> Reviewed-by:
Fix indenting error picked up by checkpatch in
> intel_edp_init_connector()
>
> Signed-off-by: Lyude Paul
> Acked-by: Jani Nikula
Still stands.
BR,
Jani.
> Cc: thay...@noraisin.net
> Cc: Vasily Khoruzhick
> ---
> drivers/gpu/drm/drm_dp_helper.c | 8
On Mon, 11 Jan 2021, Jani Nikula wrote:
> On Thu, 07 Jan 2021, Lyude Paul wrote:
>> This reverts commit 0883ce8146ed6074c76399f4e70dbed788582e12. Originally
>> these quirks were added because of the issues with using the eDP
>> backlight interfaces on certain laptop
On Mon, 11 Jan 2021, Jani Nikula wrote:
> On Fri, 08 Jan 2021, Lyude Paul wrote:
>> Reviewed-by: Lyude Paul
>>
>> Let me know when you've pushed this upstream and I'll go ahead and send out a
>> rebased version of my backlight series.
>
> Pushed, thank
- tgl_revids_get(p)->disp_stepping <= (until))
>> + tgl_stepping_get(p)->disp_stepping >= (since) && \
>> + tgl_stepping_get(p)->disp_stepping <= (until))
>>
>> -#define IS_TGL_UY_GT_REVID(p, since, until) \
>> +#define IS_TGL_
On Mon, 11 Jan 2021, Jani Nikula wrote:
> On Fri, 08 Jan 2021, Matt Roper wrote:
>> On Fri, Jan 08, 2021 at 03:18:52PM -0800, Aditya Swarup wrote:
>>> TGL adds another level of indirection for applying WA based on stepping
>>> information rather than PCI REVID. So
clude "intel_pxp.h"
>> > > #include "intel_pxp_context.h"
>> > >
>> > > +/* KCR register definitions */
>> >
>> > please define this in i915_reg.h
>>
>> Generally the trend on the GT side is to contain in a .c
On Mon, 11 Jan 2021, Aditya Swarup wrote:
> On 1/11/21 12:13 PM, Jani Nikula wrote:
>> On Fri, 08 Jan 2021, Matt Roper wrote:
>> FWIW I have a wip series changing the whole thing to abstract steppings
>> enums that are shared between platforms, but it's in a bit of lim
On Mon, 11 Jan 2021, Lucas De Marchi wrote:
> On Mon, Jan 11, 2021 at 10:13:15PM +0200, Jani Nikula wrote:
>>On Fri, 08 Jan 2021, Matt Roper wrote:
> in the end both sides will need that (even if it was a mistake to merge
> it in drm-intel-gt-next). I got an ack from Rodr
On Mon, 11 Jan 2021, Lucas De Marchi wrote:
> On Mon, Jan 11, 2021 at 12:57:43PM -0800, Matt Roper wrote:
>>On Mon, Jan 11, 2021 at 10:18:45PM +0200, Jani Nikula wrote:
>>So to clarify, it looks like we have a bunch of revid changes to the
>>display code that got merged to
On Mon, 11 Jan 2021, Aditya Swarup wrote:
> On 1/11/21 12:57 PM, Matt Roper wrote:
>> On Mon, Jan 11, 2021 at 10:18:45PM +0200, Jani Nikula wrote:
>>> On Mon, 11 Jan 2021, Jani Nikula wrote:
>>>> On Fri, 08 Jan 2021, Matt Roper wrote:
>>>>> On
There are no users outside of intel_memory_region.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_memory_region.c | 2 +-
drivers/gpu/drm/i915/intel_memory_region.h | 5 -
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_memory_region.c
There are no users outside of intel_region_lmem.c.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_region_lmem.c | 2 +-
drivers/gpu/drm/i915/intel_region_lmem.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c
b/drivers
o both places, then delete the topic
> branch.
Atm the problem is this:
$ git merge-base drm-intel/drm-intel-next drm-intel/drm-intel-gt-next
That would be the baseline for the topic branch.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
___
te_an_aksv,
> .read_bksv = intel_dp_hdcp_read_bksv,
> @@ -674,7 +650,7 @@ static const struct intel_hdcp_shim
> intel_dp_mst_hdcp_shim = {
> .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
> .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
> .toggle_signalling = intel_dp_mst_hdcp
On Tue, 12 Jan 2021, Chris Wilson wrote:
> Quoting Matthew Auld (2021-01-12 17:26:41)
>> On Tue, 12 Jan 2021 at 17:23, Jani Nikula wrote:
>> >
>> > There are no users outside of intel_region_lmem.c.
>> >
>> > Signed-off-by: Jani Nikula
>> R
On Fri, 08 Jan 2021, Jani Nikula wrote:
> On Thu, 24 Dec 2020, "Nautiyal, Ankit K" wrote:
>> Thanks Chris to catch this.
>>
>> This definitely should be bitwise Operator, as mentioned by Jani is
>> right thing to do.
>>
>> The PCON which I
On Fri, 28 May 2021, "Leizhen (ThunderTown)" wrote:
> On 2021/5/27 18:04, Jani Nikula wrote:
>> On Thu, 27 May 2021, Zhen Lei wrote:
>>> If intel_hdcp_validate_v_prime() has been successful within the allowed
>>> number of tries, we can directly call
INTEL_GEN(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915))
> + if (entry->relocation_count && !platform_has_relocs_enabled(eb))
> return -EINVAL;
>
> if (unlikely(entry->flags & eb->invalid_flags))
--
Jani Nikula, Intel Open Source Graphics Center
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ers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 3d8d68a98b95..8804ec7d3215 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -35,6 +35,7 @@
> #include
> #include
>
> +#include
> #include
> #include
> #include
> @
On Wed, 26 May 2021, Janusz Krzysztofik
wrote:
> Hi,
>
> On poniedziałek, 3 maja 2021 19:38:17 CEST Jani Nikula wrote:
>> On Thu, 29 Apr 2021, Janusz Krzysztofik
> wrote:
>> > Commit 7a0f9ef9703d ("drm/i915: Use drm_fb_helper_fill_info")
>> &g
* Wrap panel->backlight.edp.vesa.pwm_freq_pre_divider in
>> DP_EDP_BACKLIGHT_FREQ_AUX_SET_CAP check - Jani
>
> This looks okay to me now... Jani, agree?
Reviewed-by: Jani Nikula
>
>>
>> Signed-off-by: Lyude Paul
>> Cc: Jani Nikula
>> Cc: Dave Airlie
>> Cc: greg.de
/gpu/drm/i915/i915_drv.h | 3 ++
drivers/gpu/drm/i915/i915_mm.c| 44 +++
drivers/gpu/drm/i915/selftests/i915_request.c | 4 +--
5 files changed, 54 insertions(+), 7 deletions(-)
--
Jani Nikula, Intel Ope
On Wed, 02 Jun 2021, Daniel Vetter wrote:
> Adding Jani and Rodrigo since drm-intel-fixes is on them.
Just sent the fixes pull request with this for v5.13-rc5:
https://lore.kernel.org/r/87lf7rpcmp@intel.com
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Cen
gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -11493,6 +11493,8 @@ enum skl_power_gate {
> #define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25)
> #define SPLITTER_CONFIGURATION_2_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0)
> #define SPLITTER_CONFIGURATION_4_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1)
> +#define UNCOMPRESSED_JOINER_MASTER (1 << 21)
> +#define UNCOMPRESSED_JOINER_SLAVE (1 << 20)
>
> #define _ICL_PIPE_DSS_CTL2_PB0x78204
> #define _ICL_PIPE_DSS_CTL2_PC0x78404
--
Jani Nikula, Intel Open Source Graphics Center
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tc(old_crtc_state->uapi.crtc);
>> >struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> >
>> > - if (!(old_crtc_state->dsc.compression_enable &&
>> > - old_crtc_state->bigjoiner))
>> >
helpers to configure DSC for
Bigjoiner slave")
Fixes: d961eb20adb6 ("drm/i915/bigjoiner: atomic commit changes for
uncompressed joiner")
Cc: Animesh Manna
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 7 ++-
adb6 ("drm/i915/bigjoiner: atomic commit changes for
uncompressed joiner")
Cc: Animesh Manna
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
dif
On Thu, 03 Jun 2021, Jani Nikula wrote:
> On Fri, 14 May 2021, Matt Roper wrote:
>> From: Animesh Manna
>>
>> Respective bit for master or slave to be set for uncompressed
>> bigjoiner in dss_ctl1 register.
>
> I was looking at the changes here due to a static
On Thu, 03 Jun 2021, "Manna, Animesh" wrote:
>> -Original Message-----
>> From: Jani Nikula
>> Sent: Thursday, June 3, 2021 3:10 PM
>> To: Roper, Matthew D ; intel-
>> g...@lists.freedesktop.org
>> Cc: Manna, Animesh ; Navare, Manasi D
>>
On Thu, 03 Jun 2021, "Navare, Manasi" wrote:
> On Thu, Jun 03, 2021 at 06:49:23AM -0700, Manna, Animesh wrote:
>>
>>
>> > -Original Message-
>> > From: Jani Nikula
>> > Sent: Thursday, June 3, 2021 6:03 PM
>> > To: Rope
rivate *dev_priv,
> struct i915_power_well *power_well)
> {
> - int pw_idx = power_well->desc->hsw.idx;
> - enum phy phy = ICL_AUX_PW_TO_PHY(pw_idx); /* non-TBT only */
> - bool is_tbt = power_well
&& (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus)))
> return;
I've pushed this to din because supposedly this is urgent.
However, the && is supposed to be at the end of the previous line, and
there was a checkpatch email reply abou
inline, please fix them
afterwards.
BR,
Jani.
>
> v2: - Added has_cdclk_crawl as a feature flag to
> intel_device_info(Matt Roper)
> - s/gen13_cdclk_pll_crawl/adlp_cdclk_pll_crawl/
> (Matt Roper)
>
> Cc: Mika Kahola
> Signed-off-by: Stanislav Lisovskiy
&g
On Thu, 03 Jun 2021, Jani Nikula wrote:
> Pipe numbering isn't guaranteed to be contiguous; there may be fused off
> pipes in the middle. The current bigjoiner primary/secondary crtc lookup
> with pipe +/- 1 does not take this into account, and may fail
> unexpectedly. Fixing
On Wed, 09 Jun 2021, Jani Nikula wrote:
> On Thu, 03 Jun 2021, Jani Nikula wrote:
>> Pipe numbering isn't guaranteed to be contiguous; there may be fused off
>> pipes in the middle. The current bigjoiner primary/secondary crtc lookup
>> with pipe +/- 1 does not take
etc.
Fixes: 8a029c113b17 ("drm/i915/dp: Modify VDSC helpers to configure DSC for
Bigjoiner slave")
Fixes: d961eb20adb6 ("drm/i915/bigjoiner: atomic commit changes for
uncompressed joiner")
Cc: Animesh Manna
Cc: Manasi Navare
Cc: Vandita Kulkarni
Signed-off-by: Jani Nikula
--
On Fri, 11 Jun 2021, "Navare, Manasi" wrote:
> On Thu, Jun 10, 2021 at 12:05:28PM +0300, Jani Nikula wrote:
>> Add a single point of truth for figuring out the primary/secondary crtc
>> for bigjoiner instead of duplicating the magic pipe +/- 1 in multiple
>> p
On Tue, 08 Jun 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> In order to abstact the buf trans stuff let's wrap the platform
> specific structs into a union.
>
> v2: Handle adl-p
>
> Reviewed-by: Jani Nikula #v1
Holds for v2.
> Signed-off-by: Ville S
On Tue, 08 Jun 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Rename the dkl phy buf trans tables to follow the same
> naming pattern used by everyone else.
>
> v2: Handle adl-p
>
> Reviewed-by: Jani Nikula #v1
Holds for v2.
> Signed-off-by: Ville Syrjälä
&g
; + };
> ...>
>
> @@
> identifier wrap.old;
> @@
> (
> - ARRAY_SIZE(old)
> + old.num_entries
> |
> - old
> + old.entries
> )
>
> @@
> @@
> union intel_ddi_buf_trans_entry {
> ...
> };
> +
> +struct intel_ddi_buf_trans {
> + const un
> *num_entries)
> + {
> + *num_entries = ddi_translations->num_entries;
> + return ddi_translations->entries;
> + }
>
> v2: Handle adl-p
>
> Reviewed-by: Jani Nikula #v1
Holds for v2.
> Signed-off-by: Ville Syrjälä
> ---
> .../drm/i915/displa
On Tue, 08 Jun 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Raise the abstraction level of the get_buf_trans() functions
> a bit more by returning the whole wrapper intel_ddi_buf_trans
> struct.
>
> v2: Handle adl-p
>
> Reviewed-by: Jani Nikula #v1
Holds for
On Tue, 08 Jun 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Convert the get_buf_trans() functions into an encoder vfunc.
> Allows us to get rid of bunch of platform if-ladders.
>
> v2: Handle adl-p
>
> Reviewed-by: Jani Nikula #v1
Holds for v2.
> S
On Tue, 08 Jun 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Give RKL its own get_buf_trans() func.
>
> v2: Drop the FIXME since the spec was clarified to
> indicate that TGL values are used for the HDMI/eDP cases.
>
> Reviewed-by: Jani Nikula #v1
Holds
sure we use the proper buf trans tables for
> DP as well as eDP.
>
> v2: Add the hobl stuff
>
> Reviewed-by: Jani Nikula
Holds for v2.
> Signed-off-by: Ville Syrjälä
> ---
> .../drm/i915/display/intel_ddi_buf_trans.c| 55 +--
> 1 file changed,
On Tue, 08 Jun 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The icl combo phy DP HBR2 is identical to the eDP HBR3 table.
> Get rid of one redundant copy.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> .../drm/i915/display/intel
Y_VER(dev_priv) < 4 ||
> + (plane->has_fbc &&
> + plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
> +}
> +
> static inline struct intel_frontbuffer *
> to_intel_frontbuffer(struct drm_framebuffer *fb)
> {
--
Jani Nikula, Intel Open Source Graphics Center
iles changed, 66 insertions(+), 28 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
:
- Rebase
- Modify intel_dp_adjust_request_changed() and
intel_dp_link_max_vswing_reached() to take 128b/132b into
account. (Ville)
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 18 ++-
.../drm/i915/display/intel_dp_link_training.c | 124
ic_plane.h"
> +#include "display/intel_display.h"
> +#include "display/intel_fb.h"
The display/ prefixes are unnecessary in the same directory.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
d a few nitpicks I commented on. Overall this looks good to me, but
I'd like Ville's input on the code movement at the high level, are the
split and files sane etc. I can do the detailed review after that.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
; and "current". But it would seem bizarre to have
to wait until trying to operate a 128b/132b link layer at a certain bit
rate to figure this out.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 17 inser
The UHBR check was using > instead of >=. Use the helper instead to
avoid mistakes. Also always use the non-UHBR values for HDMI.
Fixes: 2817efaeb608 ("drm/i915/dg2: add SNPS PHY translations for UHBR link
rates")
Reported-by: Ville Syrjälä
Cc: Ville Syrjälä
Signed-off
rates")
Reported-by: Ville Syrjälä
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä # v1
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
On Thu, 07 Oct 2021, Ville Syrjälä wrote:
> On Thu, Oct 07, 2021 at 02:56:29PM +0300, Jani Nikula wrote:
>> The UHBR check was using > instead of >=. Use the helper instead to
>> avoid mistakes. Also always use the non-UHBR values for HDMI.
>>
>> Fixes: 2817efae
On Thu, 07 Oct 2021, Ville Syrjälä wrote:
> On Thu, Oct 07, 2021 at 01:57:27PM +0300, Jani Nikula wrote:
>> Limit the supported UHBR rates based on the repeater support, if there
>> are repeaters.
>>
>> This should be done in DP helper level, but that requires
Add per-lane abstraction for max vswing reached to make follow-up
cleaner, as this one reverses the conditions.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_dp_link_training.c | 42 +++
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git
/vswing instead of 128b132b/8b10b
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä # v3
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 18 ++-
.../drm/i915/display/intel_dp_link_training.c | 152 ++
2 files changed, 134 insertions(+), 36 deletions(-)
diff
On Thu, 07 Oct 2021, Ville Syrjälä wrote:
> On Thu, Oct 07, 2021 at 04:39:07PM +0300, Jani Nikula wrote:
>> Add per-lane abstraction for max vswing reached to make follow-up
>> cleaner, as this one reverses the conditions.
>>
>> Cc: Ville Syrjälä
&g
at's the
dependency.
BR,
Jani.
>
>> #define HAS_PSR_HW_TRACKING(dev_priv) \
>> (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
>> #define HAS_PSR2_SEL_FETCH(dev_priv) (GRAPHICS_VER(dev_priv) >= 12)
>> --
>> 2.29.0
--
Jani Nikula, Intel Open Source Graphics Center
struct intel_crtc_state *crtc_state);
>
> #endif /* __INTEL_PSR_H__ */
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index b52df4db3e8f..d18340cbf8ac 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -541,6 +541,9 @@ struct drm_panel;
> /* DFP Capability Extension */
> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */
>
> +#define DP_PANEL_REPLAY_SUPPORT 0x0b0
> +# define PANEL_REPLAY_SUPPORT (1 << 0)
> +
Often easier and better to split out drm helper changes to separate
patches for all kinds of reasons.
BR,
Jani.
> /* Link Configuration */
> #define DP_LINK_BW_SET 0x100
> # define DP_LINK_RATE_TABLE 0x00/* eDP 1.4 */
--
Jani Nikula, Intel Open Source Graphics Center
ct intel_dp *intel_dp);
> void intel_psr_resume(struct intel_dp *intel_dp);
> +void intel_panel_replay_compute_config(struct intel_dp *intel_dp,
> +struct intel_crtc_state *crtc_state);
>
> #endif /* __INTEL_PSR_H__ */
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index b52df4db3e8f..d18340cbf8ac 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -541,6 +541,9 @@ struct drm_panel;
> /* DFP Capability Extension */
> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */
>
> +#define DP_PANEL_REPLAY_SUPPORT 0x0b0
> +# define PANEL_REPLAY_SUPPORT (1 << 0)
> +
> /* Link Configuration */
> #define DP_LINK_BW_SET 0x100
> # define DP_LINK_RATE_TABLE 0x00/* eDP 1.4 */
--
Jani Nikula, Intel Open Source Graphics Center
(1 << 0)
> +
Previous patch has:
+#define DP_PANEL_REPLAY_SUPPORT 0x0b0
+# define PANEL_REPLAY_SUPPORT (1 << 0)
+
Also, it's called "PANEL REPLAY CAPABILITY SUPPORTED" in the spec, so
DP_PANEL_REPLAY_CAP or something sounds more like it.
> #define DP_PAYLOAD_ALLOCATE_SET 0x1c0
> #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
> #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
--
Jani Nikula, Intel Open Source Graphics Center
mpares sw and hw states. This seems off.
BR,
Jani.
> pipe_config->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
>
> if (!intel_dp->psr.psr2_enabled)
--
Jani Nikula, Intel Open Source Graphics Center
struct dentry *root);
> void drm_debugfs_cleanup(struct drm_minor *minor);
> void drm_debugfs_connector_add(struct drm_connector *connector);
> void drm_debugfs_connector_remove(struct drm_connector *connector);
> @@ -191,10 +191,9 @@ void drm_debugfs_crtc_add(struct drm_crtc *crtc);
> void drm_debugfs_crtc_remove(struct drm_crtc *crtc);
> void drm_debugfs_crtc_crc_add(struct drm_crtc *crtc);
> #else
> -static inline int drm_debugfs_init(struct drm_minor *minor, int minor_id,
> +static inline void drm_debugfs_init(struct drm_minor *minor, int minor_id,
> struct dentry *root)
> {
> - return 0;
> }
>
> static inline void drm_debugfs_cleanup(struct drm_minor *minor)
> --
> 2.32.0
>
--
Jani Nikula, Intel Open Source Graphics Center
On Wed, 06 Oct 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The struct itself already has sufficient namespace. No need to
> duplicate it in the members.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/in
On Wed, 06 Oct 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> All the values we have in {icl_mg,tgl_dkl}_phy_ddi_buf_trans
> fit into u8. Shrink the types accordingly.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/displ
On Wed, 06 Oct 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use <4 instead of <=3 as the terminating condition for the
> loops over the 4 lanes.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c
argue the phy should be before lane, but that's another
conversation.
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 14 +++---
> drivers/gpu/drm/i915/display/intel_combo_phy.c | 8
> drivers/gpu/drm/i915/display/intel_ddi.
gt;
> Signed-off-by: Ville Syrjälä
I admit not looking this up in spec, but this is dead code removal
anyway...
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 8
> drivers/gpu/drm/i915/i915_reg.h | 1 -
> 2 files changed, 9 d
On Wed, 06 Oct 2021, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Pull the convoluted loadgen calculation into a small helper.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 23 ++-
/vswing instead of 128b132b/8b10b
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c | 18 ++-
.../drm/i915/display/intel_dp_link_training.c | 152 ++
2 files changed, 134 insertions(+), 36 deletions(-)
diff
Add per-lane abstraction for max vswing reached to make follow-up
cleaner, as this one reverses the conditions.
v2: both conditions need to be true, reverse (Ville)
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_dp_link_training.c | 42 +++
1 file
> - drm_modeset_drop_locks(&ctx);
> - drm_modeset_acquire_fini(&ctx);
> + DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
>
> if (ret)
> drm_err(&dev_priv->drm,
--
Jani Nikula, Intel Open Source Graphics Center
On Mon, 11 Oct 2021, Jani Nikula wrote:
> Add per-lane abstraction for max vswing reached to make follow-up
> cleaner, as this one reverses the conditions.
>
> v2: both conditions need to be true, reverse (Ville)
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
Pushed bo
gt;ggtt_vma = NULL;
> + return PTR_ERR(vma);
> + }
> +
> + plane_state->dpt_vma = vma;
> +
> + WARN_ON(plane_state->ggtt_vma == plane_state->dpt_vma);
> + }
> +
> + return 0;
> +}
> +
> +void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
> +{
> + struct drm_framebuffer *fb = old_plane_state->hw.fb;
> + struct i915_vma *vma;
> +
> + if (!intel_fb_uses_dpt(fb)) {
> + vma = fetch_and_zero(&old_plane_state->ggtt_vma);
> + if (vma)
> + intel_unpin_fb_vma(vma, old_plane_state->flags);
> + } else {
> + struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> +
> + vma = fetch_and_zero(&old_plane_state->dpt_vma);
> + if (vma)
> + intel_unpin_fb_vma(vma, old_plane_state->flags);
> +
> + vma = fetch_and_zero(&old_plane_state->ggtt_vma);
> + if (vma)
> + intel_dpt_unpin(intel_fb->dpt_vm);
> + }
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h
> b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> new file mode 100644
> index ..e4fcd0218d9d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +#ifndef __INTEL_FB_PIN_H__
> +#define __INTEL_FB_PIN_H__
> +
> +#include
> +
> +struct drm_framebuffer;
> +struct i915_vma;
> +struct intel_plane_state;
> +struct i915_ggtt_view;
> +
> +struct i915_vma *
> +intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
> +bool phys_cursor,
> +const struct i915_ggtt_view *view,
> +bool uses_fence,
> +unsigned long *out_flags);
> +
> +void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
> +
> +int intel_plane_pin_fb(struct intel_plane_state *plane_state);
> +void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
> +
> +#endif
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
> b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index 53484267b2a4..adc3a81be9f7 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -46,6 +46,7 @@
> #include "i915_drv.h"
> #include "intel_display_types.h"
> #include "intel_fb.h"
> +#include "intel_fb_pin.h"
> #include "intel_fbdev.h"
> #include "intel_frontbuffer.h"
--
Jani Nikula, Intel Open Source Graphics Center
.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_dp_helper.c | 132
include/drm/drm_dp_helper.h | 21 -
2 files changed, 151 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm
e way.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_dp_link_training.c | 38 +++
1 file changed, 13 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_train
PROBE_ERROR(ct, "Failed to register %s buffer (%pe)\n",
>> + guc_ct_buffer_type_to_str(type), ERR_PTR(err));
Please tell me why we are adding not just i915-specific logging helpers,
but file specific ones?
To be honest I'd like to see all of the CT_ERROR, CT_DEBUG,
CT_PROBE_ERROR macros just gone.
BR,
Jani.
>> return err;
>> }
>>
>> --
>> 2.25.1
>>
--
Jani Nikula, Intel Open Source Graphics Center
On Tue, 12 Oct 2021, Jani Nikula wrote:
> On Mon, 11 Oct 2021, Matthew Brost wrote:
>> On Mon, Oct 11, 2021 at 08:51:03PM +0530, Thanneeru Srinivasulu wrote:
>>> Replace DRM_ERROR with CT_PROBE_ERROR to report early CTB failures.
>>>
>>> Signed-off-by: Than
x27;m not insisting on making changes, but I guess I need to be told it
doesn't matter.
BR,
Jani.
> + i915_ggtt_offset(ifbdev->vma));
>
> intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> vga_switcheroo_client_fb_set(pdev, info);
> return 0;
>
> out_unpin:
> - intel_unpin_fb_vma(vma, flags);
> + intel_fbdev_unpin(ifbdev);
> out_unlock:
> intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> return ret;
> @@ -316,8 +329,7 @@ static void intel_fbdev_destroy(struct intel_fbdev
> *ifbdev)
>
> drm_fb_helper_fini(&ifbdev->helper);
>
> - if (ifbdev->vma)
> - intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
> + intel_fbdev_unpin(ifbdev);
>
> if (ifbdev->fb)
> drm_framebuffer_remove(&ifbdev->fb->base);
--
Jani Nikula, Intel Open Source Graphics Center
ly want to split out sideband registers from i915_reg.h, and
they could go to vlv_sideband.h or vlv_sideband_reg.h or something
BR,
Jani.
Cc: Lucas De Marchi
Cc: Ville Syrjälä
Jani Nikula (1):
drm/i915: split out vlv sideband to a separate file
drivers/gpu/drm/i915/Makefile
The VLV/CHV sideband code is pretty distinct from the rest of the
sideband code. Split it out to new vlv_sideband.[ch].
Pure code movement with relevant #include changes, and a tiny checkpatch
fix on top.
Cc: Lucas De Marchi
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm
On Wed, 13 Oct 2021, Ville Syrjälä wrote:
> On Wed, Oct 13, 2021 at 01:11:58PM +0300, Jani Nikula wrote:
>> Three main ideas here:
>>
>> - vlv sideband only has the name "sideband" in common with the rest of
>> intel_sideband.[ch]
>
> I wouldn't
series/95408/
> State : failure
>
> But it builds without error against linux-next (tag next-20211001). Against
> which tree and branch do I need to build?
drm-tip [1]. It's a sort of linux-next for graphics. I think there are
still some branches that don't feed to linux-next.
BR,
Jani.
[1] https://cgit.freedesktop.org/drm/drm-tip
>
> Regards,
> Len
--
Jani Nikula, Intel Open Source Graphics Center
f(buff, PAGE_SIZE, "%u\n", tdc);
> +}
> +
> +static DEVICE_ATTR_RO(punit_req_freq_mhz);
> +static DEVICE_ATTR_RO(throttle_reason_status);
> +static DEVICE_ATTR_RO(throttle_reason_pl1);
> +static DEVICE_ATTR_RO(throttle_reason_pl2);
> +static DEVICE_ATTR_RO(throttle_reason_pl4);
> +static DEVICE_ATTR_RO(throttle_reason_thermal);
> +static DEVICE_ATTR_RO(throttle_reason_prochot);
> +static DEVICE_ATTR_RO(throttle_reason_ratl);
> +static DEVICE_ATTR_RO(throttle_reason_vr_thermalert);
> +static DEVICE_ATTR_RO(throttle_reason_vr_tdc);
> +
> +static const struct attribute *freq_attrs[] = {
> + &dev_attr_punit_req_freq_mhz.attr,
> + &dev_attr_throttle_reason_status.attr,
> + &dev_attr_throttle_reason_pl1.attr,
> + &dev_attr_throttle_reason_pl2.attr,
> + &dev_attr_throttle_reason_pl4.attr,
> + &dev_attr_throttle_reason_thermal.attr,
> + &dev_attr_throttle_reason_prochot.attr,
> + &dev_attr_throttle_reason_ratl.attr,
> + &dev_attr_throttle_reason_vr_thermalert.attr,
> + &dev_attr_throttle_reason_vr_tdc.attr,
> + NULL
> +};
> +
> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
>
> static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
--
Jani Nikula, Intel Open Source Graphics Center
ci_dev(uncore->i915->drm.dev);
> -
> - pci_iounmap(pdev, uncore->regs);
> + if (uncore->regs)
> + iounmap(uncore->regs);
> }
>
> void intel_uncore_init_early(struct intel_uncore *uncore,
> diff --git a/drivers/gpu/drm/i915/intel_uncore.h
> b/drivers/gpu/drm/i915/intel_uncore.h
> index d1d17b04e29f..83a455aa8374 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.h
> +++ b/drivers/gpu/drm/i915/intel_uncore.h
> @@ -29,6 +29,7 @@
> #include
> #include
> #include
> +#include
>
> #include "i915_reg.h"
>
> @@ -218,7 +219,7 @@ void
> intel_uncore_mmio_debug_init_early(struct intel_uncore_mmio_debug
> *mmio_debug);
> void intel_uncore_init_early(struct intel_uncore *uncore,
>struct drm_i915_private *i915);
> -int intel_uncore_setup_mmio(struct intel_uncore *uncore);
> +int intel_uncore_setup_mmio(struct intel_uncore *uncore, phys_addr_t
> phys_addr);
> int intel_uncore_init_mmio(struct intel_uncore *uncore);
> void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore,
> struct intel_gt *gt);
--
Jani Nikula, Intel Open Source Graphics Center
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