[Paging danvet to the bottom paragraphs re client-cap ...]
Hi Lionel,
I've still got quite a few concerns about the implementation as it
stands. Some are minor quibbles (e.g. can't unset blob IDs), some are
larger design issues, some are rehashed comments from previous series,
and some are new now
Hi,
On 17 December 2015 at 18:57, Lionel Landwerlin
wrote:
> @@ -289,22 +289,30 @@ static const struct intel_device_info
> intel_haswell_m_info = {
> static const struct intel_device_info intel_broadwell_d_info = {
> HSW_FEATURES,
> .gen = 8,
> + .num_samples_after_ctm = B
Hi,
On 17 December 2015 at 18:57, Lionel Landwerlin
wrote:
> @@ -311,7 +312,9 @@ static const struct intel_device_info
> intel_cherryview_info = {
> .gen = 8, .num_pipes = 3,
> .need_gfx_hws = 1, .has_hotplug = 1,
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_R
Hi,
On 17 December 2015 at 18:57, Lionel Landwerlin
wrote:
> void intel_crtc_attach_color_properties(struct drm_crtc *crtc)
> {
> + struct drm_device *dev = crtc->dev;
> + struct drm_mode_config *config = &dev->mode_config;
> + struct drm_mode_object *mode_obj = &crtc->base;
>
On 18 December 2015 at 15:17, Lionel Landwerlin
wrote:
> Signed-off-by: Lionel Landwerlin
> ---
> drivers/gpu/drm/drm_atomic.c | 12 +++-
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 65f007a..b8c90a
Hi,
On 18 December 2015 at 15:17, Lionel Landwerlin
wrote:
> A couple of people told me I should be able to set a blob property to
> NULL from user space using a blob id 0. I couldn't get that to work
> (probably nobody's doing this at the moment). Here is a patch to make
> that work.
You can't
The previous code would wait for fences on the framebuffer from the old
plane state to complete, rather than the new, so you would see tearing
everywhere. Fix this to wait on the new state before we make it active.
Signed-off-by: Daniel Stone
Fixes: 94f050246b42 ("drm/i915: nonblocking c
Hi,
On Friday, 21 October 2016, Patchwork
wrote:
>
> Test gem_ringfill:
> Subgroup basic-default-hang:
> pass -> TIMEOUT(fi-hsw-4770r)
> Subgroup basic-default-interruptible:
> pass -> INCOMPLETE (fi-hsw-4770r)
> Test gem_storedw_loo
Hi Mika,
On 15 November 2016 at 12:38, Mika Kahola wrote:
> Testcase for plane visibility after atomic modesets. The idea of the test
> is the following:
>
> - draw a blue screen with high resolution
> - enable a yellow plane, visible, in lower-left corner
> - set a new lower resolution mode (
eq(x, y), or any of
the igt_assert_{eq,neq} variants, e.g. _u32 for comparing uint32_t.
You can also use do_or_die(foo) as shorthand for igt_assert_eq(foo,
0).
With those addressed:
Reviewed-by: Daniel Stone
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gf
Hi,
On 25 February 2016 at 05:15, Tian, Kevin wrote:
> I had some replies to this mailing list yesterday, but received below
> notification:
>
> ---
> Delivery is delayed to these recipients or groups:
>
> intel-gfx@lists.freedesktop.org
>
> Subject: RE: [RFCv2 PATCH 00/14] gvt: Hacking i915 for
f a copy-paste operation.
History rather than copy & paste; originally crtc_commit_*() was
inlined. But the rest of your analysis is totally correct; thanks for
finding this!
Reviewed-by: Daniel Stone
Cheers,
Daniel
___
Intel-gfx maili
On Wed, 2016-03-02 at 14:21 +, Chris Wilson wrote:
> On Wed, Mar 02, 2016 at 03:00:14PM +0100, Tomeu Vizoso wrote:
> > @@ -1006,8 +1019,9 @@ static cairo_surface_t *get_cairo_surface(int
> > fd, struct igt_fb *fb)
> > create_cairo_surface__gtt(fd, fb);
> > }
> >
> > -
On Wed, 2016-03-02 at 14:39 +, Chris Wilson wrote:
> On Wed, Mar 02, 2016 at 02:22:58PM +0000, Daniel Stone wrote:
> > On Wed, 2016-03-02 at 14:21 +, Chris Wilson wrote:
> > > On Wed, Mar 02, 2016 at 03:00:14PM +0100, Tomeu Vizoso wrote:
> > > > - gem
On Wed, 2016-03-02 at 14:54 +, Chris Wilson wrote:
> On Wed, Mar 02, 2016 at 02:40:44PM +0000, Daniel Stone wrote:
> > On Wed, 2016-03-02 at 14:39 +, Chris Wilson wrote:
> > > Don't forget to call dirtyfb then.
> > Are you talking about frontbuffer rendering
Hey,
On 5 March 2016 at 12:30, Daniel Vetter wrote:
> On Wed, Mar 02, 2016 at 03:00:15PM +0100, Tomeu Vizoso wrote:
>> +int igt_create_bo_with_dimensions(int fd, int width, int height,
>
> Needs gtkdoc. Also this seems to overlap in functionality with the very
> recently added igt_calc_fb_size. C
>> Intel
>> platforms.
>> > This series is based of a previous set of patches by Shashank Sharma.
>
> Acked-by: Rob Bradford
And for the non-Intel-specific parts (e.g. I haven't checked the exact
maths for conversion to/from BDW fixed-point, or CH
On 10 March 2016 at 12:04, Lionel Landwerlin
wrote:
> Check properly that the allocated blob's pointer is valid.
>
> Signed-off-by: Lionel Landwerlin
> Reported-by: Dan Carpenter
> Cc: Daniel Stone
Reviewed-by: Daniel Stone
_
Hi guys,
On Nov 30 2016, at 10:49 pm, Rob Clark wrote:
> yeah, {cgit,anongit}.fd.o have been having problems all day.. (the ssh
git urls for folks who have push access work fine).. although it has
worked for me a couple times today, given enough time.
>
> (not sure if we have git
Hi Stephen,
On 1 December 2016 at 20:45, Stephen Rothwell wrote:
> On Thu, 01 Dec 2016 11:02:26 +0000 Daniel Stone wrote:
>> Sorry about this, it is quite bad. I think having mirrors for the key DRM
>> trees on GitHub is a good idea though, and I can get to setting that up.
>&
Hi Mika,
Thanks for respinning!
On 23 November 2016 at 11:49, Mika Kahola wrote:
> +bool kmstest_plane_visible(void)
> +{
> + char tmp[256];
> + FILE *fid;
> + bool visible = false;
> + struct kmstest_resolution resolution;
> + const char *mode = "r";
> + int r
causing plane_primary_legacy to fail; ditto for cursor.
Make find_plane try harder, by preferring to return planes which are
already on the requested CRTC.
Signed-off-by: Daniel Stone
Reported-by: Robert Foss
Cc: Eric Anholt
---
tests/kms_atomic.c | 13 +++--
1 file changed, 11 insertions(+), 2 d
On 13 December 2016 at 23:08, Daniel Vetter wrote:
> This is single-threaded setup code, no need for locks. And anyway,
> all properties need to be set up before the driver is registered
> anyway, they can't be hot-added.
>
> Signed-off-by: Daniel Vetter
Revie
Hi,
On 27 April 2016 at 03:03, Dave Airlie wrote:
> diff --git a/drivers/gpu/drm/drm_crtc_helper.c
> b/drivers/gpu/drm/drm_crtc_helper.c
> index 66ca313..29b7835 100644
> --- a/drivers/gpu/drm/drm_crtc_helper.c
> +++ b/drivers/gpu/drm/drm_crtc_helper.c
> @@ -456,6 +456,9 @@ drm_crtc_helper_disab
Hi,
On 27 April 2016 at 03:03, Dave Airlie wrote:
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 9d5e3c8..d899dac 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1179,6 +1179,15 @@ drm_atomic_set_crtc_for_connector(struct
Hi,
On 27 April 2016 at 03:03, Dave Airlie wrote:
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 9d5e3c8..d899dac 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1179,6 +1179,15 @@ drm_atomic_set_crtc_for_connector(struct
ommit 6a0d036483caf87d43ebe2edd1905873446c9589.
Signed-off-by: Daniel Stone
Cc: Ben Widawsky
Cc: Topi Pohjolainen
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 ++--
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 10 ++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h
nything obviously wrong, for patches 1-5:
Reviewed-by: Daniel Stone
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
et's share the embarrassment. What could possibly go wrong?
Reviewed-by: Daniel Stone
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
rom Maarten and
> hopefully kicks the CI system (I never got any CI test results back from v2).
For the series, with Maarten and Lyude's amendments:
Tested-by: Daniel Stone
I was seeing pretty savage underflows on eDP+DP SKL, but these have
gone away with this patchset on top of -n
Hi,
On 9 May 2016 at 08:05, Daniel Vetter wrote:
> On Mon, May 02, 2016 at 11:38:15AM -0700, Kenneth Graunke wrote:
>> On Monday, May 2, 2016 3:40:14 PM PDT Daniel Stone wrote:
>> > This commit broke Weston/KMS, and presumably also xf86-video-modesetting.
>>
>>
Hi Vandana,
On 18 March 2016 at 16:50, Vandana Kannan wrote:
> The reason for using a plane property instead of fb modifier:-
> In Android, OGL passes a render compressed buffer to hardware composer (HWC),
> which would then request a flip on that buffer after checking if the target
> can support
Hi Gary,
On 21 March 2016 at 12:20, Smith, Gary K wrote:
> What are the objections to this change?
Exactly the same as the last time we discussed it: that you're abusing
plane properties to contain fundamental properties of the buffer you
want to scan out, i.e. that which naturally belongs in th
On 22 March 2016 at 13:30, Daniel Stone wrote:
> Exactly the same as the last time we discussed it
I should add that I understand your previous objection that creating
framebuffers on the fly is not performant enough, and you object to
the effort of managing 100 rather than 50 framebuff
T test when running on kernels that don't
> advertise support for atomic modesetting.
That was certainly the intention.
Reviewed-by: Daniel Stone
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesk
n the library, but with those
> addressed imo ready to go. Would be great if someone else (Daniel Stone?)
> could check the final patches in detail before pushing, but upfront ack
> from my side.
I went through and reviewed the changes here, and have been happy with
them after some very
Hi,
On 30 January 2017 at 11:46, Petri Latvala wrote:
> NAK.
>
> DRIVER_VGEM is omitted from DRIVER_ANY intentionally. Vgem is unable
> to modeset, unable to render, practically it only supports the
> vgem-specific tests. See also: lib/drmtest.c, __drm_open_driver().
Yeah, I agree with this. It'
Hi,
On 2 February 2017 at 07:41, Maarten Lankhorst
wrote:
> i915 is pretty much feature complete. Support for atomic i915-specific
> connector properties is still missing; those properties can (for now)
> only be set through the legacy ioctl.
>
> ILK style watermarks and gen9+ watermarks are hand
Hi,
On 6 February 2017 at 17:59, Daniel Vetter wrote:
> On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote:
>> This initial series implements 4 ringbuffers to give sufficient coverage for
>> the
>> range of priority levels requested by the GLES and compute extensions. The
>> targeted
Hey,
On 9 February 2017 at 12:49, Maarten Lankhorst
wrote:
> Op 02-02-17 om 17:26 schreef Daniel Stone:
>> On 2 February 2017 at 07:41, Maarten Lankhorst
>> wrote:
>>> Flip the switch!!
>> Not until we have the multi-CRTC event support please. :\ I don't wa
Hi,
On 2 October 2015 at 11:56, Daniel Vetter wrote:
> Logical negation is hard.
>
> Cc: "Morton, Derek J"
> Signed-off-by: Daniel Vetter
Almost identical to what I had locally.
s/second integers/second integer/ and:
Reviewed-by: Daniel
Hi,
On 13 October 2015 at 16:35, Daniel Vetter wrote:
>> +void igt_require_propblob(int fd)
>> +{
>> + struct local_drm_mode_create_blob c;
>> + struct local_drm_mode_destroy_blob d;
>> + uint32_t blob_data;
>> + c.data = &blob_data;
>> + c.length = sizeof(blob_data);
>> +
>>
Hi,
On 23 October 2015 at 09:05, Daniel Vetter wrote:
> On Thu, Oct 22, 2015 at 05:27:00PM -0700, Matt Roper wrote:
>> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
>> index 51d735d..53bfc20 100644
>> --- a/lib/igt_kms.c
>> +++ b/lib/igt_kms.c
>> @@ -984,6 +984,9 @@ void igt_display_init(igt_display
Hi,
Following on from the previous few series, most of which have been
merged ...
Add some self-tests for igt-assert_*() to make sure they do the right
thing, including for fds. This is a bit gross, but does work.
Do a Cocci run through the tree. This doesn't actually pick up a lot
of the changes
This should hit the bug fixed in:
XXX FIXME INSERT SEANPAUL COMMIT CITE
which was introduced with the initial blob support in:
commit e2f5d2ea479b9b2619965d43db70939589afe43a
Author: Daniel Stone
Date: Fri May 22 13:34:51 2015 +0100
drm/mode: Add user blob-creation ioctl
Signed-off-by: Daniel Stone
---
tests/drm_import_export.c| 2 +-
tests/gem_bad_reloc.c| 8 ++
tests/gem_concurrent_all.c | 6 ++--
tests/gem_ctx_exec.c | 9 ++
tests/gem_ctx_param_basic.c | 4 +--
tests/gem_mmap_gtt.c | 8
: Fix RELAX_MODE thinko and refresh CRTC state in find_crtc.
Co-authored-by: Micah Fedke
Signed-off-by: Daniel Stone
---
configure.ac |2 +-
tests/.gitignore |1 +
tests/Makefile.sources |1 +
tests/kms_atomic.c | 1345
Make sure our igt_assert variants are doing something that looks vaguely
like the right thing.
Signed-off-by: Daniel Stone
---
lib/tests/Makefile.sources | 1 +
lib/tests/igt_simple.c | 173 +
2 files changed, 174 insertions(+)
create mode
Make sure our igt_assert variants are doing something that looks vaguely
like the right thing.
v7.1: Rename to igt_assert, add to .gitignore.
Signed-off-by: Daniel Stone
---
lib/tests/.gitignore | 1 +
lib/tests/Makefile.sources | 1 +
lib/tests/igt_assert.c | 173
The GuC firmware load requires struct_mutex to create a GEM object,
but this collides badly with request_firmware. Move struct_mutex
locking down into the loader itself, so we don't hold it across the
entire load process, including request_firmware.
Signed-off-by: Daniel Stone
---
driver
Hi Patrik,
On 3 November 2015 at 21:21, Patrik Jakobsson
wrote:
> On Tue, Nov 3, 2015 at 11:35 AM, Imre Deak wrote:
>> All of Mika's patches [1] have an R-b, except patch 7/7.
>> [2] has R-b's as well except for patch 1/13. Sunil any update on that?
>
> It could be that Dave is hitting the warm
Hi Mika,
On 30 October 2015 at 15:52, Mika Kuoppala
wrote:
> There is known issue on GT interrupt delivery with DC6 and
> firmwares <1.21. There is a suspicion that this causes
> spurious gpu hangs on driver init and with some workloads,
> as upgrading the firmware to 1.21 makes these problems
>
Hi Rodrigo,
On 3 November 2015 at 23:23, Vivi, Rodrigo wrote:
> On Tue, 2015-11-03 at 21:49 +0000, Daniel Stone wrote:
>> On 30 October 2015 at 15:52, Mika Kuoppala
>> wrote:
>> > With < 1.23 there is a palette and dmc ram corruption issue
>> &
Hi,
On 3 November 2015 at 22:08, Patrik Jakobsson
wrote:
> On Tue, Nov 3, 2015 at 10:47 PM, Daniel Stone wrote:
>> I tested this on top of the three series (Mika's, Imre's, and yours),
>> but hit some power domain warnings and I never come back from DPMS.
>> That
mit message, patches 1,4,12 have changes from me, so
> someone else would need to review those.
>
> I tested this on BXT and SKL, on SKL-Y with additional patches from
> Patrik and Paulo I could reach PC10 state.
Tested-by: Daniel Stone # SKL
Cheers,
Daniel
_
ht be forgotten. The third from Ville helps with handling DC off when
> doing Aux A communication.
Tested-by: Daniel Stone # SKL
The intel_atomic_commit changes obviously conflict with Maarten's
async-commit-completion work, but when trivially rebased on top it
work
es (all 7):
Tested-by: Daniel Stone # SKL
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Hi,
On 3 November 2015 at 12:31, Patrik Jakobsson
wrote:
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index c6d60b8..e401871 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13296,6 +13296,9 @
Hi,
On 3 November 2015 at 12:31, Patrik Jakobsson
wrote:
> We need DC5/DC6 to be disabled around modesets to prevent confusing the
> DMC. Also, we've run out of bits in the 32 bit power domain mask so now
> it's a 64 bit mask.
There are quite a lot of users in intel_display.c (search for
put_dom
niels: New; only required when working against Patrik/Imre's tree.]
Signed-off-by: Daniel Stone
---
drivers/gpu/drm/i915/intel_display.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drive
Hi,
On 5 November 2015 at 17:12, Patrik Jakobsson
wrote:
> On Thu, Nov 5, 2015 at 4:02 PM, Daniel Stone wrote:
>> On 3 November 2015 at 12:31, Patrik Jakobsson
>> wrote:
>>> We need DC5/DC6 to be disabled around modesets to prevent confusing the
>>> DMC. Also
Hi,
On 6 November 2015 at 14:17, Imre Deak wrote:
> On pe, 2015-11-06 at 13:53 +0000, Daniel Stone wrote:
>> On 5 November 2015 at 17:12, Patrik Jakobsson
>> wrote:
>> > Ah yes, we carry the mask around there as well. Thanks for catching
>> > that. I like the
Hi,
On 6 November 2015 at 13:53, Daniel Stone wrote:
> On 5 November 2015 at 17:12, Patrik Jakobsson
> wrote:
>> On Thu, Nov 5, 2015 at 4:02 PM, Daniel Stone wrote:
>>> On 3 November 2015 at 12:31, Patrik Jakobsson
>>> wrote:
>>>> We need DC5/DC6
Hi,
On 5 November 2015 at 18:49, Rodrigo Vivi wrote:
> +void intel_ips_init(struct drm_i915_private dev_priv)
That would be *dev_priv.
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listi
Hi Rodrigo,
On 5 November 2015 at 18:49, Rodrigo Vivi wrote:
> diff --git a/drivers/gpu/drm/i915/intel_ips.c
> b/drivers/gpu/drm/i915/intel_ips.c
> index b867aba..6bc5c55 100644
> --- a/drivers/gpu/drm/i915/intel_ips.c
> +++ b/drivers/gpu/drm/i915/intel_ips.c
> @@ -105,18 +105,21 @@ bool intel_i
Hi Rodrigo,
On 5 November 2015 at 18:49, Rodrigo Vivi wrote:
> So I'm confident we can enable PSR back by default now.
>
> All comments, ideas, suggestions and even bikesheddings are pretty welcome.
You did ask for it ...
I've been looking at pulling this on top of Maarten's tree, and
currently
Hi Rodrigo,
On 10 November 2015 at 15:57, Vivi, Rodrigo wrote:
> On Mon, 2015-11-09 at 11:47 +0000, Daniel Stone wrote:
>> I've been looking at pulling this on top of Maarten's tree, and
>
> I'm afraid I didn't followed completely your idea and maybe beca
Hi,
On 5 November 2015 at 18:49, Rodrigo Vivi wrote:
> /**
> + * intel_ips_disable_if_alone - Disable IPS if alone in the pipe.
> + * @crtc: intel crtc
> + *
> + * This function should be called when primary plane is being disabled.
> + * It checks if there is any other plane enabled on the pipe
Hi,
On 11 November 2015 at 23:31, Vivi, Rodrigo wrote:
> On Tue, 2015-11-10 at 16:34 +0000, Daniel Stone wrote:
>> On 5 November 2015 at 18:49, Rodrigo Vivi
>> wrote:
>> > +void intel_ips_disable_if_alone(struct intel_crtc *crtc)
>> > +{
>> > +
Hi Paulo,
On 4 November 2015 at 19:10, Paulo Zanoni wrote:
> So Ville pointed a problem on patch 02/26 of the previous series, and the nice
> fix for that would make me rebase most of the subsequent patches. In order to
> avoid blocking the other patches on the review of patch 02 and in order to
Hey,
On 13 November 2015 at 16:36, Zanoni, Paulo R wrote:
> Em Sex, 2015-11-13 às 15:49 +0000, Daniel Stone escreveu:
>> On 4 November 2015 at 19:10, Paulo Zanoni
>> wrote:
>> > So Ville pointed a problem on patch 02/26 of the previous series,
>> > and the nic
Hi Rodrigo,
On 5 November 2015 at 18:49, Rodrigo Vivi wrote:
> With this we know if IPS is actually enabled.
> It might not be activated on BDW since Hardware take
> the decision and do its transition. However we have
> the visibility of the state on our driver what we didn't
> had until this pat
Hi,
On 13 November 2015 at 18:38, Ville Syrjälä
wrote:
> On Fri, Nov 13, 2015 at 06:20:00PM +0000, Daniel Stone wrote:
>> Maybe that's not the best approach, but I think we need to find a way
>> to take the synchronous vblank wait out of the modeset path. Using a
>> w
On 13 November 2015 at 20:28, Ville Syrjälä
wrote:
> On Fri, Nov 13, 2015 at 06:55:18PM +0000, Daniel Stone wrote:
>> On 13 November 2015 at 18:38, Ville Syrjälä
>> wrote:
>> > On Fri, Nov 13, 2015 at 06:20:00PM +, Daniel Stone wrote:
>> >> Maybe that
crtc_state->mode_changed = true;
How about doing it in intel_crtc_duplicate_state instead? Should be a
bit more bulletproof/correct against various other failure modes. But
I guess this does work, and it is all going away shortly, so:
Reviewed-by: Daniel Stone
I th
Hi,
On 18 November 2015 at 15:59, Andy Lutomirski wrote:
> On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä
> wrote:
>> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote:
>>> Typing:
>>>
>>> # cat /sys/devices/pci:00/:00:02.0/rom
>>>
>>> Provokes:
>>>
>>> i915 :00:02.0: I
Hi Rodrigo,
On 19 November 2015 at 00:39, Rodrigo Vivi wrote:
> @@ -441,15 +438,14 @@ void intel_psr_enable(struct intel_dp *intel_dp)
> /*
> * FIXME: Activation should happen immediately since this function
> * is just called after pipe is fully trained and enabled.
> -
eading this chunk of the commit message, I also went
looking for possible_clones and came to the same conclusion. On the
grounds that great minds think alike (or fools never differ, not
sure):
Reviewed-by: Daniel Stone
Cheers,
Daniel
___
Intel-gfx maili
Hi Vandana,
On 23 December 2015 at 03:20, Kannan, Vandana wrote:
> How does VT switch work in case of rotation, setting different pixel format,
> etc?
Pixel format is a property of the framebuffer, not a per-plane
property, so is unaffected. Rotation is generic, so there is specific
code to hand
Hi,
On 21 December 2015 at 12:38, Daniel Vetter wrote:
> On Fri, Dec 18, 2015 at 04:53:28PM +0000, Daniel Stone wrote:
>> > +struct drm_r32g32b32 {
>> > + /*
>> > +* Data is in U8.24 fixed point format.
>> > +* All platfor
Hi Dhanya,
On 29 December 2015 at 03:59, Dhanya Pillai wrote:
> This patch will verify color correction capability of a display
> driver.
> Gamma/CSC/De-gamma for SKL/BXT supported.
The commit message here seems odd, given this:
> + switch (prop_name) {
> +
struct drm_device *dev, struct drm_pending_event
>> *e) {
>> assert_spin_locked(&dev->event_lock);
>>
>> + if (!e->file_priv) {
>
> I don't think this could happen before this patch as e->file_priv is
> dereferenced below, and I don&
Hi,
On 5 January 2016 at 10:23, Daniel Vetter wrote:
> On Wed, Dec 23, 2015 at 09:47:00AM +0000, Daniel Stone wrote:
>> It's not even a legacy vs. atomic thing, this can happen in
>> pure-atomic as well. Same as the render-compression plane property
>> that I ju
On 12 January 2016 at 15:59, Yetunde Adebisi wrote:
> + memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
gcc should've warned you about this; you're memsetting too small a size.
Cheers,
Daniel
___
Intel-gfx mailing list
Intel-gf
On 12 January 2016 at 17:18, Jani Nikula wrote:
> On Tue, 12 Jan 2016, Daniel Stone wrote:
>> On 12 January 2016 at 15:59, Yetunde Adebisi
>> wrote:
>>> + memset(intel_dp->edp_dpcd, 0, sizeof(intel_dp->edp_dpcd));
>>
>> gcc should'
Hi,
On 18 January 2016 at 12:10, Maarten Lankhorst
wrote:
> Op 13-01-16 om 14:02 schreef Ville Syrjälä:
>> Also I'm not sure it isn't a step backwards. Based on the spec we should
>> be able to keep IPS enabled as long as one plane (possibly referring to
>> either primary or sprite) is enabled on
Hi,
On 10 September 2015 at 16:02, Daniel Vetter wrote:
> On Wed, Sep 09, 2015 at 10:04:23AM -0700, Jesse Barnes wrote:
>> On 09/09/2015 09:36 AM, Smith, Gary K wrote:
>> > I don't understand why this is an issue. Surely the fb is to describe
>> > static state about the buffer, not dynamic state.
Hi,
On 20 January 2016 at 14:52, Maarten Lankhorst
wrote:
> Op 15-01-16 om 10:06 schreef Marius Vlad:
>> + /* populate plane req */
>> + igt_atomic_populate_plane_req(req, plane, IGT_PLANE_CRTC_ID,
>> crtc_id);
> Set crtc_id and fb_id to 0 when disabling plane.
>> +
Hi Lionel,
On 21 January 2016 at 15:03, Lionel Landwerlin
wrote:
> + /* Workaround : Do not read or write the pipe palette/gamma data while
> +* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS
> enabled.
> +*/
> + if (IS_HASWELL(dev) && intel_crtc->config
ous set of patches by Shashank Sharma and takes
> into account of the comments by Daniel Stone & Daniel Vetter.
This is a lot more tractable than previous series, thanks! I think a
lot of the confusion I had around this was from the number of
hardware-specific features stuffed into this,
Hi,
On 22 January 2016 at 16:21, Daniel Vetter wrote:
> On Fri, Jan 22, 2016 at 04:06:15PM +, Lionel Landwerlin wrote:
>> On 22/01/16 15:04, Daniel Stone wrote:
>> >Now with everything just using split-gamma mode, I'm much happier with
>> >how this is look
Hi,
On 22 January 2016 at 21:20, Matt Roper wrote:
> Probably should have noticed/commented on this on your previous
> iteration, but should we also restrict these new properties to be
> atomic-only? I thought there was a consensus a while back that new
> functionality would only be exposed for
; Thanks
> Gary
>
>
>
>
> -Original Message-
> From: Jesse Barnes [mailto:jbar...@virtuousgeek.org]
> Sent: Monday, January 25, 2016 5:39 PM
> To: Daniel Stone ; Daniel Vetter
> Cc: intel-gfx@lists.freedesktop.org; Thierry Reding
> ; Smith, Gary K
> Subjec
irely.
i.e. this property is useless for open-source userspace, which can
never hint that render compression has been resolved. So fine by me if
you want to merge it I guess, and we'll just ignore it.
Cheers,
Daniel
> Thanks
> Gary
>
>
> -Original Message-
> From: Daniel
Hi,
On 25 January 2016 at 18:40, Eric Anholt wrote:
> Daniel has suggested that I put vc4 testing into igt, since it's got
> the piglit integration and KMS coverage already. This gets the ccore
> building so that I can start writing tests.
Works for me.
Reviewed-by: Daniel
Wait, no, thought of a bikeshed:
#if defined(__i386__) || defined(__x86_64__)
On 25 January 2016 at 19:30, Daniel Stone wrote:
> Hi,
>
> On 25 January 2016 at 18:40, Eric Anholt wrote:
>> Daniel has suggested that I put vc4 testing into igt, since it's got
>> the
Some bits can't be built on non-x86 architectures, mostly because they
require x86-specific assembly primitives. Disable these by default on
non-x86 architectures.
Signed-off-by: Daniel Stone
---
Makefile.am | 10 +++---
configure.ac | 37 -
2
Hi,
On 25 January 2016 at 18:40, Eric Anholt wrote:
> It's autodetected if its dependencies are present, but it doesn't
> build for ARM, nor am I interested in it for now.
The one I just sent auto-disables it when not building on x86.
Cheers,
Daniel
_
Hi,
On 22 January 2016 at 15:04, Daniel Stone wrote:
> On 21 January 2016 at 15:03, Lionel Landwerlin
> wrote:
>> Hi,
>>
>> This serie introduces pipe level color management through a set of properties
>> attached to the CRTC. It also provides an implementati
Hi Ben,
On 16 May 2017 at 22:31, Ben Widawsky wrote:
> Updated blob layout (Rob, Daniel, Kristian, xerpi)
If you take the attached fixup, this is:
Reviewed-by: Daniel Stone
The rest of the series looks fine to me, so you can take my Acked-by,
but I'm currently off work sick and am a
101 - 200 of 323 matches
Mail list logo
