Re: [Intel-gfx] [PATCH 2/2] drm: Remove drm_mode_validate_clocks

On Wed, Jul 31, 2013 at 12:11:08AM -0700, Stéphane Marchesin wrote: > Signed-off-by: Stéphane Marchesin Merged both to my temporary tree for when Daniel returns. -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-

[Intel-gfx] [PATCH] drm/i915/hsw: Change default LLC age to 3

The default LLC age was changed: commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d Author: Ben Widawsky Date: Thu Jul 4 11:02:03 2013 -0700 drm/i915/hsw: Set correct Haswell PTE encodings. This caused a regression in performance on certain benchmarks. While I think a discussion still needs to

[Intel-gfx] [PATCH 00/29] Completion of i915 VMAs v2

ction stuff to the end of the series. I think Daniel requested that one too, but I can't remember. Odds are with all this rebasing, I introduced new bugs. I've been a bit too preoccupied to check each patch thoroughly - but the end result is right, and works. Ben Widawsky (29): drm/i9

[Intel-gfx] [PATCH 01/29] drm/i915: Create an init vm

Move all the similar address space (VM) initialization code to one function. Until we have multiple VMs, there should only ever be 1 VM. The aliasing ppgtt is a special case without it's own VM (since it doesn't need it's own address space management). Signed-off-by: Ben Widawsk

[Intel-gfx] [PATCH 02/29] drm/i915: Rework drop caches for checkpatch

With an upcoming change to bind, to make checkpatch happy and keep the code clean, we need to rework this code a bit. This should have no functional impact. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions

[Intel-gfx] [PATCH 03/29] drm/i915: Make proper functions for VMs

le at it, kill off the set_color interface. We'll always have the VMA, or easily get to it. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 83 --- drivers/gpu/drm/i915/i915_gem.c | 78 ++-- drivers/gp

[Intel-gfx] [PATCH 04/29] drm/i915: Use bound list for inactive shrink

Do to the move active/inactive lists, it no longer makes sense to use them for shrinking, since shrinking isn't VM specific (such a need may also exist, but doesn't yet). What we can do instead is use the global bound list to find all objects which aren't active. Signed-off-b

[Intel-gfx] [PATCH 05/29] drm/i915: Add VM to pin

und for it (i915_gem_obj_ggtt_pin). v2: s/i915_gem_ggtt_pin/i915_gem_obj_ggtt_pin Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h| 11 +++ drivers/gpu/drm/i915/i915_gem.c| 9 + drivers/gpu/drm/i915/i915_gem_context.c| 4 ++-- drivers/gp

[Intel-gfx] [PATCH 06/29] drm/i915: Use ggtt_vm to save some typing

Just some small cleanups, and a rename of vm->ggtt_vm requested by Daniel. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c| 19 --- drivers/gpu/drm/i915/i915_gem_stolen.c | 10 +- 2 files changed, 13 insertions(+), 16 deletions(-) diff --gi

[Intel-gfx] [PATCH 08/29] drm/i915: Rework __i915_gem_shrink

In order to do this for all VMs, it's convenient to rework the logic a bit. This should have no functional impact. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_ge

[Intel-gfx] [PATCH 07/29] drm/i915: Update describe_obj

: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 61ffa71..d6154cb 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b

[Intel-gfx] [PATCH 09/29] drm/i915: thread address space through execbuf

overall series echoes this style of, "add a VM, then make it smart later" Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 77 +++--- 1 file changed, 49 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c

[Intel-gfx] [PATCH 10/29] drm/i915: make caching operate on all address spaces

space). Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 20 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 3ce9d0d..adb0a18 100644 --- a/drivers/gpu/drm/i915/i915_gem.c

[Intel-gfx] [PATCH 12/29] drm/i915: make reset&hangcheck code VM aware

. Since we still only have 1 VM ever, this code shouldn't yet any any impact. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 30 +++--- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 14/29] drm/i915: Restore PDEs on gtt restore

I can't remember why I added this initially. TODO: Throw out if not necessary Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 1e

[Intel-gfx] [PATCH 11/29] drm/i915: BUG_ON put_pages later

sense anyway, IMO. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index adb0a18..dbf72d5 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/driver

[Intel-gfx] [PATCH 13/29] drm/i915: clear domains for all objects on reset

Simply iterating over 1 inactive list is insufficient for the way we now track inactive (1 list per address space). We could alternatively do this with bound + unbound lists, and an inactive check. To me, this way is a bit easier to understand. Signed-off-by: Ben Widawsky --- drivers/gpu/drm

[Intel-gfx] [PATCH 15/29] drm/i915: Improve VMA comments

Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2579e96..dbfffb2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm

[Intel-gfx] [PATCH 16/29] drm/i915: Cleanup more of VMA in destroy

Remove the VMA from the object's list, and remove the VMA's node from the allocator. This just helps avoid duplication, since we always want those two things to occur on destroy, and at least for now, we only do those two actions on destroy anyway. Signed-off-by: Ben Widawsky --- d

[Intel-gfx] [PATCH 17/29] drm/i915: plumb VM into bind/unbind code

le in the current case, since 1 object can only ever be bound into > 1 address space thus far - we may as well try to get something more > future proof in place now. With a prep patch before this to switch over > to using the bound list + inactive check, we're now able to carry that

[Intel-gfx] [PATCH 18/29] drm/i915: Use new bind/unbind in eviction code

Eviction code, like the rest of the converted code needs to be aware of the address space for which it is evicting (or the everything case, all addresses). With the updated bind/unbind interfaces of the last patch, we can now safely move the eviction code over. Signed-off-by: Ben Widawsky

[Intel-gfx] [PATCH 19/29] drm/i915: turn bound_ggtt checks to bound_any

-- i915_gem_object_is_inactive | global object i915_gem_object_put_pages| object's pages 915_gem_object_unpin | global object i915_gem_execbuffer_unreserve_object | temporary until we plumb vma pread/pread | object's domain Signed-o

[Intel-gfx] [PATCH 20/29] drm/i915: Fix up map and fenceable for VMA

cteristics. Functionally, this commit could very well be squashed in to a previous patch which updated object operations to take a VM argument. This commit is split out because it's a bit tricky (or at least it was for me). Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c |

[Intel-gfx] [PATCH 21/29] drm/i915: mm_list is per VMA

5_gem_object_set_to_gtt_domain (Chris) v3: Moved earlier in the series v4: Add dropped message from v3 Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c| 53 -- drivers/gpu/drm/i915/i915_drv.h| 5 +-- drivers/gpu/drm/i

[Intel-gfx] [PATCH 22/29] drm/i915: Update error capture for VMs

encies on the mm_list change. Since I've moved the mm_list change to an earlier point in the series, we were able to accomplish it here and now. v3: Rebased over new error capture Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 4 +- dr

[Intel-gfx] [PATCH 23/29] drm/i915: Add vma to list at creation

With the current code there shouldn't be a distinction - however with an upcoming change we intend to allocate a vma much earlier, before it's actually bound anywhere. To do this we have to check node allocation as well for the _bound() check. Signed-off-by: Ben Widawsky --- drive

[Intel-gfx] [PATCH 24/29] drm/i915: create vmas at execbuf

s) Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h| 3 +++ drivers/gpu/drm/i915/i915_gem.c| 25 ++--- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 18 +- 3 files changed, 34 insertions(+), 12 deletions(-) diff --git a/d

[Intel-gfx] [PATCH 25/29] drm/i915: Convert execbuf code to use vmas

. Unfortunately, to do this, we must move the exec_list link from the obj structure. This list is reused in the eviction code, so we must also modify the eviction code to make this work. v2: Release table lock early, and two a 2 phase vma lookup to avoid having to use a GFP_ATOMIC. (Chris) Signed-off-by: Ben

[Intel-gfx] [PATCH 26/29] drm/i915: Convert active API to VMA

Even though we track object activeness and not VMA, because we have the active_list be based on the VM, it makes the most sense to use VMAs in the APIs. NOTE: Daniel intends to eventually rip out active/inactive LRUs, but for now, leave them be. Signed-off-by: Ben Widawsky --- drivers/gpu/drm

[Intel-gfx] [PATCH 27/29] drm/i915: Add bind/unbind object functions to VM

ache levels Use VMA for bind/unbind (Daniel, Ben) Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 69 +--- drivers/gpu/drm/i915/i915_gem_gtt.c | 101 2 files changed, 140 insertions(+), 30 deletions(-) diff --git

[Intel-gfx] [PATCH 29/29] drm/i915: eliminate vm->insert_entries()

ppings. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_gtt.c | 17 + 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 74b5077..4e6e176 100644 --- a/drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH 28/29] drm/i915: Use the new vm [un]bind functions

s the smart ggtt which can do aliasing as needed Make sure we bind to global gtt when mappable and fenceable. I thought we could get away without this initialy, but we cannot. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h| 9 -- drivers/gpu/drm/i915/i915_

[Intel-gfx] [PATCH] [v2] drm/i915/hsw: Change default LLC age to 3

The default LLC age was changed: commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d Author: Ben Widawsky Date: Thu Jul 4 11:02:03 2013 -0700 drm/i915/hsw: Set correct Haswell PTE encodings. This caused a regression in performance on certain benchmarks. While I think a discussion still needs to

[Intel-gfx] [PATCH] [v3] drm/i915/hsw: Change default LLC age to 3

The default LLC age was changed: commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d Author: Ben Widawsky Date: Thu Jul 4 11:02:03 2013 -0700 drm/i915/hsw: Set correct Haswell PTE encodings. This caused a regression in performance on certain benchmarks. While I think a discussion still needs to

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Use Write-Through cacheing for the display plane on Iris

be useful here? I don't think so. We should never be ioremapping the buffers with these mappings. > > If so, do you need it for real RAM (i.e. pages that the kernel considers > to be direct-mappable RAM) or just for MMIO space? > > --Andy It is for real RAM, but agai

Re: [Intel-gfx] [PATCH] drm/i915: Do not dereference NULL crtc or fb until after checking

-0300 > > > > drm/i915: Hook PSR functionality > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67526 > > Signed-off-by: Chris Wilson > > Cc: Rodrigo Vivi > > Cc: Ben Widawsky > > Cc: Daniel Vetter > > --- > > drivers/

[Intel-gfx] [PULL] drm-intel-next-queued

2245: drm/i915: Do not dereference NULL crtc or fb until after checking (2013-08-02 14:13:45 -0700) ---- Ben Widawsky (1): drm/i915/hsw: Change default LLC age to 3 Chris Wilson (5): drm/i915: Squelch repeated reasoning for wh

Re: [Intel-gfx] [PATCH 02/29] drm/i915: Rework drop caches for checkpatch

On Sat, Aug 03, 2013 at 12:32:35PM +0100, Chris Wilson wrote: > On Wed, Jul 31, 2013 at 04:59:55PM -0700, Ben Widawsky wrote: > > With an upcoming change to bind, to make checkpatch happy and keep the > > code clean, we need to rework this code a bit. > > > > This shoul

Re: [Intel-gfx] [PATCH 13/29] drm/i915: clear domains for all objects on reset

On Sat, Aug 03, 2013 at 11:59:42AM +0100, Chris Wilson wrote: > On Wed, Jul 31, 2013 at 05:00:06PM -0700, Ben Widawsky wrote: > > Simply iterating over 1 inactive list is insufficient for the way we now > > track inactive (1 list per address space). We could alternatively do >

Re: [Intel-gfx] [PATCH 19/29] drm/i915: turn bound_ggtt checks to bound_any

On Sat, Aug 03, 2013 at 12:03:35PM +0100, Chris Wilson wrote: > On Wed, Jul 31, 2013 at 05:00:12PM -0700, Ben Widawsky wrote: > > In some places, we want to know if an object is bound in any address > > space, and not just the global GTT. This often applies when there is a &g

Re: [Intel-gfx] [PATCH] [v3] drm/i915/hsw: Change default LLC age to 3

On Sun, Aug 04, 2013 at 09:10:25PM +0200, Daniel Vetter wrote: > On Fri, Aug 2, 2013 at 12:56 AM, Ben Widawsky wrote: > > The default LLC age was changed: > > commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d > > Author: Ben Widawsky > > Date: Thu Jul 4 11:02:03 2013

Re: [Intel-gfx] [PATCH] [v3] drm/i915/hsw: Change default LLC age to 3

On Mon, Aug 05, 2013 at 01:03:29AM +0200, Daniel Vetter wrote: > On Sun, Aug 4, 2013 at 10:55 PM, Ben Widawsky wrote: > > On Sun, Aug 04, 2013 at 09:10:25PM +0200, Daniel Vetter wrote: > >> On Fri, Aug 2, 2013 at 12:56 AM, Ben Widawsky wrote: > >> > The default LLC

[Intel-gfx] [PATCH] [v4] drm/i915/hsw: Change default LLC age to 3

The default LLC age was changed: commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d Author: Ben Widawsky Date: Thu Jul 4 11:02:03 2013 -0700 drm/i915/hsw: Set correct Haswell PTE encodings. On the surface it would seem setting a default age wouldn't matter because all GEM BOs are aged simi

[Intel-gfx] [PATCH 13/29] drm/i915: eliminate dead domain clearing on reset

ris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index d37f5c0..3b9558f 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/

Re: [Intel-gfx] [PATCH 18/29] drm/i915: Use new bind/unbind in eviction code

On Tue, Aug 06, 2013 at 08:39:50PM +0200, Daniel Vetter wrote: > On Wed, Jul 31, 2013 at 05:00:11PM -0700, Ben Widawsky wrote: > > Eviction code, like the rest of the converted code needs to be aware of > > the address space for which it is evicting (or the everything case, al

Re: [Intel-gfx] [PATCH 19/29] drm/i915: turn bound_ggtt checks to bound_any

On Tue, Aug 06, 2013 at 08:43:42PM +0200, Daniel Vetter wrote: > On Wed, Jul 31, 2013 at 05:00:12PM -0700, Ben Widawsky wrote: > > In some places, we want to know if an object is bound in any address > > space, and not just the global GTT. This often applies when there is a &g

Re: [Intel-gfx] [PATCH 18/29] drm/i915: Use new bind/unbind in eviction code

On Tue, Aug 06, 2013 at 11:29:49PM +0200, Daniel Vetter wrote: > On Tue, Aug 06, 2013 at 02:27:39PM -0700, Ben Widawsky wrote: > > On Tue, Aug 06, 2013 at 08:39:50PM +0200, Daniel Vetter wrote: > > > On Wed, Jul 31, 2013 at 05:00:11PM -0700, Ben Widawsky wrote: > &g

Re: [Intel-gfx] [PATCH 18/29] drm/i915: Use new bind/unbind in eviction code

On Wed, Aug 07, 2013 at 12:59:29AM +0200, Daniel Vetter wrote: > On Wed, Aug 7, 2013 at 12:57 AM, Ben Widawsky wrote: > >> > We need evict_everything for #1. For #2, we call evict_something already > >> > for the vm when we go through the out of space path. If t

Re: [Intel-gfx] [PATCH 21/29] drm/i915: mm_list is per VMA

On Tue, Aug 06, 2013 at 09:38:41PM +0200, Daniel Vetter wrote: > On Wed, Jul 31, 2013 at 05:00:14PM -0700, Ben Widawsky wrote: > > formerly: "drm/i915: Create VMAs (part 5) - move mm_list" > > > > The mm_list is used for the active/inactive LRUs. Since those LRUs

Re: [Intel-gfx] [PATCH] drm/i915: increase the default timeout in wait_seqno to 60s

his regression has been introduced in Ben's wait with timeout ioctl > work in: > > commit 5c81fe85dad3c8c2bcec03e3fc2bfd4ea198763c > Author: Ben Widawsky > Date: Thu May 24 15:03:08 2012 -0700 > > drm/i915: timeout parameter for seqno wait > > Also fix whitespa

Re: [Intel-gfx] [PATCH 18/29] drm/i915: Use new bind/unbind in eviction code

On Wed, Aug 07, 2013 at 01:44:58AM +0200, Daniel Vetter wrote: > On Wed, Aug 7, 2013 at 1:25 AM, Ben Widawsky wrote: > > On Wed, Aug 07, 2013 at 12:59:29AM +0200, Daniel Vetter wrote: > >> On Wed, Aug 7, 2013 at 12:57 AM, Ben Widawsky wrote: > >> >> > We need

Re: [Intel-gfx] [PATCH 20/29] drm/i915: Fix up map and fenceable for VMA

On Tue, Aug 06, 2013 at 09:11:54PM +0200, Daniel Vetter wrote: > On Wed, Jul 31, 2013 at 05:00:13PM -0700, Ben Widawsky wrote: > > formerly: "drm/i915: Create VMAs (part 3.5) - map and fenceable > > tracking" > > > > The map_and_fenceable tracking is per obj

Re: [Intel-gfx] [PATCH 21/29] drm/i915: mm_list is per VMA

On Wed, Aug 07, 2013 at 10:52:14PM +0200, Daniel Vetter wrote: > On Tue, Aug 06, 2013 at 05:28:06PM -0700, Ben Widawsky wrote: > > On Tue, Aug 06, 2013 at 09:38:41PM +0200, Daniel Vetter wrote: > > > On Wed, Jul 31, 2013 at 05:00:14PM -0700, Ben Widawsky wrote: > > > &g

Re: [Intel-gfx] [PATCH] drm/i915: Prevent loading of uninitialized context garbage

dummy load without the mandatory RESTORE_EX_STATE_EN bit so that the real load causes us to initialise the extended state of the context before it is then loaded by the LCA update. References: https://bugs.freedesktop.org/show_bug.cgi?id=64073 Signed-off-by: Chris Wilson Cc: Ben Widawsky If you

Re: [Intel-gfx] [PATCH 21/29] drm/i915: mm_list is per VMA

On Thu, Aug 08, 2013 at 08:46:46AM +0200, Daniel Vetter wrote: > On Thu, Aug 8, 2013 at 6:32 AM, Ben Widawsky wrote: > > You killed a BUG in i915_gem_retire_requests_ring, shouldn't that be a WARN > > or are you in the business of completely killing assertions now :p? >

Re: [Intel-gfx] [PATCH] drm/i915: Don't load context at driver init time on SNB

e bit isn't sticking as it should. Clearly doing the write is having an effect, but something is seriously wrong. Writing the bit manually with IGT does make the bit stick. Stéphane, could you try to write the bit with IGT before and after resume, and see if it helps? Adding Jesse to the CC, sin

[Intel-gfx] [PATCH 4/5] drm: WARN when removing unallocated node

an not frequently occuring error path. Another was fixed during patch iteration, so it's hard to see from the patch: commit c6cfb325677ea6305fb19acf3a4d14ea267f923e Author: Ben Widawsky Date: Fri Jul 5 14:41:06 2013 -0700 drm/i915: Embed drm_mm_node in i915 gem obj >From the i

[Intel-gfx] [PATCH 3/5] drm/i915: Remove node only when allocated

In upcoming code, it will be possible for a vma to have been created, but no space reserved for it in the address space. The drm_mm semantics are such that trying to remove an unallocated node is not allowed. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 3 ++- 1 file

[Intel-gfx] [PATCH 2/5] drm/i915: bind m&f cleanup

Cleanup the map and fenceable setting during bind to make more sense, and not check i915_is_ggtt() 2 unnecessary times Recommended-by: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 16 +++- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git

[Intel-gfx] [PATCH 1/5] drm/i915: WARN_ON failed map_and_fenceable

I just noticed in our code we don't really check the assertion, and given some of the code I am changing in this area, I feel a WARN is very nice to have. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 5/5] drm/i915: Convert execbuf code to use vmas

From: Ben Widawsky In order to transition more of our code over to using a VMA instead of an pair - we must have the vma accessible at execbuf time. Up until now, we've only had a VMA when actually binding an object. The previous patch helped handle the distinction on bound vs. unbound.

Re: [Intel-gfx] [PATCH 1/5] drm/i915: WARN_ON failed map_and_fenceable

On Sat, Aug 10, 2013 at 10:58:30AM +0200, Daniel Vetter wrote: > On Fri, Aug 09, 2013 at 10:12:12PM -0700, Ben Widawsky wrote: > > I just noticed in our code we don't really check the assertion, and > > given some of the code I am changing in this area, I feel a WARN is v

Re: [Intel-gfx] [PATCH] drm/i915: Drop the overzealous warning from i915_gem_set_cache_level

> 1.8.4.rc2 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 1/2] drm/i915: Initialize seqno for VECS too

Cc: Mika Kuoppala Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65387 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67198 Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/2] drm/i915: Get VECS semaphore info on error

Ideally we could use for_each_ring with the ring flags as I've done a couple times (http://lists.freedesktop.org/archives/intel-gfx/2013-June/029450.html). Until Daniel merges that patch though, we can just use this. Cc: Mika Kuoppala Signed-off-by: Ben Widawsky --- drivers/gpu/drm

Re: [Intel-gfx] [PATCH 2/5] drm/i915: bind m&f cleanup

On Sat, Aug 10, 2013 at 09:41:16AM +0100, Chris Wilson wrote: > On Fri, Aug 09, 2013 at 10:12:13PM -0700, Ben Widawsky wrote: > > Cleanup the map and fenceable setting during bind to make more sense, > > and not check i915_is_ggtt() 2 unnecessary times > > > > R

[Intel-gfx] [PATCH 2/5] [v2] drm/i915: cleanup map&fence in bind

on those unless specifically asked. Recommended-by: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 18 -- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index b91a7f0

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Remove node only when allocated

On Sat, Aug 10, 2013 at 09:45:05AM +0100, Chris Wilson wrote: > On Fri, Aug 09, 2013 at 10:12:14PM -0700, Ben Widawsky wrote: > > In upcoming code, it will be possible for a vma to have been created, > > but no space reserved for it in the address space. The drm_mm semantics &g

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Convert execbuf code to use vmas

On Sat, Aug 10, 2013 at 10:13:20AM +0100, Chris Wilson wrote: > On Fri, Aug 09, 2013 at 10:12:16PM -0700, Ben Widawsky wrote: > > static int > > i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring, > > - stru

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Initialize seqno for VECS too

On Mon, Aug 12, 2013 at 04:53:03PM -0700, Ben Widawsky wrote: > Cc: Mika Kuoppala > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65387 > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67198 > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/inte

[Intel-gfx] [PATCH 1/4] [v2] drm/i915: Remove node only when allocated

. v2: use goto destroy as a compromise (Chris) Cc: Chris Wilson Cc: Paulo Zanoni Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 3d9e248b..4a58ead 1

[Intel-gfx] [PATCH 2/4] [v3] drm/i915: cleanup map&fence in bind

on those unless specifically asked. v3: Add newline between variable declaration and logic (Chris) Recommended-by: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 19 +-- 1 file changed, 9 insertions(+), 10 deletions

[Intel-gfx] [PATCH 3/4] drm: WARN when removing unallocated node

an not frequently occuring error path. Another was fixed during patch iteration, so it's hard to see from the patch: commit c6cfb325677ea6305fb19acf3a4d14ea267f923e Author: Ben Widawsky Date: Fri Jul 5 14:41:06 2013 -0700 drm/i915: Embed drm_mm_node in i915 gem obj >From the i

[Intel-gfx] [PATCH 4/4] [v4] drm/i915: Convert execbuf code to use vmas

From: Ben Widawsky In order to transition more of our code over to using a VMA instead of an pair - we must have the vma accessible at execbuf time. Up until now, we've only had a VMA when actually binding an object. The previous patch helped handle the distinction on bound vs. unbound.

Re: [Intel-gfx] [PATCH 4/4] [v4] drm/i915: Convert execbuf code to use vmas

On Tue, Aug 13, 2013 at 06:09:09PM -0700, Ben Widawsky wrote: > From: Ben Widawsky > > In order to transition more of our code over to using a VMA instead of > an pair - we must have the vma accessible at execbuf time. Up > until now, we've only had a VMA when actual

Re: [Intel-gfx] [PATCH 2/4] [v3] drm/i915: cleanup map&fence in bind

On Wed, Aug 14, 2013 at 10:18:55AM +0200, Daniel Vetter wrote: > On Tue, Aug 13, 2013 at 06:09:07PM -0700, Ben Widawsky wrote: > > Cleanup the map and fenceable setting during bind to make more sense, > > and not check i915_is_ggtt() 2 unnecessary times > > > > v2:

Re: [Intel-gfx] [PATCH] drm/i915: inline vma_create into lookup_or_create_vma

e execbuf code and > > clarify what kind of magic is going on with a new one. > > > > Cc: Ben Widawsky > > Signed-off-by: Daniel Vetter > > --- > > > > That's the only concern I could come up with when reading the execbuf > > vma conversion patch

Re: [Intel-gfx] [PATCH 6.1/9] drm/i915: don't queue PM events we won't process

ler(dev_priv, pm_iir); > - else if (pm_iir & GEN6_PM_RPS_EVENTS) > + else > gen6_rps_irq_handler(dev_priv, pm_iir); > I915_WRITE(GEN6_PMIIR, pm_iir); > ret = IRQ_HANDLED;

Re: [Intel-gfx] [PATCH 6.3/9] drm/i915: merge HSW and SNB PM irq handlers

@@ -1424,10 +1401,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void > *arg) > if (INTEL_INFO(dev)->gen >= 6) { > u32 pm_iir = I915_READ(GEN6_PMIIR); > if (pm_iir) { > - if (IS_HASWELL(dev)) > -

[Intel-gfx] [PATCH] assembler: error for the wrong syntax of SEND instruction on GEN6+

endleadreg payload exp directsrcoperand instoptions The above four syntaxes are only used on legacy platforms which support implied move from payload to dst. Signed-off-by: Xiang, Haihao Signed-off-by: Ben Widawsky --- Somehow this ended up in our internal IGT. Anyone have an issue with me pus

Re: [Intel-gfx] [PATCH 4/4] [v4] drm/i915: Convert execbuf code to use vmas

s=1024: old= 172199 + 5.2*reloc, lut= 166907 + 5.1*reloc (ns) > no-relocs: buffers=2048: old= 345542 + 5.2*reloc, lut= 334300 + 5.3*reloc (ns) > > So there is measurable degradation for the extra indirections, both for > looking up the execbuffers and for performing the relocations.

Re: [Intel-gfx] [PATCH 1/4] [v2] drm/i915: Remove node only when allocated

On Thu, Aug 15, 2013 at 04:05:56PM +0200, Daniel Vetter wrote: > On Wed, Aug 14, 2013 at 10:15:50AM +0200, Daniel Vetter wrote: > > On Wed, Aug 14, 2013 at 10:06:30AM +0200, Daniel Vetter wrote: > > > On Tue, Aug 13, 2013 at 06:09:06PM -0700, Ben Widawsky wrote: > > > &g

Re: [Intel-gfx] [PATCH] assembler: error for the wrong syntax of SEND instruction on GEN6+

On Thu, Aug 15, 2013 at 12:00:17PM +0100, Damien Lespiau wrote: > On Wed, Aug 14, 2013 at 02:21:16PM -0700, Ben Widawsky wrote: > > From: "Xiang, Haihao" > > > >predicate SEND execsize dst sendleadreg payload directsrcoperand > > instoptions > >

[Intel-gfx] [PATCH] drm/i915/vma: Correct use after free in eviction

: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_evict.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c index 0cbaad4..db90261 100644 --- a/drivers/gpu/drm/i915/i915_gem_evict.c +++ b/drivers/gpu

[Intel-gfx] [PATCH] [v2] drm/i915/vma: Correct use after free in eviction

: Mika Kuoppala Cc: Ville Syrjälä Cc: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem_evict.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c index 0cbaad4..3b7b74e

Re: [Intel-gfx] [PATCH] [v2] drm/i915/vma: Correct use after free in eviction

On Sun, Aug 18, 2013 at 07:26:57PM +0200, Daniel Vetter wrote: > On Fri, Aug 16, 2013 at 11:31:12PM +0100, Chris Wilson wrote: > > On Fri, Aug 16, 2013 at 01:29:33PM -0700, Ben Widawsky wrote: > > > The vma will [possibly] be destroyed during unbind in eviction. > > >

Re: [Intel-gfx] drm/i915: Switch eviction code to use vmas

On Mon, Aug 19, 2013 at 09:59:14AM +0300, Dan Carpenter wrote: > Hello Ben Widawsky, > > Here is another use after free warning. It's some new static checker > stuff that I haven't pushed because it has lots of false postives. > > The patch f7795b1d0b47: "drm/

Re: [Intel-gfx] [PATCH 1/6] drm/i915: grab force_wake when restoring LCPLL

e don't have to call forcewake. I think the explanation sounds a little fishy. Specifically, I thought D_COMP COMP_FORCE + waiting for PLL lock was sufficient. If it's not, I worry you're papering over another bug, or incorrect bspec sequence. Not opposed to the patch in the me

[Intel-gfx] [PATCH] drm/Kconfig: favor n for DRM_I915_PRELIMINARY_HW_SUPPORT

Display message for what users should select (N) and while there, a small whitespace fix. Cc Josh Triplett Signed-off-by: Ben Widawsky --- drivers/gpu/drm/Kconfig | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfi

Re: [Intel-gfx] [PATCH] drm/Kconfig: favor n for DRM_I915_PRELIMINARY_HW_SUPPORT

On Tue, Aug 20, 2013 at 01:08:22AM +0100, Damien Lespiau wrote: > On Mon, Aug 19, 2013 at 04:20:40PM -0700, Ben Widawsky wrote: > > We generally don't want people or distros to use this option unless they > > know what they're doing. I missed the initial conversation but

[Intel-gfx] [PATCH 3/3] drm/i915/vma: Remove VMA from exec_list on destroy

In order to avoid confusion, and corruption as observed (in code review) by Chris - remove the VMA from the exec_list at destroy. Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_gem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 1/3] drm/i915/vma: Add a busy flag; means don't destroy

me sort of garbage collection for them. NOTE: This patch doesn't actually fix anything. The explanation above is the problem, this is the harness, and the fix comes next. Cc: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c |

[Intel-gfx] [PATCH 2/3] drm/i915/vma: Mark vmas busy during execbuf lookup

ve it from the exec_list. As such, we must mark the VMA busy for the multi stage execbuf or else the above assertion we mentioned cannot be guaranteed. NOTE: This patch isn't quite tested yet. It just fixes the theoretical issue. Cc: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gp

[Intel-gfx] [PATCH 2/2] drm/i915: Add debugfs interface for planes

;ve been unable to get something going on the test side thus far because I am inexperienced with the APIs, and don't see a way to map a crtc to a hardware plane (which is what we have flip counts for). Chris, maybe you can do something useful with this? Cc: Chris Wilson Signed-off-by: Ben Wi

[Intel-gfx] [PATCH 1/2] drm/i915: Update plane flip count registers

Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_reg.h | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 53d0e70..d1079db 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add debugfs interface for planes

Sent the unfinished commit by accident On Wed, Aug 21, 2013 at 08:15:53PM -0700, Ben Widawsky wrote: > This interface can enhanced over time to get more per plane information. > I've just flip counts for now. What I'd like to do with flip counts is > integrate them with exis

[Intel-gfx] [PATCH 2/2] [v2] drm/i915: Add debugfs interface for planes

am inexperienced with the APIs, and don't see a way to map a crtc to a hardware plane (which is what we have flip counts for). Chris, maybe you can do something useful with this? v2: Use the right patch, with the right commit msg. Cc: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gp

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add debugfs interface for planes

On Thu, Aug 22, 2013 at 03:21:09AM +0100, Chris Wilson wrote: > On Wed, Aug 21, 2013 at 07:16:53PM -0700, Ben Widawsky wrote: > > Sent the unfinished commit by accident > > On Wed, Aug 21, 2013 at 08:15:53PM -0700, Ben Widawsky wrote: > > > This interface can enhanced o

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bdw: Implement a basic PM interrupt handler

On Mon, Apr 14, 2014 at 10:55:53PM +0300, Ville Syrjälä wrote: > On Mon, Apr 14, 2014 at 10:41:14PM +0530, deepa...@intel.com wrote: > > From: Ben Widawsky > > > > Almost all of it is reusable from the existing code. The primary > > difference is we need to do even le

Re: [Intel-gfx] [PATCH 28/71] drm/i915/chv: Added CHV specific register read and write

dev_priv->uncore.funcs.mmio_writeq = chv_write64; > + dev_priv->uncore.funcs.mmio_readb = chv_read8; > + dev_priv->uncore.funcs.mmio_readw = chv_read16; > + dev_priv->uncore.funcs.mmio_readl = chv_read32; >

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