== Series Details ==
Series: Expose modifiers/formats supported by async flips
URL : https://patchwork.freedesktop.org/series/140935/
State : warning
== Summary ==
Error: dim checkpatch failed
7d835ef6b236 drm/plane: Add new plane property IN_FORMATS_ASYNC
-:158: CHECK:PREFER_KERNEL_TYPES: Pre
== Series Details ==
Series: Expose modifiers/formats supported by async flips
URL : https://patchwork.freedesktop.org/series/140935/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Quoting Luca Coelho (2024-11-01 07:57:58-03:00)
>On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>> In upcoming display changes, we will modify the DMC wakelock MMIO
>> waiting code to choose a non-sleeping variant implementation, because
>> the wakelock is also taking in atomic context.
>>
This is already handled below by fixup_initial_plane_config.
Fixes: a8153627520a ("drm/i915: Try to relocate the BIOS fb to the start of
ggtt")
Cc: Ville Syrjälä
Reviewed-by: Vinod Govindapillai
Reviewed-by: Lucas De Marchi
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/display/xe_p
No allocations should be done before we have had a chance to preserve
the display fb.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/xe_device.c | 6 ++
drivers/gpu/drm/xe/xe_tile.c | 12
drivers/gpu/drm/xe/xe_tile.h | 1 +
3 files changed, 15 insertions(+), 4 del
Technically, I believe this means that xe_display_init_noirq and
xe_display_init_noaccel can be merged together now.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/xe_device.c | 12
drivers/gpu/drm/xe/xe_tile.c | 7 +++
2 files changed, 11 insertions(+), 8 deletions(
Add a 2-stage GuC init. An early one for everything that is needed
for VF, and a full one that loads GuC and is allowed to do allocations.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/tests/xe_guc_relay_test.c | 2 +-
drivers/gpu/drm/xe/xe_device.c | 16 --
drivers/
Instead of 3 different calls, it should be safe to unify to a single
call now. This makes the init sequence cleaner, and display less
tangled.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/display/xe_display.c | 72 +++--
drivers/gpu/drm/xe/display/xe_display.h | 8
We want to split up GUC init to an alloc and noalloc part to keep the
init path the same for VF and !VF as much as possible.
Everything in vf_guc_init should be done as early as possible, otherwise
VRAM probing becomes impossible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/xe_gt_sr
After mcr_init_early, we need to be able to do VRAM and CCS probing
without hwconfig probe. Fortunately the relevant registers are all
instance 0, which fortunately means no dependencies on further initialisation
is required.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/xe_gt_mcr.c
We're changing the driver to have no interrupts during early init for
Xe, so we poll the PIPE_FRMSTMSMP counter instead.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
.../drm/i915/display/intel_plane_initial.c| 9 -
.../drm/i915/disp
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Monday, November 4, 2024 11:16 PM
> To: Usyskin, Alexander
> Cc: Gupta, Anshuman ; Deak, Imre
> ; Miquel Raynal ;
> Richard Weinberger ; Vignesh Raghavendra
> ; De Marchi, Lucas ; Thomas
> Hellström ; Maarten Lankhorst
> ; Maxime Ripard ;
Now that we added the separate step of initialising GUC in
xe_gt_init_early, it should be ok to initialise the minimum during early
init, and the rest after allocations are allowed.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/xe/xe_device.c | 6
drivers/gpu/drm/xe/xe_gt.c | 66
Quoting Luca Coelho (2024-11-01 09:24:08-03:00)
>On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>> Bspec says that disabling dynamic DC states require taking the DMC
>> wakelock to cause an DC exit before writing to DC_STATE_EN. Implement
>> that.
>>
>> In fact, testing on PTL revealed we
== Series Details ==
Series: series starting with [1/9] drm/xe: Remove double pageflip
URL : https://patchwork.freedesktop.org/series/140945/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
CC [M] drivers/gpu/
Quoting Luca Coelho (2024-11-01 09:51:48-03:00)
>On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>> There are extra registers that require the DMC wakelock when specific
>> dynamic DC states are in place. Add the table ranges for them and use
>> the correct table depending on the allowed DC
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display (rev2)
URL : https://patchwork.freedesktop.org/series/140886/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15633 -> Patchwork_140886v2
=
Quoting Luca Coelho (2024-11-01 09:58:33-03:00)
>On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>> Allow simpler syntax for defining entries for single registers in range
>> tables. That makes them easier to type as well as to read, allowing one
>> to quickly tell whether a range actually
== Series Details ==
Series: drm/i915/psr: Disable psr1 if setup_time > vblank (rev2)
URL : https://patchwork.freedesktop.org/series/140623/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15634 -> Patchwork_140623v2
Summary
Quoting Luca Coelho (2024-11-01 11:27:10-03:00)
>On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>> Although Bspec doesn't explicitly mentions that, as of Xe3_LPD, using
>> DMC wakelock is the officially recommended way of accessing registers
>> that would be off during DC5/DC6 and the lega
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting (rev3)
URL : https://patchwork.freedesktop.org/series/140766/
State : warning
== Summary ==
Error: dim checkpatch failed
dc78860b267c drm/i915/xe3lpd: Power request asserting/deasserting
-:52: WARNING:LONG_LINE:
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting (rev3)
URL : https://patchwork.freedesktop.org/series/140766/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15634 -> Patchwork_140766v3
Summ
On 2024-11-04 6:20 p.m., Daniele Ceraolo Spurio wrote:
On 10/30/2024 3:38 PM, Zhanjun Dong wrote:
GuC to host communication is interrupt driven, the handling has 3
parts: interrupt context, tasklet and request queue worker.
During GuC reset prepare, interrupt is disabled before destroy
con
Hi Maarten,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-xe/drm-xe-next]
[also build test ERROR on next-20241105]
[cannot apply to linus/master drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.12-rc6]
[If your patch is applied to
Future platforms can have new additions in the plane_wm
registers. So update skl_wm_level_from_reg_val() to have
possiblity for such platform differentiations. This is in
preparation for the rest of the patches in this series where
hw support for the minimum and interim ddb allocations for
async fl
On Tue, 05 Nov 2024, Vinod Govindapillai wrote:
> Update intel_enabled_dbuf_slices_mask to use intel_display instead
> of drm_i915_private object. This is a prepratory patch for the next
> patch in the series, where all intel_de_read calls in skl_watermarks.c
> are updated to use intel_display ins
Avoid using struct drm_i915_private reference and use intel_display
instead. This is in preparation for the rest of the patches in this
series where hw support for the minimum and interim ddb allocations
for async flip is added
Signed-off-by: Vinod Govindapillai
---
drivers/gpu/drm/i915/display/
== Series Details ==
Series: drm/i915/display: Power request asserting/deasserting (rev3)
URL : https://patchwork.freedesktop.org/series/140766/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/in
Quoting Gustavo Sousa (2024-10-22 08:03:39-03:00)
>Quoting Jani Nikula (2024-10-22 06:37:51-03:00)
>>On Mon, 21 Oct 2024, Gustavo Sousa wrote:
>>> In order to be able to use the DMC wakelock, we also need to know that
>>> the display hardware has support for DMC, which is a runtime info.
>>> Defin
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display (rev2)
URL : https://patchwork.freedesktop.org/series/140886/
State : warning
== Summary ==
Error: dim checkpatch failed
34b6bf6dffe3 drm/i915/display: identify discrete graphics
98b45b9902e
== Series Details ==
Series: drm/i915/display: convert display feature helpers to struct
intel_display (rev2)
URL : https://patchwork.freedesktop.org/series/140886/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separ
There is a HW issue that arises when there are race conditions
between TCSS entering/exiting TC7 or TC10 states while the
driver is asserting/deasserting TCSS power request. As a
workaround, Display driver will implement a mailbox sequence
to ensure that the TCSS is in TC0 when TCSS power request i
There is a HW issue that arises when there are race conditions
between TCSS entering/exiting TC7 or TC10 states while the
driver is asserting/deasserting TCSS power request. As a
workaround, Display driver will implement a mailbox sequence
to ensure that the TCSS is in TC0 when TCSS power request i
Let's start using struct intel_display instead of struct drm_i915_private
when introducing new code. No functional changes.
v2: Drop tc_to_intel_display() helper funtion (Jani)
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_tc.c | 12 ++--
1 file changed, 6 insertions
== Series Details ==
Series: use hw support for min/interim ddb allocation for async flip
URL : https://patchwork.freedesktop.org/series/140926/
State : warning
== Summary ==
Error: dim checkpatch failed
acb3e49da85c drm/i915/display: update intel_enabled_dbuf_slices_mask to use
intel_display
== Series Details ==
Series: use hw support for min/interim ddb allocation for async flip
URL : https://patchwork.freedesktop.org/series/140926/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/in
On Tue, 05 Nov 2024, Vinod Govindapillai wrote:
> Convert all intel_de_read() to use intel_display instead of
> struct drm_i915_private object. This is in preparation for
> the rest of the patches in this series where hw support for
> the minimum and interim ddb allocations for async flip is
> add
On Tue, 05 Nov 2024, Vinod Govindapillai wrote:
> Convert all intel_de_read() to use intel_display instead of
> struct drm_i915_private object. This is in preparation for
> the rest of the patches in this series where hw support for
> the minimum and interim ddb allocations for async flip is
> add
Thanks Jani!
Yes.. I was thinking the same and but got a bit mixed-up and also was in a bit
of confusion how deep
these intel_display changes should go!
I see that you have added comment in the next patch that all of those i915
could be changed in one
function! I can update the series based on
On Tue, 05 Nov 2024, Vinod Govindapillai wrote:
> Avoid using struct drm_i915_private reference and use intel_display
> instead. This is in preparation for the rest of the patches in this
> series where hw support for the minimum and interim ddb allocations
> for async flip is added
This is techn
On Tue, 05 Nov 2024, Vinod Govindapillai wrote:
> Use intel_display object instead of struct drm_i915_private in
> skl_plane_wm_equals(). This is in preparation for the rest of
> the patches in this series where hw support for the minimum and
> interim ddb allocations for async flip is added
>
> S
== Series Details ==
Series: use hw support for min/interim ddb allocation for async flip
URL : https://patchwork.freedesktop.org/series/140926/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15631 -> Patchwork_140926v1
Summ
On Sun, 03 Nov 2024, Jonathan Gray wrote:
> intel_pxp_gsccs_is_ready_for_sessions() is gated by CONFIG_DRM_I915_PXP
> but called from intel_pxp.c which isn't. Provide a fallback inline
> function to fix the non-optimised build.
>
> Fixes: 99afb7cc8c44 ("drm/i915/pxp: Add ARB session creation and
Convert intel_display_device.[ch] to struct intel_display, including
callers, but excluding intel_display_device_probe() which will be
handled in follow-up.
v2: fix display->drm = display->drm goof-up
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
.../drm
Few of the modifiers are not supported with async flip. Add an element
async_flip to say if the modifier supports asynchronous flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_fb.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/d
There exists a property IN_FORMATS which exposes the plane supported
modifiers/formats to the user. In some platforms when asynchronous flips
are used all of modifiers/formats mentioned in IN_FORMATS are not
supported. This patch adds a new plane property IN_FORMATS_ASYNC to
expose the async flips
All of the formats/modifiers supported by the plane during synchronous
flips are nor supported by asynchronous flips. The formats/modifiers
exposed to user by IN_FORMATS exposes all formats/modifiers supported by
plane and this list varies for async flips. If the async flip supported
formats/modifi
Add the formats/modifiers supported by asynchronous flips by the
platform based on the plane capabilities.
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/skl_universal_plane.c| 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_univ
get_modifiers will get the list of modifiers supported by the plane. Add
a flag async_flip to fetch only the async_flip supported modifiers.
Also expose function to get the number of modifiers supported by the
platform.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/i9xx_plane.c
Issue is seen when PSR enabled with setup frames and when try to disable
PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for more
than 5 seconds. Issue not seen with Setup frames disabled. Currently
disable psr1 if setuptime > vblank to workaround the above issue.
HSD: 16024594674
W
On Tue, 29 Oct 2024, "Hogander, Jouni" wrote:
> On Tue, 2024-10-29 at 11:25 +0200, Jani Nikula wrote:
>> It's misleading to use the same sideband mutex for LPT/WPT IOSF,
>> VLV/CHV
>> IOSF, and punit. Add dedicated locks for clarity.
>
> For the whole series:
>
> Reviewed-by: Jouni Högander
Than
Hi Jani,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20241105]
[cannot apply to drm-xe/drm-xe-next linus/master drm-intel/for-linux-next-fixes
drm-tip/drm-tip v6.12-rc6]
[If your patch is applied
Quoting Jani Nikula (2024-10-22 05:03:21-03:00)
>On Mon, 21 Oct 2024, Gustavo Sousa wrote:
>> There are extra registers that require the DMC wakelock when specific
>> dynamic DC states are in place. Add the table ranges for them and use
>> the correct table depending on the allowed DC states.
>>
>
Hi Maarten,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-xe/drm-xe-next]
[also build test ERROR on next-20241105]
[cannot apply to linus/master drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.12-rc6]
[If your patch is applied to
Quoting Gustavo Sousa (2024-11-05 10:46:52-03:00)
>Quoting Luca Coelho (2024-11-01 11:27:10-03:00)
>>On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>>> Although Bspec doesn't explicitly mentions that, as of Xe3_LPD, using
>>> DMC wakelock is the officially recommended way of accessing regi
On 2024-11-05 1:49 p.m., Patchwork wrote:
*Patch Details*
*Series:* drm/i915/guc: Flush ct receive tasklet during reset
preparation (rev3)
*URL:* https://patchwork.freedesktop.org/series/140741/ patchwork.freedesktop.org/series/140741/>
*State:*failure
*Details:* https://intel-gfx-ci
This is a note to let you know that I've just added the patch titled
drm/i915/display/dp: Compute AS SDP when vrr is also enabled
to the 6.11-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is
This is a note to let you know that I've just added the patch titled
drm/i915: disable fbc due to Wa_16023588340
to the 6.11-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-i915-d
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