== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/117738/
State : warning
== Summary ==
Error: dim checkpatch failed
6114f8d0c211 drm/i915/pmu: Support PMU for all engines
8736cb79fd80 drm/i915/pmu: Skip sampling engines with no enable
== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/117738/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 5/13/23 15:21, Yi Liu wrote:
There are drivers that need to search vfio_device within a given dev_set.
e.g. vfio-pci. So add a helper.
Signed-off-by: Yi Liu
---
drivers/vfio/pci/vfio_pci_core.c | 8 +++-
drivers/vfio/vfio_main.c | 15 +++
include/linux/vfio.h
== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/117738/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117738v1
Summary
---
**SUCCESS**
On 5/13/23 15:21, Yi Liu wrote:
This makes VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl to use the iommufd_ctx
of the cdev device to check the ownership of the other affected devices.
This returns devid for each of the affected devices. If it is bound to the
iommufd_ctx of the cdev device, _INFO rep
> From: Cédric Le Goater
> Sent: Monday, May 15, 2023 3:30 PM
>
> On 5/13/23 15:21, Yi Liu wrote:
> > This makes VFIO_DEVICE_GET_PCI_HOT_RESET_INFO ioctl to use the iommufd_ctx
> > of the cdev device to check the ownership of the other affected devices.
> >
> > This returns devid for each of the
From: Patchwork
Sent: Friday, May 12, 2023 5:27 PM
To: Kahola, Mika
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/mtl: Fix expected reg value for
Thunderbolt PLL disabling
Patch Details
Series:
drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disabling
U
From: Patchwork
Sent: Friday, May 12, 2023 8:13 PM
To: Kahola, Mika
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/mtl: Fix expected reg value for
Thunderbolt PLL disabling (rev2)
Patch Details
Series:
drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disa
On Fri, 12 May 2023, Rodrigo Vivi wrote:
> On Fri, May 12, 2023 at 02:14:46PM +0300, Jani Nikula wrote:
>> Add helper for reading SPI to not duplicate the write&read combo
>> everywhere.
>>
>> Signed-off-by: Jani Nikula
>
> BAT failure is likely a false positive on crcs... this patch
> looks cor
Statically allocated array of pointers to hwmon_channel_info can be made
const for safety.
Acked-by: Jani Nikula
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/i915/i915_hwmon.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_hwmon.c
b/
== Series Details ==
Series: Add MTL PMU support for multi-gt
URL : https://patchwork.freedesktop.org/series/117738/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117738v1_full
Summary
---
**S
Visible glitches have been observed when running graphics applications on
Linux under Xen hypervisor. Those observations have been confirmed with
failures from kms_pwrite_crc IGT test that verifies data coherency of DRM
frame buffer objects using hardware CRC checksums calculated by display
contro
On Sun, 14 May 2023, Juha-Pekka Heikkila wrote:
> Add Tile4 type ccs modifiers with aux buffer needed for MTL
>
> Bspec: 49251, 49252, 49253
> Cc: dri-de...@lists.freedesktop.org
> Cc: Jani Nikula
> Signed-off-by: Juha-Pekka Heikkila
> Reviewed-by: Matt Atwood
Thanks for the patches and review
On Thu, 04 May 2023, Dmitry Baryshkov wrote:
> Other platforms (msm) will benefit from sharing the DSC config setup
> functions. This series moves parts of static DSC config data from the
> i915 driver to the common helpers to be used by other drivers.
>
> Note: the RC parameters were cross-checke
On Fri, 12 May 2023, Rodrigo Vivi wrote:
> On Fri, May 12, 2023 at 02:04:41PM +0300, Jani Nikula wrote:
>> In general, we don't do assertions that a function gets called on the
>> right platforms, and if we did, it should not be a state warn.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Rod
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Armada does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirel
Many fbdev drivers use the same set of fb_ops helpers. Add Kconfig
options to select them at once. This will help with making DRM's
fbdev emulation code more modular, but can also be used to simplify
fbdev's driver configs.
Signed-off-by: Thomas Zimmermann
---
drivers/video/fbdev/Kconfig | 21 ++
DRM provides a number of wrappers around fbdev cfb_() sys_(), fb_io_()
and fb_sys_() helpers. The DRM functions don't provide any additional
functionality for most DRM drivers. So remove them and call the fbdev
I/O helpers directly.
The DRM fbdev I/O wrappers were originally added because
does no
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Exynos does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirel
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Fbdev-dma does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions enti
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Radeon does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirel
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Omapdrm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entire
Export drm_fb_helper_damage() and drm_fb_helper_damage_range(), which
handle damage areas for fbdev emulation. This is a temporary export
that allows to move the DRM I/O helpers for fbdev into drivers. Only
fbdev-generic and i915 need them. Both will be updated to implement
damage handling by thems
Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. Fbdev-generic was the only caller of the
DRM helpers, so remove them from the helper module.
v2:
* use FB_SYS_HELPERS_DEFERRED option
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/Kconfig
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Msm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Gma500 does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirel
Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. i915 was the only caller of the DRM
helpers, so remove them from the helper module.
v2:
* use FB_IO_HELPERS options
Signed-off-by: Thomas Zimmermann
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Viv
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Tegra does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely
On Mon, 15 May 2023, Suraj Kandpal wrote:
> Pass all the parameter in intel_encoder->enable()
> to intel_hdcp_enable as we need intel_atomic_state
> later down to get acquire_ctx.
>
> Cc: Jani Nikula
> Cc: Ankit Nautiyal
> Signed-off-by: Suraj Kandpal
Reviewed-by: Jani Nikula
> ---
> driver
On Mon, 15 May 2023, Suraj Kandpal wrote:
> Remove enforce_type0 check outside the loop since it
> does not make sense to keep it there as we use the same
> digport and continue checking it again and again
>
> Cc: Ankit Nautiyal
> Signed-off-by: Suraj Kandpal
Reviewed-by: Jani Nikula
> ---
>
On 13/05/2023 00:44, Umesh Nerlige Ramappa wrote:
On Fri, May 12, 2023 at 04:20:19PM -0700, Dixit, Ashutosh wrote:
On Fri, 12 May 2023 15:44:00 -0700, Umesh Nerlige Ramappa wrote:
On Fri, May 12, 2023 at 03:29:03PM -0700, Dixit, Ashutosh wrote:
> On Fri, 05 May 2023 17:58:14 -0700, Umesh Ner
Hi Ashutosh,
On Fri, May 12, 2023 at 01:37:35PM -0700, Ashutosh Dixit wrote:
> Loading i915 on UBSAN enabled kernels (CONFIG_UBSAN/CONFIG_UBSAN_BOOL)
> causes the following warning:
>
> UBSAN: invalid-load in drivers/gpu/drm/i915/gt/uc/intel_uc.c:558:2
> load of value 255 is not a valid value
On Mon, 15 May 2023, Suraj Kandpal wrote:
> Since topology state is being added to drm_atomic_state now all
> drm_modeset_lock required are being taken from core. This raises
> an issue when we try to loop over connector and assign vcpi id to
> our streams as we did not have atomic state to derive
On Fri, 12 May 2023, Gustavo Sousa wrote:
> Used "git show --color-moved ..." to help me review this one and changes look
> sane to me.
Also, thanks for clueing me in on 'git show --color-moved'. It's
fantastic!
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
On 12/05/2023 21:57, Umesh Nerlige Ramappa wrote:
On Fri, May 12, 2023 at 11:56:18AM +0100, Tvrtko Ursulin wrote:
On 12/05/2023 02:08, Dixit, Ashutosh wrote:
On Fri, 05 May 2023 17:58:15 -0700, Umesh Nerlige Ramappa wrote:
From: Tvrtko Ursulin
Reserve some bits in the counter config name
On 5/15/2023 10:45 AM, Suraj Kandpal wrote:
Since topology state is being added to drm_atomic_state now all
drm_modeset_lock required are being taken from core. This raises
an issue when we try to loop over connector and assign vcpi id to
our streams as we did not have atomic state to derive ac
On 15/05/2023 07:44, Umesh Nerlige Ramappa wrote:
From: Tvrtko Ursulin
Reserve some bits in the counter config namespace which will carry the
tile id and prepare the code to handle this.
No per tile counters have been added yet.
v2:
- Fix checkpatch issues
- Use 4 bits for gt id in non-engi
LGTM.
Reviewed-by: Ankit Nautiyal
On 5/15/2023 10:45 AM, Suraj Kandpal wrote:
stream_id and k(no of streams) should be set in
intel_hdcp_set_content_streams. stream_type should be set in
intel_hdcp_required_content_stream.
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
---
drivers/gpu/dr
The return value is not used for anything.
Reviewed-by: Gustavo Sousa
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 02b6cbb83
Split hotplug irq handling out of i915_irq.[ch] into
display/intel_hotplug_irq.[ch].
The line between the new intel_hotplug_irq.[ch] and the existing
intel_hotplug.[ch] needs further clarification, but the first step is to
move the stuff out of i915_irq.[ch].
Reviewed-by: Rodrigo Vivi
Reviewed-b
Split (non-hotplug) display irq handling out of i915_irq.[ch] into
display/intel_display_irq.[ch].
v3:
- Preserve [I915_MAX_PIPES] harder (kernel test robot)
v2:
- Rebase
- Preserve [I915_MAX_PIPES] in functions (kernel test robot)
Reviewed-by: Gustavo Sousa
Signed-off-by: Jani Nikula
---
dri
On 12/05/2023 20:54, Jordan Justen wrote:
On 2023-05-10 15:14:16, Andi Shyti wrote:
Hi,
On Tue, May 09, 2023 at 09:59:42AM -0700, fei.y...@intel.com wrote:
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, ge
HDCP MST scenario sees modeset locking issue ever since
topology_state was added to drm_atomic_state and all modeset
locks were being taken for us causing a locking issue to occur
when we iterate over connectors to assign vcpi id, the fix
being to pass acquire_ctx to drm_modeset_lock.
--v2
-call
Pass all the parameter in intel_encoder->enable()
to intel_hdcp_enable as we need intel_atomic_state
later down to get acquire_ctx.
Cc: Jani Nikula
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_ddi.c| 4 +---
drivers/gpu/d
stream_id and k(no of streams) should be set in
intel_hdcp_set_content_streams. stream_type should be set in
intel_hdcp_required_content_stream.
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 9 +++--
1 file chang
Since topology state is being added to drm_atomic_state now all
drm_modeset_lock required are being taken from core. This raises
an issue when we try to loop over connector and assign vcpi id to
our streams as we did not have atomic state to derive acquire_ctx
from. We fill in stream info if dpmst
Remove enforce_type0 check outside the loop since it
does not make sense to keep it there as we use the same
digport and continue checking it again and again
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 6 +++---
1 fil
On 13/05/2023 00:28, fei.y...@intel.com wrote:
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at o
On 5/13/2023 8:35 AM, Sean Christopherson wrote:
> From: Yan Zhao
>
Acked-by: Zhi Wang
This was previously to avoid stepping down to the lower level ASAP
when a guest page is not used but still stays in the GPU page table.
(mostly in windows VM, as this is a behavior of WDDM GPU MM). But
it do
On 12/05/2023 15:18, Rob Clark wrote:
On Thu, Apr 6, 2023 at 7:33 AM Tvrtko Ursulin
wrote:
On 06/04/2023 15:21, Rob Clark wrote:
On Thu, Apr 6, 2023 at 4:08 AM Tvrtko Ursulin
wrote:
On 05/04/2023 18:57, Rob Clark wrote:
On Tue, Jan 31, 2023 at 3:33 AM Tvrtko Ursulin
wrote:
From: Tv
LGTM.
Reviewed-by: Ankit Nautiyal
On 5/15/2023 4:02 PM, Suraj Kandpal wrote:
Since topology state is being added to drm_atomic_state now all
drm_modeset_lock required are being taken from core. This raises
an issue when we try to loop over connector and assign vcpi id to
our streams as we did
On 5/15/2023 4:02 PM, Suraj Kandpal wrote:
stream_id and k(no of streams) should be set in
intel_hdcp_set_content_streams. stream_type should be set in
intel_hdcp_required_content_stream.
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/
On 5/13/2023 8:35 AM, Sean Christopherson wrote:
> Move the check that a vGPU is attacked from is_2MB_gtt_possible() to its
> sole caller, ppgtt_populate_shadow_entry(). All of the paths in
> ppgtt_populate_shadow_entry() eventually check for attachment by way of
> intel_gvt_dma_map_guest_page(),
On 5/13/2023 8:35 AM, Sean Christopherson wrote:
Reviewed-by: Zhi Wang
> Bail from ppgtt_populate_shadow_entry() if an unexpected GTT entry type
> is encountered instead of subtly falling through to the common "direct
> shadow" path. Eliminating the default/error path's reliance on the common
>
stream_id and k(no of streams) should be set in
intel_hdcp_set_content_streams. stream_type should be set in
intel_hdcp_required_content_stream.
--v5
-add missing stream_id assignment [Ankit]
Cc: Ankit Nautiyal
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/
== Series Details ==
Series: drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disabling
(rev2)
URL : https://patchwork.freedesktop.org/series/117690/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13142 -> Patchwork_117690v2
Hi Fei,
On Fri, May 12, 2023 at 04:28:25PM -0700, fei.y...@intel.com wrote:
> From: Fei Yang
>
> To comply with the design that buffer objects shall have immutable
> cache setting through out their life cycle, {set, get}_caching ioctl's
> are no longer supported from MTL onward. With that change
On Tue, Jan 24, 2023 at 12:45:48PM +0200, Dmitry Baryshkov wrote:
> There are two flags attemting to guard connector polling:
> poll_enabled and poll_running. While poll_enabled semantics is clearly
> defined and fully adhered (mark that drm_kms_helper_poll_init() was
> called and not finalized by
On Fri, May 12, 2023 at 11:54:05AM +0530, Ankit Nautiyal wrote:
> While using DSC the compressed bpp is computed assuming RGB output
> format. Consider the output_format and compute the compressed bpp
> during mode valid and compute config steps.
>
> For DP-MST we currently use RGB output format o
From: Tvrtko Ursulin
Rob,
I thought maybe when you add memory stats the same field order like top(1)
would feel more natural? That is client name comes last and is left justified.
All other stats then come in the middle, between PID and NAME.
DRM minor 0
PID render copy
From: Tvrtko Ursulin
Move client name to be the right most field which visually aligns better
with top(1) and prepares for inserting memory usage fields somewhere in
the middle.
Signed-off-by: Tvrtko Ursulin
Cc: Rob Clark
---
tools/intel_gpu_top.c | 19 +--
1 file changed, 9 i
From: Tvrtko Ursulin
Move client name to be the right most field which visually aligns better
with top(1) and prepares for inserting memory usage fields somewhere in
the middle.
Signed-off-by: Tvrtko Ursulin
Cc: Rob Clark
---
tools/gputop.c | 19 +--
1 file changed, 9 insertio
On Fri, May 12, 2023 at 11:54:08AM +0530, Ankit Nautiyal wrote:
> In Bigjoiner check for DSC, bigjoiner interface bits for DP for
> DISPLAY > 13 is 36 (Bspec: 49259).
>
> v2: Corrected Display ver to 13.
>
> v3: Follow convention for conditional statement. (Ville)
>
> Signed-off-by: Ankit Nautiy
On Mon, May 15, 2023 at 6:36 AM Tvrtko Ursulin
wrote:
>
> From: Tvrtko Ursulin
>
> Rob,
>
> I thought maybe when you add memory stats the same field order like top(1)
> would feel more natural? That is client name comes last and is left justified.
> All other stats then come in the middle, betwee
Quoting Radhakrishna Sripada (2023-05-12 23:14:37)
>The dg2 workaround which is used for performance tuning
>is needed for Meteorlake A-step.
>
>v2: Limit the WA for A-step
I think what Matt meant in the review for v1 was that this commit should
be rather about the tuning setting rather than the w
On Fri, May 12, 2023 at 11:54:09AM +0530, Ankit Nautiyal wrote:
> As per Bsepc:49259, Bigjoiner BW check puts restriction on the
> compressed bpp for a given CDCLK, pixelclock in cases where
> Bigjoiner + DSC are used.
>
> Currently compressed bpp is computed first, and it is ensured that
> the bp
Quoting Kalvala, Haridhar (2023-05-14 08:13:10)
>
>On 5/13/2023 7:44 AM, Radhakrishna Sripada wrote:
>> MTL reuses the tuning parameters for DG2. Extend the dg2
>> performance tuning parameters to MTL.
>>
>> v2: Add DRAW_WATERMARK tuning parameter.
>>
>> Bspec: 68331
>> Cc: Haridhar Kalvala
>> Cc:
Hi Gustavo,
> -Original Message-
> From: Sousa, Gustavo
> Sent: Monday, May 15, 2023 7:45 AM
> To: Sripada, Radhakrishna ; intel-
> g...@lists.freedesktop.org
> Cc: Justen, Jordan L ; Sripada, Radhakrishna
> ; Kalvala, Haridhar
> ; Roper, Matthew D
>
> Subject: Re: [PATCH v2 1/2] drm/i91
Hi Haridar/Gustavo,
> -Original Message-
> From: Sousa, Gustavo
> Sent: Monday, May 15, 2023 7:47 AM
> To: Kalvala, Haridhar ; Sripada, Radhakrishna
> ; intel-gfx@lists.freedesktop.org
> Cc: Justen, Jordan L ; Roper, Matthew D
>
> Subject: Re: [PATCH v2 2/2] drm/i915/mtl: Add MTL perform
== Series Details ==
Series: drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disabling
(rev3)
URL : https://patchwork.freedesktop.org/series/117690/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13148 -> Patchwork_117690v3
On Mon, May 15, 2023 at 08:42:25AM -0700, Sripada, Radhakrishna wrote:
> Hi Gustavo,
>
> > -Original Message-
> > From: Sousa, Gustavo
> > Sent: Monday, May 15, 2023 7:45 AM
> > To: Sripada, Radhakrishna ; intel-
> > g...@lists.freedesktop.org
> > Cc: Justen, Jordan L ; Sripada, Radhakris
Hi Thomas,
On Mon, May 15, 2023 at 11:40:24AM +0200, Thomas Zimmermann wrote:
> Use the regular fbdev helpers for framebuffer I/O instead of DRM's
> helpers. Exynos does not use damage handling, so DRM's fbdev helpers
> are mere wrappers around the fbdev code.
>
> By using fbdev helpers directly
Hi Thomas,
On Mon, May 15, 2023 at 11:40:23AM +0200, Thomas Zimmermann wrote:
> Use the regular fbdev helpers for framebuffer I/O instead of DRM's
> helpers. Armada does not use damage handling, so DRM's fbdev helpers
> are mere wrappers around the fbdev code.
>
> By using fbdev helpers directly
On Mon, May 15, 2023, Zhi A Wang wrote:
> On 5/13/2023 8:35 AM, Sean Christopherson wrote:
> > Move the check that a vGPU is attacked from is_2MB_gtt_possible() to its
> > sole caller, ppgtt_populate_shadow_entry(). All of the paths in
> > ppgtt_populate_shadow_entry() eventually check for attachm
On Mon, May 15, 2023 at 07:55:44PM +0200, Sam Ravnborg wrote:
> Hi Thomas,
>
> On Mon, May 15, 2023 at 11:40:23AM +0200, Thomas Zimmermann wrote:
> > Use the regular fbdev helpers for framebuffer I/O instead of DRM's
> > helpers. Armada does not use damage handling, so DRM's fbdev helpers
> > are
On Mon, May 15, 2023 at 11:12:33AM +0100, Tvrtko Ursulin wrote:
On 15/05/2023 07:44, Umesh Nerlige Ramappa wrote:
From: Tvrtko Ursulin
Reserve some bits in the counter config namespace which will carry the
tile id and prepare the code to handle this.
No per tile counters have been added yet.
Hi Janusz,
On 2023-05-15 at 10:50:20 +0200, Janusz Krzysztofik wrote:
> Visible glitches have been observed when running graphics applications on
> Linux under Xen hypervisor. Those observations have been confirmed with
> failures from kms_pwrite_crc IGT test that verifies data coherency of DRM
>
> Hi Fei,
>
> On Fri, May 12, 2023 at 04:28:25PM -0700, fei.y...@intel.com wrote:
>> From: Fei Yang
>>
>> To comply with the design that buffer objects shall have immutable
>> cache setting through out their life cycle, {set, get}_caching ioctl's
>> are no longer supported from MTL onward. With th
On Mon, 15 May 2023 02:52:35 -0700, Tvrtko Ursulin wrote:
>
> On 13/05/2023 00:44, Umesh Nerlige Ramappa wrote:
> > On Fri, May 12, 2023 at 04:20:19PM -0700, Dixit, Ashutosh wrote:
> >> On Fri, 12 May 2023 15:44:00 -0700, Umesh Nerlige Ramappa wrote:
> >>>
> >>> On Fri, May 12, 2023 at 03:29:03PM -
== Series Details ==
Series: drm/fbdev: Remove DRM's helpers for fbdev I/O (rev2)
URL : https://patchwork.freedesktop.org/series/117671/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
INSTALL libsubcmd_headers
MODPOST Module.symvers
ER
== Series Details ==
Series: drm/i915: constify pointers to hwmon_channel_info
URL : https://patchwork.freedesktop.org/series/117750/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13148 -> Patchwork_117750v1
Summary
---
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/irq: convert
gen8_de_irq_handler() to void
URL : https://patchwork.freedesktop.org/series/117761/
State : warning
== Summary ==
Error: dim checkpatch failed
4d8a616e8a27 drm/i915/irq: convert gen8_de_irq_handler() to void
35a
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/irq: convert
gen8_de_irq_handler() to void
URL : https://patchwork.freedesktop.org/series/117761/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked sepa
On Mon, 15 May 2023 03:10:56 -0700, Tvrtko Ursulin wrote:
>
Hi Tvrtko,
> On 12/05/2023 21:57, Umesh Nerlige Ramappa wrote:
> > On Fri, May 12, 2023 at 11:56:18AM +0100, Tvrtko Ursulin wrote:
> >>
> >> On 12/05/2023 02:08, Dixit, Ashutosh wrote:
> >>> On Fri, 05 May 2023 17:58:15 -0700, Umesh Nerl
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/irq: convert
gen8_de_irq_handler() to void
URL : https://patchwork.freedesktop.org/series/117761/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13148 -> Patchwork_117761v1
On 5/12/2023 5:39 PM, Dixit, Ashutosh wrote:
On Fri, 12 May 2023 16:56:03 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
rps_boost debugfs shows host turbo related info. This is not valid
when SLPC is enabled.
A couple of thoughts about this. It appears people are know only about
rps_boost_info an
The dg2 workaround which requires the register for
DRAW_WATERMARK to be saved/restored during context reset/switch
is required on MTL-A step as well.
v2: Limit the WA for A-step
v3: Update the commit message.
Bspec: 68331
Cc: Haridhar Kalvala
Cc: Matt Roper
Cc: Gustavo Sousa
Signed-off-by: Rad
MTL reuses the tuning parameters for DG2. Extend the dg2
performance tuning parameters to MTL.
v2: Add DRAW_WATERMARK tuning parameter.
v3: Limit DRAW_WATERMARK tuning to non A0 step.
Bspec: 68331
Cc: Haridhar Kalvala
Cc: Matt Roper
Cc: Gustavo Sousa
Signed-off-by: Radhakrishna Sripada
---
d
Hi Matt,
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, May 15, 2023 10:28 AM
> To: Sripada, Radhakrishna
> Cc: Sousa, Gustavo ; intel-
> g...@lists.freedesktop.org; Justen, Jordan L ;
> Kalvala, Haridhar
> Subject: Re: [PATCH v2 1/2] drm/i915/mtl: Extend Wa_16014892111 t
== Series Details ==
Series: Fix modeset locking issue in HDCP MST (rev5)
URL : https://patchwork.freedesktop.org/series/117615/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops
On Mon, May 15, 2023 at 03:24:22PM -0700, Radhakrishna Sripada wrote:
> MTL reuses the tuning parameters for DG2. Extend the dg2
> performance tuning parameters to MTL.
>
> v2: Add DRAW_WATERMARK tuning parameter.
> v3: Limit DRAW_WATERMARK tuning to non A0 step.
>
> Bspec: 68331
> Cc: Haridhar K
On Mon, May 15, 2023 at 03:24:23PM -0700, Radhakrishna Sripada wrote:
> The dg2 workaround which requires the register for
> DRAW_WATERMARK to be saved/restored during context reset/switch
> is required on MTL-A step as well.
Maybe it would be more clear if this was written as
Like DG2, M
== Series Details ==
Series: Fix modeset locking issue in HDCP MST (rev5)
URL : https://patchwork.freedesktop.org/series/117615/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13148 -> Patchwork_117615v5
Summary
---
*
On Mon, 15 May 2023 15:23:58 -0700, Belgaumkar, Vinay wrote:
>
>
> On 5/12/2023 5:39 PM, Dixit, Ashutosh wrote:
> > On Fri, 12 May 2023 16:56:03 -0700, Vinay Belgaumkar wrote:
> > Hi Vinay,
> >
> >> rps_boost debugfs shows host turbo related info. This is not valid
> >> when SLPC is enabled.
> > A
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/mtl: Add MTL performance tuning
changes
URL : https://patchwork.freedesktop.org/series/117791/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separat
Use algorithm to generate HDMI C20 PLL clock frequencies.
i
v2: checkpatch fixes
BSPEC: 64568
Cc: Radhakrishna Sripada
Cc: Mika Kahola
Cc: Anusha Srivatsa
Reviewed-by: Gustavo Sousa
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 89 +--
.../gpu
Use computed C20 HDMI TMDS pixel clocks to support 25.175MHz to 594000MHz
modes. Add 16 Bit mask operators to support C20 phy programming.
v2: checkpatch fixes
BSPEC: 64568
Cc: Imre Deak
Cc: Mika Kahola
Cc: Radhakrishna Sripada
Cc: Gustavo Sousa
Signed-off-by: Clint Taylor
Clint Taylor (2):
Add the support macros to define/extract bits as 16bits.
v2: checkpatch fixes
Reviewed-by: Gustavo Sousa
Signed-off-by: Clint Taylor
---
drivers/gpu/drm/i915/i915_reg_defs.h | 48
1 file changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h
b
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/mtl: Add MTL performance tuning
changes
URL : https://patchwork.freedesktop.org/series/117791/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13148 -> Patchwork_117791v1
===
== Series Details ==
Series: C20 Computed HDMI TMDS pixel clocks (rev2)
URL : https://patchwork.freedesktop.org/series/117399/
State : warning
== Summary ==
Error: dim checkpatch failed
7374d5d94fea drm/i915: Add 16bit register/mask operators
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse '
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