[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)

== Series Details == Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4) URL : https://patchwork.freedesktop.org/series/108972/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12310_full -> Patchwork_108972v4_full

Re: [Intel-gfx] Developing a new backlight driver for specific OLED screen

On Fri, 28 Oct 2022, "Aurélien" wrote: > Hi, > > I come back on my problem regarding the development of a specific driver > which controls the brightness of my OLED device. > >> If it's eDP and uses some proprietary DPCD brightness control mechanism, >> I think in practice it usually is somewhat

[Intel-gfx] ✓ Fi.CI.IGT: success for Add selftest for slpc tile interaction (rev3)

== Series Details == Series: Add selftest for slpc tile interaction (rev3) URL : https://patchwork.freedesktop.org/series/110248/ State : success == Summary == CI Bug Log - changes from CI_DRM_12320_full -> Patchwork_110248v3_full Summary -

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Encapsulate lmem rpm stuff in intel_runtime_pm

On Mon, Oct 31, 2022 at 02:42:09AM -0400, Gupta, Anshuman wrote: > > > > -Original Message- > > From: Auld, Matthew > > Sent: Monday, October 24, 2022 7:30 PM > > To: Gupta, Anshuman ; intel- > > g...@lists.freedesktop.org > > Cc: tvrtko.ursu...@linux.intel.com; Vivi, Rodrigo > > Subjec

Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0

On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote: > From: José Roberto de Souza > > For multi-tile setups the GSC operational only on the tile 0. > Skip GSC auxiliary device creation for all other tiles. > > Cc: Tomas Winkler > Cc: Vitaly Lubart > Signed-off-by: José Roberto d

Re: [Intel-gfx] [PATCH 00/10] Connect VFIO to IOMMUFD

On Fri, Oct 28, 2022 at 04:53:21PM -0700, Nicolin Chen wrote: > On Tue, Oct 25, 2022 at 03:17:06PM -0300, Jason Gunthorpe wrote: > > This series provides an alternative container layer for VFIO implemented > > using iommufd. This is optional, if CONFIG_IOMMUFD is not set then it will > > not be com

Re: [Intel-gfx] [PATCH v1 3/7] vfio/ccw: move private initialization to callback

On 10/19/22 12:21 PM, Eric Farman wrote: > There's already a device initialization callback that is > used to initialize the release completion workaround. As discussed off-list, maybe clarify what callback you're talking about here and/or reference the commit that added it. > > Move the other

Re: [Intel-gfx] [PATCH v1 2/7] vfio/ccw: remove private->sch

On 10/19/22 12:21 PM, Eric Farman wrote: > These places all rely on the ability to jump from a private > struct back to the subchannel struct. Rather than keeping a > copy in our back pocket, let's use the relationship provided > by the vfio_device embedded within the private. > > Signed-off-by: E

[Intel-gfx] [PATCH] [next] i915/gvt: remove hardcoded value on crc32_start calculation

struct gvt_firmware_header has a crc32 member in which all members that come after the that field are used to calculate it. The previous implementation added the value '4' (crc32's u32 size) to calculate the crc32_start offset which came across as a bit cryptic until you take a deeper look at the s

Re: [Intel-gfx] [PATCH v7 0/9] dyndbg: drm.debug adaptation

On 10/21/22 05:18, Jani Nikula wrote: > On Thu, 20 Oct 2022, Ville Syrjälä wrote: >> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote: >>> On Sun, Sep 11, 2022 at 11:28:43PM -0600, Jim Cromie wrote: hi Greg, Dan, Jason, DRM-folk, heres follow-up to V6: rebased on dr

Re: [Intel-gfx] [PATCH 00/10] Connect VFIO to IOMMUFD

On Tue, Oct 25, 2022 at 03:17:06PM -0300, Jason Gunthorpe wrote: > This series provides an alternative container layer for VFIO implemented > using iommufd. This is optional, if CONFIG_IOMMUFD is not set then it will > not be compiled in. > > At this point iommufd can be injected by passing in a i

Re: [Intel-gfx] [PATCH v5 02/31] drm/i915: Don't register backlight when another backlight should be used (v2)

On 10/25/2022 15:25, Hans de Goede wrote: Hi Matthew, On 10/25/22 21:32, Matthew Garrett wrote: On Tue, Oct 25, 2022 at 08:50:54PM +0200, Hans de Goede wrote: That is a valid point, but keep in mind that this is only used on ACPI platforms and then only on devices with a builtin LCD panel and

Re: [Intel-gfx] [PATCH v1 1/7] vfio/ccw: create a parent struct

On 10/19/22 12:21 PM, Eric Farman wrote: > Move the stuff associated with the mdev parent (and thus the > subchannel struct) into its own struct, and leave the rest in > the existing private structure. > > The subchannel will point to the parent, and the parent will point > to the private, for the

Re: [Intel-gfx] [PATCH v5 1/3] drm: Use XArray instead of IDR for minors

On 9/11/2022 3:14 PM, Michał Winiarski wrote: IDR is deprecated, and since XArray manages its own state with internal locking, it simplifies the locking on DRM side. Additionally, don't use the IRQ-safe variant, since operating on drm minor is not done in IRQ context. Signed-off-by: Michał Winia

Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0

> > On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote: > > From: José Roberto de Souza > > > > For multi-tile setups the GSC operational only on the tile 0. > > Skip GSC auxiliary device creation for all other tiles. > > > > Cc: Tomas Winkler > > Cc: Vitaly Lubart > > Signed-o

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add MC6 Wa_14017210380 for SAMedia

On Sat, Oct 29, 2022 at 12:59:35AM +0530, Badal Nilawar wrote: > This workaround is added for Media Tile of MTL A step. It is to help > pcode workaround which handles the hardware bug seen on CXL splitter > during package C2/C3 transitins due to MC6 entry/exit. As a part of > workaround pcode expec

Re: [Intel-gfx] [PATCH v3 1/1] drm/i915/guc/slpc: Add selftest for slpc tile-tile interaction

On Mon, Oct 31, 2022 at 10:44:11AM +0530, Riana Tauro wrote: > Run a workload on tiles simultaneously by requesting for RP0 frequency. > Pcode can however limit the frequency being granted due to throttling > reasons. This test fails if there is any throttling I'm not convinced we really want to s

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Don't deadlock busyness stats vs reset

On 28/10/2022 20:46, john.c.harri...@intel.com wrote: From: John Harrison The engine busyness stats has a worker function to do things like 64bit extend the 32bit hardware counters. The GuC's reset prepare function flushes out this worker function to ensure no corruption happens during the re

Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0

On Mon, Oct 31, 2022 at 05:48:07AM -0400, Winkler, Tomas wrote: > > > > > On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote: > > > From: José Roberto de Souza > > > > > > For multi-tile setups the GSC operational only on the tile 0. > > > Skip GSC auxiliary device creation for al

[Intel-gfx] [PATCH] drm/i915/uapi: expose GTT alignment

On some platforms we potentially have different alignment restrictions depending on the memory type. We also now have different alignment restrictions for the same region across different kernel versions. Extend the region query to return the minimum required GTT alignment. Mesa MR: https://gitlab

[Intel-gfx] ✓ Fi.CI.BAT: success for i915/gvt: remove hardcoded value on crc32_start calculation

== Series Details == Series: i915/gvt: remove hardcoded value on crc32_start calculation URL : https://patchwork.freedesktop.org/series/110310/ State : success == Summary == CI Bug Log - changes from CI_DRM_12322 -> Patchwork_110310v1 Summa

Re: [Intel-gfx] [PATCH 00/10] Connect VFIO to IOMMUFD

Hi Jason, On 2022/10/26 02:17, Jason Gunthorpe wrote: This series provides an alternative container layer for VFIO implemented using iommufd. This is optional, if CONFIG_IOMMUFD is not set then it will not be compiled in. At this point iommufd can be injected by passing in a iommfd FD to VFIO_G

[Intel-gfx] [PULL] drm-intel-gt-next

Hi Dave & Daniel, Here goes first drm-intel-gt-next pull req towards 6.2. We have a fix for #6222 (kernel memory corruption issue) and fix for display regression after resume. A missing W/A for Gen12 iGPUs and extension of compute pre-emption timeout to 7.5 seconds to account for compute corner c

[Intel-gfx] [PATCH] drm/i915/selftest: Fix gt_pm live_gt_clocks test

While reading the engine timestamps there can be uncontrollable concurrent mmio access via other i915 child drivers and by GuC, which may cause mmio latency to read the engine timestamps, Account such latency to calculate time to read engine timestamp. Signed-off-by: Anshuman Gupta --- drivers/g

Re: [Intel-gfx] [PATCH v2 01/21] drm/komeda: Don't set struct drm_driver.lastclose

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.lastclose. It's used to restore the > fbdev console. But as komeda uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See > the call to drm_client_dev_restore() in drm_lastclose()

Re: [Intel-gfx] [PATCH v2 02/21] drm/mcde: Don't set struct drm_driver.lastclose

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.lastclose. It's used to restore the > fbdev console. But as mcde uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See > the call to drm_client_dev_restore() in drm_lastclose().

Re: [Intel-gfx] [PATCH v2 03/21] drm/vboxvideo: Don't set struct drm_driver.lastclose

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.lastclose. It's used to restore the > fbdev console. But as vboxvideo uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See > the call to drm_client_dev_restore() in drm_lastclos

Re: [Intel-gfx] [PATCH v2 04/21] drm/amdgpu: Don't set struct drm_driver.output_poll_changed

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.output_poll_changed. It's used to restore > the fbdev console. But as amdgpu uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See the > functions drm_kms_helper_hotplug_event()

Re: [Intel-gfx] [PATCH v2 04/21] drm/amdgpu: Don't set struct drm_driver.output_poll_changed

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.output_poll_changed. It's used to restore > the fbdev console. But as amdgpu uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See the > functions drm_kms_helper_hotplug_event()

Re: [Intel-gfx] [PATCH v2 05/21] drm/imx/dcss: Don't set struct drm_driver.output_poll_changed

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.output_poll_changed. It's used to restore > the fbdev console. But as DCSS uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See the > functions drm_kms_helper_hotplug_event() an

Re: [Intel-gfx] [PATCH v2 06/21] drm/ingenic: Don't set struct drm_driver.output_poll_changed

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.output_poll_changed. It's used to restore > the fbdev console. But as ingenic uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See the > functions drm_kms_helper_hotplug_event()

[Intel-gfx] [PATCH i-g-t] tests/i915/query: use 48B_ADDRESS in upload

Our working set could be larger than 4G here. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6671 Signed-off-by: Matthew Auld Cc: Nirmoy Das --- tests/i915/i915_query.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/tests/i915/i915_query.c b/tests/i915/i9

Re: [Intel-gfx] [PATCH 00/10] Connect VFIO to IOMMUFD

On Mon, Oct 31, 2022 at 06:38:45PM +0800, Yi Liu wrote: > Hi Jason, > > On 2022/10/26 02:17, Jason Gunthorpe wrote: > > This series provides an alternative container layer for VFIO implemented > > using iommufd. This is optional, if CONFIG_IOMMUFD is not set then it will > > not be compiled in. >

Re: [Intel-gfx] [PATCH v2 07/21] drm/logicvc: Don't set struct drm_driver.output_poll_changed

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.output_poll_changed. It's used to restore > the fbdev console. But as logicvc uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See the > functions drm_kms_helper_hotplug_event()

Re: [Intel-gfx] [PATCH v2 08/21] drm/rockchip: Don't set struct drm_driver.output_poll_changed

On 10/24/22 13:19, Thomas Zimmermann wrote: > Don't set struct drm_driver.output_poll_changed. It's used to restore > the fbdev console. But as rockchip uses generic fbdev emulation, the > console is being restored by the DRM client helpers already. See the > functions drm_kms_helper_hotplug_event(

Re: [Intel-gfx] [PATCH v2 09/21] drm/panel-ili9341: Include

On 10/24/22 13:19, Thomas Zimmermann wrote: > Include for devm_of_find_backlight(). > > Signed-off-by: Thomas Zimmermann > --- Reviewed-by: Javier Martinez Canillas -- Best regards, Javier Martinez Canillas Core Platforms Red Hat

Re: [Intel-gfx] [PATCH v2 10/21] drm/tve200: Include

On 10/24/22 13:19, Thomas Zimmermann wrote: > Include for of_match_ptr(). > > Signed-off-by: Thomas Zimmermann > --- Reviewed-by: Javier Martinez Canillas -- Best regards, Javier Martinez Canillas Core Platforms Red Hat

Re: [Intel-gfx] [PATCH v2 11/21] drm/fb-helper: Cleanup include statements in header file

On 10/24/22 13:19, Thomas Zimmermann wrote: > Only include what we have to. > > Signed-off-by: Thomas Zimmermann > --- Nice cleanup. Reviewed-by: Javier Martinez Canillas -- Best regards, Javier Martinez Canillas Core Platforms Red Hat

[Intel-gfx] [PATCH] drm/i915/mtl: Media GT and Render GT share common GGTT

On XE_LPM+ platforms the media engines are carved out into a separate GT but have a common GGTMMADR address range which essentially makes the GGTT address space to be shared between media and render GT. BSPEC: 63834 Cc: Matt Roper Signed-off-by: Aravind Iddamsetty --- drivers/gpu/drm/i915/gt/i

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)

On 10/31/2022 2:09 PM, Patchwork wrote: *Patch Details* *Series:* drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4) *URL:* https://patchwork.freedesktop.org/series/108972/ *State:*failure *Details:* https://intel-gfx

Re: [Intel-gfx] [PATCH 00/10] Connect VFIO to IOMMUFD

On 2022/10/31 20:18, Jason Gunthorpe wrote: On Mon, Oct 31, 2022 at 06:38:45PM +0800, Yi Liu wrote: Hi Jason, On 2022/10/26 02:17, Jason Gunthorpe wrote: This series provides an alternative container layer for VFIO implemented using iommufd. This is optional, if CONFIG_IOMMUFD is not set then

Re: [Intel-gfx] [PATCH v2 12/21] drm/fb_helper: Rename field fbdev to info in struct drm_fb_helper

On 10/24/22 13:19, Thomas Zimmermann wrote: > Rename struct drm_fb_helper.fbdev to info. The current name is > misleading as it overlaps with generic fbdev naming conventions. > Adapt to the usual naming in fbdev drivers by calling the field > 'info'. No functional changes. > > Signed-off-by: Thom

Re: [Intel-gfx] [PATCH v2 13/21] drm/fb-helper: Rename drm_fb_helper_alloc_fbi() to use _info postfix

On 10/24/22 13:19, Thomas Zimmermann wrote: > Rename drm_fb_helper_alloc_fbi() to drm_fb_helper_alloc_info() as > part of unifying the naming within fbdev helpers. Adapt drivers. No > functional changes. > > Signed-off-by: Thomas Zimmermann > --- Reviewed-by: Javier Martinez Canillas -- Best

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/uapi: expose GTT alignment

== Series Details == Series: drm/i915/uapi: expose GTT alignment URL : https://patchwork.freedesktop.org/series/110313/ State : warning == Summary == Error: make htmldocs had i915 warnings ./drivers/gpu/drm/i915/i915_perf_types.h:319: warning: Function parameter or member 'lock' not described

[Intel-gfx] ✗ Fi.CI.IGT: failure for i915/gvt: remove hardcoded value on crc32_start calculation

== Series Details == Series: i915/gvt: remove hardcoded value on crc32_start calculation URL : https://patchwork.freedesktop.org/series/110310/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12322_full -> Patchwork_110310v1_full =

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)

On 10/27/2022 6:30 PM, Patchwork wrote: == Series Details == Series: drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4) URL : https://patchwork.freedesktop.org/series/108972/ State : warning == Summary == Error: dim checkpatch failed d83d4490c920 drm/i915: Encapsulate lmem rpm s

Re: [Intel-gfx] [PATCH i-g-t] tests/i915/query: use 48B_ADDRESS in upload

Reviewed-by: |Nirmoy Das | On 10/31/2022 1:17 PM, Matthew Auld wrote: Our working set could be larger than 4G here. Closes:https://gitlab.freedesktop.org/drm/intel/-/issues/6671 Signed-off-by: Matthew Auld Cc: Nirmoy Das --- tests/i915/i915_query.c | 8 ++-- 1 file changed, 6 insertions(

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uapi: expose GTT alignment

== Series Details == Series: drm/i915/uapi: expose GTT alignment URL : https://patchwork.freedesktop.org/series/110313/ State : success == Summary == CI Bug Log - changes from CI_DRM_12323 -> Patchwork_110313v1 Summary --- **SUCCESS*

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Don't deadlock busyness stats vs reset

On 31/10/2022 10:09, Tvrtko Ursulin wrote: On 28/10/2022 20:46, john.c.harri...@intel.com wrote: From: John Harrison The engine busyness stats has a worker function to do things like 64bit extend the 32bit hardware counters. The GuC's reset prepare function flushes out this worker function

Re: [Intel-gfx] [PATCH 3/5] drm/i915/mtl: add GSC CS interrupt support

On 28/10/2022 18:00, Ceraolo Spurio, Daniele wrote: On 10/28/2022 1:38 AM, Tvrtko Ursulin wrote: On 27/10/2022 23:15, Daniele Ceraolo Spurio wrote: The GSC CS re-uses the same interrupt bits that the GSC used in older platforms. This means that we can now have an engine interrupt coming out

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dgfx: Grab wakeref at i915_ttm_unmap_virtual (rev4)

Pushed to drm-intel-gt-next. Thanks for review. Br, Anshuman Gupta. > -Original Message- > From: Gupta, Anshuman > Sent: Monday, October 31, 2022 5:55 PM > To: intel-gfx@lists.freedesktop.org > Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/dgfx: Grab wakeref at > i915_ttm_unmap_virtual (r

Re: [Intel-gfx] [PATCH v7 0/9] dyndbg: drm.debug adaptation

On Sun, Oct 30, 2022 at 08:42:52AM -0600, jim.cro...@gmail.com wrote: > On Thu, Oct 27, 2022 at 2:10 PM Ville Syrjälä > wrote: > > > > On Thu, Oct 27, 2022 at 01:55:39PM -0600, jim.cro...@gmail.com wrote: > > > On Thu, Oct 27, 2022 at 9:59 AM Ville Syrjälä > > > wrote: > > > > > > > > On Thu, Oct

[Intel-gfx] [PATCH] drm/i915/dg2: Introduce Wa_18017747507

WA 18017747507 applies to all DG2 skus. BSpec: 56035, 46121, 68173 Signed-off-by: Wayne Boyer --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++ drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/d

Re: [Intel-gfx] [PATCH v2 14/21] drm/fb-helper: Rename drm_fb_helper_unregister_fbi() to use _info postfix

On 10/24/22 13:19, Thomas Zimmermann wrote: > Rename drm_fb_helper_unregister_fbi() to drm_fb_helper_unregister_info() > as part of unifying the naming within fbdev helpers. Adapt drivers. No > functional changes. > > Signed-off-by: Thomas Zimmermann > --- Reviewed-by: Javier Martinez Canillas

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add MC6 Wa_14017210380 for SAMedia

Hi Rodrigo, On 31-10-2022 15:19, Rodrigo Vivi wrote: On Sat, Oct 29, 2022 at 12:59:35AM +0530, Badal Nilawar wrote: This workaround is added for Media Tile of MTL A step. It is to help pcode workaround which handles the hardware bug seen on CXL splitter during package C2/C3 transitins due to MC

[Intel-gfx] [PATCH 0/6] drm/i915: Fix up and test RING_TIMESTAMP on gen4-6

From: Ville Syrjälä Correct the ring timestamp frequency for gen4/5, and run the relevant selftests for gen4-6. I've posted at least most of this before, but stuff changed in the meantinme so it needed a rebase. Ville Syrjälä (6): drm/i915: Fix cs timestamp frequency for ctg/elk/ilk drm/i91

[Intel-gfx] [PATCH 1/6] drm/i915: Fix cs timestamp frequency for ctg/elk/ilk

From: Ville Syrjälä On ilk the UDW of TIMESTAMP increments every 1000 ns, LDW is mbz. In order to represent that we'd need 52 bits, but we only have 32 bits. Even worse most things want to only deal with 32 bits of timestamp. So let's just set up the timestamp frequency as if we only had the UDW.

[Intel-gfx] [PATCH 6/6] drm/i915/selftests: Run the perf MI_BB tests on gen4/5

From: Ville Syrjälä Now that we know the ring timestamp frequency on gen4/5 we can run the perf tests that depend on sampling the timestamp. On g4x/ilk we must read the udw of the 64bit timestamp register. Details in {g4x,gen5)_read_clock_frequency(). When executing the read via the CS i965 doe

[Intel-gfx] [PATCH 3/6] drm/i915: Fix cs timestamp frequency for cl/bw

From: Ville Syrjälä Despite what the spec says the TIMESTAMP register seems to tick once every hrawclk (confirmed on i965gm and g35). v2: Rebase Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 2/6] drm/i915: Stop claiming cs timestamp frquency on gen2/3

From: Ville Syrjälä Gen2/3 have no TIMESTAMP registers to sample so no point in thinking we have any frequency for it either. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH 4/6] drm/i915/selftests: Run MI_BB perf selftests on SNB

From: Ville Syrjälä SNB does have the RING_TIMESTAMP register on the RCS engine. Run the MI_BB perf tests on it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/

[Intel-gfx] [PATCH 5/6] drm/i915/selftests: Test RING_TIMESTAMP on gen4/5

From: Ville Syrjälä Now that we actually know the cs timestamp frequency on gen4/5 let's run the corresponding test. On g4x/ilk we must read the udw of the 64bit timestamp register. Details in {g4x,gen5)_read_clock_frequency(). The one extra caveat is that on i965 (or at least CL, don't recall

Re: [Intel-gfx] [PATCH 0/6] drm/i915: Fix up and test RING_TIMESTAMP on gen4-6

On 31/10/2022 15:56, Ville Syrjala wrote: From: Ville Syrjälä Correct the ring timestamp frequency for gen4/5, and run the relevant selftests for gen4-6. I've posted at least most of this before, but stuff changed in the meantinme so it needed a rebase. Ville Syrjälä (6): drm/i915: Fix cs

Re: [Intel-gfx] [PATCH 3/5] drm/i915/mtl: add GSC CS interrupt support

On 10/31/2022 5:55 AM, Tvrtko Ursulin wrote: On 28/10/2022 18:00, Ceraolo Spurio, Daniele wrote: On 10/28/2022 1:38 AM, Tvrtko Ursulin wrote: On 27/10/2022 23:15, Daniele Ceraolo Spurio wrote: The GSC CS re-uses the same interrupt bits that the GSC used in older platforms. This means that

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/uapi: expose GTT alignment

== Series Details == Series: drm/i915/uapi: expose GTT alignment URL : https://patchwork.freedesktop.org/series/110313/ State : success == Summary == CI Bug Log - changes from CI_DRM_12323_full -> Patchwork_110313v1_full Summary ---

Re: [Intel-gfx] [PATCH 1/5] drm/i915/mtl: add initial definitions for GSC CS

On Thu, Oct 27, 2022 at 03:15:50PM -0700, Daniele Ceraolo Spurio wrote: > Starting on MTL, the GSC is no longer managed with direct MMIO access, > but we instead have a dedicated command streamer for it. As a first step > for adding support for this CS, add the required definitions. > Note that, al

Re: [Intel-gfx] [PATCH 1/5] drm/i915/mtl: add initial definitions for GSC CS

On 10/31/2022 9:26 AM, Matt Roper wrote: On Thu, Oct 27, 2022 at 03:15:50PM -0700, Daniele Ceraolo Spurio wrote: Starting on MTL, the GSC is no longer managed with direct MMIO access, but we instead have a dedicated command streamer for it. As a first step for adding support for this CS, add

[Intel-gfx] [PATCH] drm/i915/hwmon: Don't use FIELD_PREP

FIELD_PREP and REG_FIELD_PREP have checks requiring a compile time constant mask. When the mask comes in as the argument of a function these checks can can fail depending on the compiler (gcc vs clang), optimization level, etc. Use a simpler version of FIELD_PREP which skips these checks. The check

Re: [Intel-gfx] [PATCH v2] drm/i915/hwmon: Fix a build error used with clang compiler

On Sun, 30 Oct 2022 23:37:59 -0700, Gwan-gyeong Mun wrote: > Hi GG, > On 10/31/22 7:19 AM, Dixit, Ashutosh wrote: > > On Fri, 28 Oct 2022 21:42:30 -0700, Gwan-gyeong Mun wrote: > >> > >> diff --git a/drivers/gpu/drm/i915/i915_hwmon.c > >> b/drivers/gpu/drm/i915/i915_hwmon.c > >> index 9e97814930

Re: [Intel-gfx] [PATCH] drm/i915/mtl: Media GT and Render GT share common GGTT

On Mon, Oct 31, 2022 at 06:01:11PM +0530, Aravind Iddamsetty wrote: > On XE_LPM+ platforms the media engines are carved out into a separate > GT but have a common GGTMMADR address range which essentially makes > the GGTT address space to be shared between media and render GT. While this is all tru

Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Add CDCLK Support for MTL

See below -Original Message- From: Srivatsa, Anusha Sent: Friday, October 28, 2022 2:32 PM To: intel-gfx@lists.freedesktop.org Cc: Srivatsa, Anusha ; Taylor, Clinton A Subject: [PATCH 2/2] drm/i915/display: Add CDCLK Support for MTL As per bSpec MTL has 38.4 MHz Reference clock. Addin

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Don't deadlock busyness stats vs reset

On 10/31/2022 05:51, Tvrtko Ursulin wrote: On 31/10/2022 10:09, Tvrtko Ursulin wrote: On 28/10/2022 20:46, john.c.harri...@intel.com wrote: From: John Harrison The engine busyness stats has a worker function to do things like 64bit extend the 32bit hardware counters. The GuC's reset prepare f

Re: [Intel-gfx] [PATCH 1/5] drm/i915/mtl: add initial definitions for GSC CS

On Mon, Oct 31, 2022 at 09:43:33AM -0700, Ceraolo Spurio, Daniele wrote: > > > On 10/31/2022 9:26 AM, Matt Roper wrote: > > On Thu, Oct 27, 2022 at 03:15:50PM -0700, Daniele Ceraolo Spurio wrote: > > > Starting on MTL, the GSC is no longer managed with direct MMIO access, > > > but we instead hav

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftest: Fix gt_pm live_gt_clocks test

== Series Details == Series: drm/i915/selftest: Fix gt_pm live_gt_clocks test URL : https://patchwork.freedesktop.org/series/110318/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12325 -> Patchwork_110318v1 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/mtl: Media GT and Render GT share common GGTT

== Series Details == Series: drm/i915/mtl: Media GT and Render GT share common GGTT URL : https://patchwork.freedesktop.org/series/110321/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/mtl: Media GT and Render GT share common GGTT

== Series Details == Series: drm/i915/mtl: Media GT and Render GT share common GGTT URL : https://patchwork.freedesktop.org/series/110321/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12325 -> Patchwork_110321v1 Summary --

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: Introduce Wa_18017747507

== Series Details == Series: drm/i915/dg2: Introduce Wa_18017747507 URL : https://patchwork.freedesktop.org/series/110323/ State : success == Summary == CI Bug Log - changes from CI_DRM_12325 -> Patchwork_110323v1 Summary --- **SUCCE

Re: [Intel-gfx] [RFC 00/17] DRM scheduling cgroup controller

Hello, On Thu, Oct 27, 2022 at 03:32:00PM +0100, Tvrtko Ursulin wrote: > Looking at what's available in cgroups world now, I have spotted the > blkio.prio.class control. For my current use case (lower GPU scheduling of > background/unfocused windows) that would also work. Even if starting with > j

Re: [Intel-gfx] [PATCH 06/20] drm/i915/mtl: Add vswing programming for C10 phys

to fix the FIXME in intel_cx0_phy_set_signal_levels() we need the following patch snipet to be incorporated into this patch. @@ -331,18 +331,14 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,    }  } - intel_cx0_write(i915, encoder->port, master_lane, P

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix up and test RING_TIMESTAMP on gen4-6

== Series Details == Series: drm/i915: Fix up and test RING_TIMESTAMP on gen4-6 URL : https://patchwork.freedesktop.org/series/110326/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +./arch/x86/include/as

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix up and test RING_TIMESTAMP on gen4-6

== Series Details == Series: drm/i915: Fix up and test RING_TIMESTAMP on gen4-6 URL : https://patchwork.freedesktop.org/series/110326/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12325 -> Patchwork_110326v1 Summary --

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/hwmon: Don't use FIELD_PREP (rev2)

== Series Details == Series: drm/i915/hwmon: Don't use FIELD_PREP (rev2) URL : https://patchwork.freedesktop.org/series/110301/ State : warning == Summary == Error: dim checkpatch failed 6a7780f724ae drm/i915/hwmon: Don't use FIELD_PREP -:46: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__mask

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/hwmon: Don't use FIELD_PREP (rev2)

== Series Details == Series: drm/i915/hwmon: Don't use FIELD_PREP (rev2) URL : https://patchwork.freedesktop.org/series/110301/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH 1/2] drm/i915: Use intel_crtc_needs_modeset() more

From: Ville Syrjälä Prefer our own intel_crtc_needs_modeset() wrapper to drm_atomic_crtc_needs_modeset() whenever we are dealing with the intel_ types instead of drm_ types. Makes things a bit neater in general. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_cdclk.c | 2

[Intel-gfx] [PATCH 2/2] drm/i915: Switch intel_connector_needs_modeset() to drm types

From: Ville Syrjälä intel_connector_needs_modeset() currently uses a mix of drm_ and intel_ types. But it doesn't actually need anything from the intel_ stuff, so seems better to switch the whole thing over to the drm_ types. Should help anyone who wants to steal it as well :) Signed-off-by: Vil

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/display: Do both crawl and squash when changing cdclk (rev2)

== Series Details == Series: series starting with [1/2] drm/i915/display: Do both crawl and squash when changing cdclk (rev2) URL : https://patchwork.freedesktop.org/series/110275/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/110275/revisions/2/

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/mtl: Add C10 and C20 phy support (rev2)

== Series Details == Series: drm/i915/mtl: Add C10 and C20 phy support (rev2) URL : https://patchwork.freedesktop.org/series/109714/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/109714/revisions/2/mbox/ not applied warning: quoted CRLF detected

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/hwmon: Don't use FIELD_PREP (rev2)

== Series Details == Series: drm/i915/hwmon: Don't use FIELD_PREP (rev2) URL : https://patchwork.freedesktop.org/series/110301/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12325 -> Patchwork_110301v2 Summary --- **

[Intel-gfx] [PATCH] drm/i915/guc: Remove excessive line feeds in state dumps

From: John Harrison Some of the GuC state dump messages were adding extra line feeds. When printing via a DRM printer to dmesg, for example, that messes up the log formatting as it loses any prefixing from the printer. Given that the extra line feeds are just in the middle of random bits of GuC s

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more

== Series Details == Series: series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more URL : https://patchwork.freedesktop.org/series/110341/ State : warning == Summary == Error: dim checkpatch failed b5bd37c4172e drm/i915: Use intel_crtc_needs_modeset() more 8f0008b80c98 drm/i9

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more

== Series Details == Series: series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more URL : https://patchwork.freedesktop.org/series/110341/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +.

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more

== Series Details == Series: series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more URL : https://patchwork.freedesktop.org/series/110341/ State : warning == Summary == Error: make htmldocs had i915 warnings ./drivers/gpu/drm/i915/i915_perf_types.h:319: warning: Function para

Re: [Intel-gfx] [PATCH v7 0/9] dyndbg: drm.debug adaptation

On Mon, Oct 31, 2022 at 7:07 AM Ville Syrjälä wrote: > > On Sun, Oct 30, 2022 at 08:42:52AM -0600, jim.cro...@gmail.com wrote: > > On Thu, Oct 27, 2022 at 2:10 PM Ville Syrjälä > > wrote: > > > > > > On Thu, Oct 27, 2022 at 01:55:39PM -0600, jim.cro...@gmail.com wrote: > > > > On Thu, Oct 27, 202

[Intel-gfx] [PATCH i-g-t] tests/sysfs: Update timeslice/preemption for new range limits

From: John Harrison Guc submission imposes new range limits on certain scheduling parameters. The idempotent sections of the timeslice duration and pre-emption timeout tests was exceeding those limits and so would fail. Reduce the excessively large value (654s) to one which does not overflow (54

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more

== Series Details == Series: series starting with [1/2] drm/i915: Use intel_crtc_needs_modeset() more URL : https://patchwork.freedesktop.org/series/110341/ State : success == Summary == CI Bug Log - changes from CI_DRM_12325 -> Patchwork_110341v1 ==

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg2: Introduce Wa_18017747507

== Series Details == Series: drm/i915/dg2: Introduce Wa_18017747507 URL : https://patchwork.freedesktop.org/series/110323/ State : failure == Summary == CI Bug Log - changes from CI_DRM_12325_full -> Patchwork_110323v1_full Summary ---

Re: [Intel-gfx] [PATCH 04/10] vfio: Move storage of allow_unsafe_interrupts to vfio_main.c

On Fri, 28 Oct 2022 15:40:09 -0300 Jason Gunthorpe wrote: > On Wed, Oct 26, 2022 at 03:24:42PM -0600, Alex Williamson wrote: > > On Tue, 25 Oct 2022 15:17:10 -0300 > > Jason Gunthorpe wrote: > > > > > This legacy module knob has become uAPI, when set on the vfio_iommu_type1 > > > it disables

Re: [Intel-gfx] [PATCH 10/10] iommufd: Allow iommufd to supply /dev/vfio/vfio

On Fri, 28 Oct 2022 15:44:36 -0300 Jason Gunthorpe wrote: > On Wed, Oct 26, 2022 at 03:31:33PM -0600, Alex Williamson wrote: > > On Tue, 25 Oct 2022 15:50:45 -0300 > > Jason Gunthorpe wrote: > > > > > If the VFIO container is compiled out, give a kconfig option for iommufd > > > to provide th

[Intel-gfx] [PATCH 1/2] drm/i915/display: Do both crawl and squash when changing cdclk

From: Ville Syrjälä For MTL, changing cdclk from between certain frequencies has both squash and crawl. Use the current cdclk config and the new(desired) cdclk config to construtc a mid cdclk config. Set the cdclk twice: - Current cdclk -> mid cdclk - mid cdclk -> desired cdclk v2: Add check in

[Intel-gfx] [PATCH 2/2] drm/i915/display: Add CDCLK Support for MTL

As per bSpec MTL has 38.4 MHz Reference clock. Adding the cdclk tables and cdclk_funcs that MTL will use. v2: Revert to using bxt_get_cdclk() BSpec: 65243 Cc: Clint Taylor Signed-off-by: Anusha Srivatsa Reviewed-by: Clint Taylor --- drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++

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