== Series Details ==
Series: Remove some hacks required for GuC 62.0.0
URL : https://patchwork.freedesktop.org/series/98773/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11069_full -> Patchwork_21975_full
Summary
---
The previous attempt [1] started conflicting between drm-intel-next and
drm-intel-gt-next, so I dropped a patch to move things forward smoothly.
[1] https://patchwork.freedesktop.org/series/98691/
Jani Nikula (5):
drm/i915: split out i915_gem_internal.h from i915_drv.h
drm/i915: remove leftov
We already have the i915_gem_internal.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dsb.c | 2 ++
drivers/gpu/drm/i915/display/intel_overlay.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_internal.h | 23 +
Remove the duplicates.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/i915_gem.c | 1 +
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b443946e1516..74bcb8901772 1
We already have the gem/i915_gem_create.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_create.h | 17 +
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_drv.h| 4
We already have the gem/i915_gem_domain.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dpt.c| 4 +++-
drivers/gpu/drm/i915/display/intel_fb_pin.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 5 +++--
drivers/gpu/drm/i915/gem/i915_gem_domain.h | 15 +
We already have the gem/i915_gem_dmabuf.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h | 18 ++
drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++
drivers/gpu/drm/i915/gvt/dmabuf.c |
On 11/01/2022 16:30, Matthew Brost wrote:
Move the multi-lrc guc_id from the lower allocation partition (0 to
number of multi-lrc guc_ids) to upper allocation partition (number of
single-lrc to max guc_ids).
Just a reminder that best practice for commit messages is to include the
"why" as we
== Series Details ==
Series: drm/i915: clean up i915_drv.h, part 2, take 2...
URL : https://patchwork.freedesktop.org/series/98780/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
41a85094d2e1 drm/i915: split out i915_gem_internal.h from i915_drv.h
-:48: WARNING:FILE_PATH_CHANGES
== Series Details ==
Series: drm/i915: clean up i915_drv.h, part 2, take 2...
URL : https://patchwork.freedesktop.org/series/98780/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: clean up i915_drv.h, part 2, take 2...
URL : https://patchwork.freedesktop.org/series/98780/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11069 -> Patchwork_21977
Summary
---
*
On Tue, Jan 11, 2022 at 06:45:31PM +0200, Jani Nikula wrote:
> On Tue, 11 Jan 2022, Stanislav Lisovskiy
> wrote:
> > Currently we only recalculate CDCLK if active plane mask changes
> > or if we do a full modeset, however according to BSpec
> > required Dbuf bandwidth calculations also depend on
On Wed, Dec 22, 2021 at 2:36 PM José Expósito wrote:
>
> The "drm_plane_funcs.format_mod_supported" can be removed in favor of
> the default implementation.
>
> Signed-off-by: José Expósito
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # i.Core STM32MP1
Hello José,
thanks for your patch.
Reviewed-by: Yannick Fertre
Tested-by: Yannick Fertre
On 12/22/21 10:05 AM, José Expósito wrote:
The "drm_plane_funcs.format_mod_supported" can be removed in favor of
the default implementation.
Signed-off-by: José Expósito
---
drivers/gpu/drm/stm/ltdc.
Hi Jose,
What is the expected behavior of intel_gpu_top if I lock the frequency to min
freq, should I always read req/act = 100/100 even if there is no gfx workload
running?
-Markus
-Original Message-
From: Souza, Jose
Sent: Monday, January 10, 2022 8:14 PM
To: Schweikhardt, Markus ;
The last user of intel_dp_pack_aux() outside intel_dp_aux.c got removed
in commit ad26451a7902 ("drm/i915/display: Drop PSR support from HSW and
BDW"). Make the function static again.
Rename the pack/unpack functions to follow the usual naming conventions
while at it.
Signed-off-by: Jani Nikula
== Series Details ==
Series: series starting with [1/4] drm/i915: Pass plane to watermark
calculation functions (rev5)
URL : https://patchwork.freedesktop.org/series/97652/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11069_full -> Patchwork_21976_full
==
Remove extra indentation.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 942a755a0c48..e789ecbc69f3 1006
Smaller functions make the thing easier to read. Debug log failures to
ack.
Note: Looks like we have the retry loop simply because of hysterical
raisins, dating back to the original DP MST enabling. Keep it, though I
have no idea why we have it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i9
For whatever reason, the ESI link service irq vector was missing from
the debug output. Add the missing byte, clean up the debug message, and
do the logging right after reading the data.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
1 file changed, 2 insertions
We'll want to expand on this, so abstract it to a separate function
first. Improve debug logging while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/d
The link service irq vector in DPCD 0x2005 contains the link status
changed bit to indicate the status should be checked. Only read and
check the link status when requested by the sink.
This also reduces the confusion around the buffer size for the combined
ESI and link status. Alas, we still need
Only specific event status indicators caused the link status to be
acked. Be sure to ack the link status change event.
Arguably we should track which bits to actually clear in ESI instead of
the wholesale approach.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 1 +
1
Seems odd that we clear all event status indicators if we've only
handled some. Only clear the ones we've handled.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915
Perhaps a bit contrived, but we need to reduce the size of i915_drv.h
from all the accumulated cruft.
v3: Rebase
v2: Turns out asm/hypervisor.h is not self-contained
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile| 1 +
driver
The prefix should tell where the function is to be found and where it
belongs.
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c
Prefer acronym-based naming to be in line with the rest of the driver.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bw.c | 13 +++-
drivers/gpu/drm/i915/display/intel_cdclk.c| 30 +-
drivers/gpu/drm/i915/display/intel_display.c | 6 ++--
.../d
The lines_to_wait info from VBT is never used. Remove.
Cc: José Roberto de Souza
Cc: Jouni Högander
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
Not exactly a v2, but rather a replacement for [1].
[1]
https://patchwork.freedesktop.org/patch/msgid/20220104085421.213793-1-jani.nik...@int
== Series Details ==
Series: drm/i915: clean up i915_drv.h, part 2, take 2...
URL : https://patchwork.freedesktop.org/series/98780/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11069_full -> Patchwork_21977_full
Summary
--
On Wed, 2022-01-12 at 10:40 +, Schweikhardt, Markus wrote:
Hi Jose,
What is the expected behavior of intel_gpu_top if I lock the frequency to min
freq, should I always read req/act = 100/100 even if there is no gfx workload
running?
That will not prevent RC6 from entering.
-Markus
--
== Series Details ==
Series: drm/i915/dp: make intel_dp_pack_aux() static again (rev2)
URL : https://patchwork.freedesktop.org/series/98399/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21978
Summary
---
On Wed, 2022-01-12 at 13:27 +0200, Jani Nikula wrote:
> The lines_to_wait info from VBT is never used. Remove.
>
Reviewed-by: José Roberto de Souza
> Cc: José Roberto de Souza
> Cc: Jouni Högander
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
>
> ---
>
> Not exactly a v2, but rather a
Currently we only recalculate CDCLK if active plane mask changes
or if we do a full modeset, however according to BSpec
required Dbuf bandwidth calculations also depend on pipe/plane
scaling ratio, which means that CDCLK must be recalculated
everytime plane scaling ratio changes, because it affects
On Tue, Jan 11, 2022 at 10:34:34AM +0200, Jani Nikula wrote:
> On Mon, 10 Jan 2022, Ville Syrjälä wrote:
> > On Fri, Dec 31, 2021 at 03:23:31PM +0200, Jani Nikula wrote:
> >> On Wed, 12 Jul 2017, ville.syrj...@linux.intel.com wrote:
> >> > From: Ville Syrjälä
> >> >
> >> > Make the atomic private
If nobody has any more objections/ideas I'm going to push this one here
to drm-misc-next in the afternoon.
Christian.
Am 11.01.22 um 21:14 schrieb Arunpravin:
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i9
On Tue, Jan 11, 2022 at 10:55:44AM +0200, Jani Nikula wrote:
> On Mon, 10 Jan 2022, Ville Syrjälä wrote:
> > On Mon, Jan 10, 2022 at 11:57:39AM +0200, Jani Nikula wrote:
> >> The video/vga.h has macros for the VGA registers. Switch to use them.
> >>
> >> Suggested-by: Matt Roper
> >> Signed-off-
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: split out intel_vtd.[ch] from
i915_drv.h
URL : https://patchwork.freedesktop.org/series/98789/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a511b4fe2f78 drm/i915: split out intel_vtd.[ch] from i915_drv.h
-:3
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: split out intel_vtd.[ch] from
i915_drv.h
URL : https://patchwork.freedesktop.org/series/98789/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be chec
== Series Details ==
Series: series starting with [RESEND,1/7] drm/i915/mst: fix
intel_dp_mst_hpd_irq() indentation
URL : https://patchwork.freedesktop.org/series/98788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21979
===
On Tue, Jan 11, 2022 at 07:55:22AM +, Ashish Arora wrote:
> From: Ashish Arora
>
> On certain 4k panels and Macs, the BIOS framebuffer is larger than what
> panel requires causing display corruption. Introduce a check for the same.
If a larger fb causes corruption then there is a real bug so
> On 12-Jan-2022, at 7:07 PM, Ville Syrjälä
> wrote:
>
> On Tue, Jan 11, 2022 at 07:55:22AM +, Ashish Arora wrote:
>> From: Ashish Arora
>>
>> On certain 4k panels and Macs, the BIOS framebuffer is larger than what
>> panel requires causing display corruption. Introduce a check for the s
On Tue, Jan 11, 2022 at 06:08:12PM +0200, Stanislav Lisovskiy wrote:
> Currently we only recalculate CDCLK if active plane mask changes
> or if we do a full modeset, however according to BSpec
> required Dbuf bandwidth calculations also depend on pipe/plane
> scaling ratio, which means that CDCLK m
On Wed, Jan 12, 2022 at 01:17:40PM +0200, Jani Nikula wrote:
> Prefer acronym-based naming to be in line with the rest of the driver.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_bw.c | 13 +++-
> drivers/gpu/drm/i915/display/i
On Wed, Jan 12, 2022 at 12:57:03PM +0200, Jani Nikula wrote:
> The last user of intel_dp_pack_aux() outside intel_dp_aux.c got removed
> in commit ad26451a7902 ("drm/i915/display: Drop PSR support from HSW and
> BDW"). Make the function static again.
>
> Rename the pack/unpack functions to follow
This patch is adding new information into intel_device_info to see
whether i915 is psr2 selective fetch capable.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/i915_pci.c | 8
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 9 insertions(+)
diff --git a
Now as we have has_psr2_sel_fetch flag we can rely that
instead of checking each platform separately.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 ---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
2 files changed, 1 insertion(+), 8 deletions(-)
diff --g
Currently igt-gpu-tools is not aware of DG2 being not capable to
perform selective fetch. This is causing PSR2 testcases failing
on DG2 when PSR2 capable display is attached.
This patch set is adding new information into intel_device_info to see
whether display is psr2 selective fetch capable. Als
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: split out intel_vtd.[ch] from
i915_drv.h
URL : https://patchwork.freedesktop.org/series/98789/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21980
=
== Series Details ==
Series: drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_* (rev2)
URL : https://patchwork.freedesktop.org/series/98440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21981
Summ
== Series Details ==
Series: drm/i915/psr: remove unused lines_to_wait vbt info
URL : https://patchwork.freedesktop.org/series/98791/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Jan 12, 2022 at 03:50:05PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 11, 2022 at 06:08:12PM +0200, Stanislav Lisovskiy wrote:
> > Currently we only recalculate CDCLK if active plane mask changes
> > or if we do a full modeset, however according to BSpec
> > required Dbuf bandwidth calculati
On Wed, Jan 12, 2022 at 04:39:17PM +0200, Lisovskiy, Stanislav wrote:
> On Wed, Jan 12, 2022 at 03:50:05PM +0200, Ville Syrjälä wrote:
> > On Tue, Jan 11, 2022 at 06:08:12PM +0200, Stanislav Lisovskiy wrote:
> > > Currently we only recalculate CDCLK if active plane mask changes
> > > or if we do a
On Mon, Jan 10, 2022 at 09:15:52PM -0800, Matt Roper wrote:
> Combine the separate render and blitter register definitions into a
> single definition. We already know we have some workarounds on an
> upcoming platform that will need to update the ECOSKPD register for
> other engines too, so this h
== Series Details ==
Series: drm/i915: Recalculate CDCLK if plane scaling ratio changes (rev2)
URL : https://patchwork.freedesktop.org/series/98750/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
48211c7b2066 drm/i915: Recalculate CDCLK if plane scaling ratio changes
-:56: CHECK
== Series Details ==
Series: drm/i915/psr: remove unused lines_to_wait vbt info
URL : https://patchwork.freedesktop.org/series/98791/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21982
Summary
---
On Wed, 2022-01-12 at 16:00 +0200, Jouni Högander wrote:
> Now as we have has_psr2_sel_fetch flag we can rely that
> instead of checking each platform separately.
>
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 7 ---
> drivers/gpu/drm/i915/i915_drv.h
== Series Details ==
Series: drm/i915: Recalculate CDCLK if plane scaling ratio changes (rev2)
URL : https://patchwork.freedesktop.org/series/98750/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21983
Sum
== Series Details ==
Series: Add has_psr2_sel_fech flag
URL : https://patchwork.freedesktop.org/series/98794/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add has_psr2_sel_fech flag
URL : https://patchwork.freedesktop.org/series/98794/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073 -> Patchwork_21984
Summary
---
**SUCCESS**
No regre
== Series Details ==
Series: drm/i915/dp: make intel_dp_pack_aux() static again (rev2)
URL : https://patchwork.freedesktop.org/series/98399/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21978_full
S
Tvrtko Ursulin wrote on śro [2022-sty-12
08:54:19 +]:
>
> On 11/01/2022 16:30, Matthew Brost wrote:
> > Move the multi-lrc guc_id from the lower allocation partition (0 to
> > number of multi-lrc guc_ids) to upper allocation partition (number of
> > single-lrc to max guc_ids).
>
> Just a re
On 1/11/2022 4:15 AM, Andi Shyti wrote:
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create a 'gt/' directory in sysfs which will contain gt0...gtN
directories related to each tile configured in the GPU. Move the
power management files inside those
== Series Details ==
Series: series starting with [RESEND,1/7] drm/i915/mst: fix
intel_dp_mst_hpd_irq() indentation
URL : https://patchwork.freedesktop.org/series/98788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21979_full
=
On Wed, Jan 12, 2022 at 06:09:06PM +0100, Piotr Piórkowski wrote:
> Tvrtko Ursulin wrote on śro [2022-sty-12
> 08:54:19 +]:
> >
> > On 11/01/2022 16:30, Matthew Brost wrote:
> > > Move the multi-lrc guc_id from the lower allocation partition (0 to
> > > number of multi-lrc guc_ids) to upper
On Wed, Dec 22, 2021 at 07:58:29AM +, Miaoqian Lin wrote:
> Since i915_gem_create_context() function return error pointers,
> the kernel_context() function does not return null, It returns error
> pointers too. Using IS_ERR() to check the return value to fix this.
>
Just a nit, err is initial
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: split out intel_vtd.[ch] from
i915_drv.h
URL : https://patchwork.freedesktop.org/series/98789/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21980_full
===
Hi Dale,
thanks for looking into this patch,
> > + /*
> > +* i915->gt[0] == &i915->gt0
> > +*/
> > +#define I915_MAX_GT 4
> > + struct intel_gt *gt[I915_MAX_GT];
> > +
>
>
> It would be nice if I915_MAX_GT was defined in a more basic header file so
> that the definition of I915_MAX_
Hi Sujaritha,
[...]
> > +static ssize_t act_freq_mhz_show(struct device *dev,
> > +struct device_attribute *attr, char *buff)
> Alignment with the initial (
OK
[...]
> > +static INTEL_GT_RPS_SYSFS_ATTR(RP1_freq_mhz, 0444, rps_rp_mhz_show, NULL);
> > +static INT
== Series Details ==
Series: drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_* (rev2)
URL : https://patchwork.freedesktop.org/series/98440/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21981_full
With some VRR panels, user can turn VRR ON/OFF on the fly from the panel
settings.
When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore MSA
bit
in the DPCD. Currently the driver parses that onevery HPD but fails to reset
the corresponding VRR Capable Connector property.
Henc
On Wed, 2021-12-01 at 17:25 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> There's no need to have separate masks for the stride bitfield
> in PLANE_STRIDE for different platforms. All the extra bits
> are hardcoded to zero anyway.
>
> Also the masks we're using now don't even match the a
On Thu, 2021-12-02 at 13:57 +0200, Ville Syrjälä wrote:
> On Wed, Dec 01, 2021 at 05:26:50PM +, Souza, Jose wrote:
> > On Wed, 2021-12-01 at 17:25 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Polish the skl+ universal plane register defines by
> > > using REG_BIT() & co.
== Series Details ==
Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd
URL : https://patchwork.freedesktop.org/series/98801/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
519ba5ebf257 drm/i915/display/vrr: Reset VRR capable property on a long hpd
-:7: WARNI
On Wed, 2021-12-01 at 17:25 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Use REG_BIT() & co. for the pre-skl primary plane registers.
> Also give everything a consistent namespace.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/i9xx_plane.c| 99 +---
== Series Details ==
Series: drm/i915/psr: remove unused lines_to_wait vbt info
URL : https://patchwork.freedesktop.org/series/98791/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21982_full
Summary
== Series Details ==
Series: drm/i915/display/vrr: Reset VRR capable property on a long hpd
URL : https://patchwork.freedesktop.org/series/98801/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11075 -> Patchwork_21985
Summar
== Series Details ==
Series: drm/i915: Recalculate CDCLK if plane scaling ratio changes (rev2)
URL : https://patchwork.freedesktop.org/series/98750/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21983_full
===
On Mon, Jan 10, 2022 at 09:15:49PM -0800, Matt Roper wrote:
> Let's start splitting up and cleaning up parts of i915_reg.h. Rather
> than starting with dead code removal as we did in v1, this time we'll
> switch a few macros to parameterized style, and then move a few types of
> registers (engine
== Series Details ==
Series: Add has_psr2_sel_fech flag
URL : https://patchwork.freedesktop.org/series/98794/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11073_full -> Patchwork_21984_full
Summary
---
**SUCCESS**
From: Tvrtko Ursulin
On a multi-tile platform, each tile has its own registers + GGTT
space, and BAR 0 is extended to cover all of them.
Up to four gts are supported in i915->gt[], with slot zero
shadowing the existing i915->gt0 to enable source compatibility
with legacy driver paths. A for_each
Hi,
This is the second series that prepares i915 to host multitile
platforms. It introduces the for_each_gt() macro that loops over
the tiles to perform per gt actions.
This patch is a combination of two patches developed originally
by Abdiel, who introduced some refactoring during probe, and the
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create a 'gt/' directory in sysfs which will contain gt0...gtN
directories related to each tile configured in the GPU. Move the
power management files inside those directories.
The previous power management
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98806/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cb606c1584e6 drm/i915: Prepare for multiple GTs
-:254: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'id__' - possible
sid
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98806/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 1/12/2022 2:20 PM, Andi Shyti wrote:
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create a 'gt/' directory in sysfs which will contain gt0...gtN
directories related to each tile configured in the GPU. Move the
power management files inside those
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11075 -> Patchwork_21986
Summary
---
**SUCCESS**
No regr
On 11.01.2022 17:30, Matthew Brost wrote:
> Move the multi-lrc guc_id from the lower allocation partition (0 to
> number of multi-lrc guc_ids) to upper allocation partition (number of
> single-lrc to max guc_ids).
>
> Signed-off-by: Matthew Brost
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_submi
The flags are only used to mark a quirk to be called once and nothing
else. Also, that logic may not be appropriate if the quirk wants to
do additional filtering and set quirk as applied by itself.
So replace the uses of QFLAG_APPLY_ONCE with static local variables in
the few quirks that use this
On Thu, Jan 13, 2022 at 12:21:17AM +0100, Michal Wajdeczko wrote:
>
>
> On 11.01.2022 17:30, Matthew Brost wrote:
> > Move the multi-lrc guc_id from the lower allocation partition (0 to
> > number of multi-lrc guc_ids) to upper allocation partition (number of
> > single-lrc to max guc_ids).
> >
On Wed, Jan 12, 2022 at 03:30:43PM -0800, Lucas De Marchi wrote:
> The flags are only used to mark a quirk to be called once and nothing
> else. Also, that logic may not be appropriate if the quirk wants to
> do additional filtering and set quirk as applied by itself.
>
> So replace the uses of QF
On Wed, Jan 12, 2022 at 06:08:05PM -0600, Bjorn Helgaas wrote:
On Wed, Jan 12, 2022 at 03:30:43PM -0800, Lucas De Marchi wrote:
The flags are only used to mark a quirk to be called once and nothing
else. Also, that logic may not be appropriate if the quirk wants to
do additional filtering and se
== Series Details ==
Series: series starting with [v4] x86/quirks: Replace QFLAG_APPLY_ONCE with
static locals (rev3)
URL : https://patchwork.freedesktop.org/series/98622/
State : failure
== Summary ==
Applying: x86/quirks: Replace QFLAG_APPLY_ONCE with static locals
Applying: x86/quirks: Imp
Don't populate the read-only array flex_regs on the stack but
instead it static const. Also makes the object code a little smaller.
Signed-off-by: Colin Ian King
---
RESEND: Use correct e-mail address for sign-off and From: in e-mail.
---
drivers/gpu/drm/i915/i915_perf.c | 2 +-
1 file change
== Series Details ==
Series: series starting with [v4] x86/quirks: Replace QFLAG_APPLY_ONCE with
static locals (rev2)
URL : https://patchwork.freedesktop.org/series/98622/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11075 -> Patchwork_21987
=
== Series Details ==
Series: i915: make array flex_regs static const (rev2)
URL : https://patchwork.freedesktop.org/series/98688/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b36451511fd8 i915: make array flex_regs static const
-:23: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signe
On Wed, Jan 12, 2022 at 04:21:28PM -0800, Lucas De Marchi wrote:
> On Wed, Jan 12, 2022 at 06:08:05PM -0600, Bjorn Helgaas wrote:
> > On Wed, Jan 12, 2022 at 03:30:43PM -0800, Lucas De Marchi wrote:
> > > The flags are only used to mark a quirk to be called once and nothing
> > > else. Also, that l
On Wed, Jan 12, 2022 at 07:06:45PM -0600, Bjorn Helgaas wrote:
On Wed, Jan 12, 2022 at 04:21:28PM -0800, Lucas De Marchi wrote:
On Wed, Jan 12, 2022 at 06:08:05PM -0600, Bjorn Helgaas wrote:
> On Wed, Jan 12, 2022 at 03:30:43PM -0800, Lucas De Marchi wrote:
> > The flags are only used to mark a
== Series Details ==
Series: i915: make array flex_regs static const (rev2)
URL : https://patchwork.freedesktop.org/series/98688/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11075 -> Patchwork_21989
Summary
---
**S
Move the multi-lrc guc_id from the lower allocation partition (0 to
number of multi-lrc guc_ids) to upper allocation partition (number of
single-lrc to max guc_ids).
This will help when a native driver transitions to a PF after driver
load time. If the perma-pin guc_ids (kernel contexts) are in a
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/98806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11075_full -> Patchwork_21986_full
Summary
---
**SUCCESS**
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