> -Original Message-
> From: Lee, Shawn C
> Sent: Tuesday, July 20, 2021 8:01 PM
> To: Kulkarni, Vandita ; intel-
> g...@lists.freedesktop.org
> Cc: Ville Syrjala ; Jani Nikula
> ; Chiou, Cooper ;
> Tseng, William
> Subject: RE: [PATCH 5/5] drm/i915: Get proper min cdclk if vDSC enabled
>
On Thu, Jul 22, 2021 at 01:55:23AM -0400, Lucas De Marchi wrote:
> humn... PORT_F. KBL doesn't have PORT_F. We decided to keep the handling
> of DISPLAY_VER == 10 and DISPLAY_VER == 9 together and trust the VBT,
> but when the VBT is not present, DDI F will get added unconditio.
>
> maybe best thi
> > init_vbt_missing_defaults(struct drm_i915_private *i915)
> > {
> > enum port port;
> > - int ports = PORT_A | PORT_B | PORT_C | PORT_D | PORT_E | PORT_F;
> > + int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | \
> > + BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
No need f
== Series Details ==
Series: CI pass for reviewed Xe_HP SDV and DG2 patches
URL : https://patchwork.freedesktop.org/series/92853/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10367_full -> Patchwork_20673_full
Summary
On 22.07.2021 01:51, Daniele Ceraolo Spurio wrote:
>
>
> On 7/19/2021 9:04 PM, Matthew Brost wrote:
>> On Mon, Jul 19, 2021 at 05:51:46PM -0700, Daniele Ceraolo Spurio wrote:
>>>
>>> On 7/16/2021 1:16 PM, Matthew Brost wrote:
Implement GuC context operations which includes GuC specific ope
On 16/07/2021 21:17, Matthew Brost wrote:
Requests may take slightly longer with GuC submission, let's increase
the timeouts in live_requests.
Hm "slightly" ends up 5x longer here and one second feels a lot.
Out of curiosity, given this is about a simple submit of a no-op batches
in a tight
On 16/07/2021 21:17, Matthew Brost wrote:
From: John Harrison
Some testing environments and some heavier tests are slower than
What testing environments are they? It's not a simulation patch which
"escaped" by accident I am wondering. If not then it's just GuC which is
so slow, like that
On 21/07/2021 19:44, Lucas De Marchi wrote:
On Wed, Jul 21, 2021 at 10:25:59AM +0100, Tvrtko Ursulin wrote:
On 21/07/2021 00:20, Lucas De Marchi wrote:
This is only used by GRAPHICS_VER == 6 and GRAPHICS_VER == 7. All other
recent platforms do not depend on this field, so it doesn't make much
On Wed, 21 Jul 2021 at 21:28, Jason Ekstrand wrote:
>
> On Thu, Jul 15, 2021 at 5:16 AM Matthew Auld wrote:
> >
> > From: Chris Wilson
> >
> > Jason Ekstrand requested a more efficient method than userptr+set-domain
> > to determine if the userptr object was backed by a complete set of pages
> >
On Wed, Jul 21, 2021 at 10:24:01PM +0200, Daniel Vetter wrote:
> On Wed, Jul 21, 2021 at 10:17 PM Jason Ekstrand wrote:
> >
> > On Wed, Jul 21, 2021 at 1:32 PM Daniel Vetter
> > wrote:
> > >
> > > This essentially reverts
> > >
> > > commit 84a1074920523430f9dc30ff907f4801b4820072
> > > Author:
v2:
- Check for dsc enable and slice count ==1 then allow to
double confirm min cdclk value.
- Add more checking in dsi_dsc_compute_config() to avoid
crtc_clock exceeds dev_priv->max_cdclk_freq.
Lee Shawn C (5):
drm/i915/dsi: send correct gpio_number on gen11 platform
drm/i915/jsl: program
Driver should wait for free header or payload buffer in FIFO.
It would be good to wait a while for HW to release credit before
give it up to write to HW. Without sending initailize command
sets completely. It would caused MIPI display can't light up properly.
Cc: Ville Syrjala
Cc: Jani Nikula
Cc
VDSC engine can process only 1 pixel per Cd clock. In case
VDSC is used and max slice count == 1, max supported pixel
clock should be 100% of CD clock. Then do min_cdclk and
pixel clock comparison to get proper min cdclk.
v2:
- Check for dsc enable and slice count ==1 then allow to
double confir
According to chapter "Sending Commands to the Panel" in bspec #29738
and #49188. If driver try to send DCS long pakcet, we have to program
TX payload register at first. And configure TX header HW register later.
DSC long packet would not be sent properly if we don't follow this
sequence.
Cc: Ville
Transfer "gpio_nunmber" instead of "gpio_index" while doing
gpio configuration in icl_exec_gpio().
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Vandita Kulkarni
Cc: Cooper Chiou
Cc: William Tseng
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +-
1 file changed, 1
DSI driver should have its own implementation to toggle
gpio pins based on GPIO info coming from VBT sequences.
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Vandita Kulkarni
Cc: Cooper Chiou
Cc: William Tseng
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 44
On Wed, 21 Jul 2021 at 21:11, Jason Ekstrand wrote:
>
> On Mon, Jul 19, 2021 at 8:35 AM Matthew Auld
> wrote:
> >
> > On Fri, 16 Jul 2021 at 20:49, Jason Ekstrand wrote:
> > >
> > > On Fri, Jul 16, 2021 at 1:45 PM Matthew Auld
> > > wrote:
> > > >
> > > > On Fri, 16 Jul 2021 at 18:39, Jason Eks
On Thu, 22 Jul 2021 at 10:49, Matthew Auld
wrote:
>
> On Wed, 21 Jul 2021 at 21:11, Jason Ekstrand wrote:
> >
> > On Mon, Jul 19, 2021 at 8:35 AM Matthew Auld
> > wrote:
> > >
> > > On Fri, 16 Jul 2021 at 20:49, Jason Ekstrand wrote:
> > > >
> > > > On Fri, Jul 16, 2021 at 1:45 PM Matthew Auld
On 21/07/2021 19:32, Daniel Vetter wrote:
This essentially reverts
commit 84a1074920523430f9dc30ff907f4801b4820072
Author: Chris Wilson
Date: Wed Jan 24 11:36:08 2018 +
drm/i915: Shrink the GEM kmem_caches upon idling
mm/vmscan.c:do_shrink_slab() is a thing, if there's an issue w
On Wed, Jul 21, 2021 at 10:23:56AM -0500, Jason Ekstrand wrote:
> If we have a failure, decrement the reference count so that the next
> call to ttm_global_init() will actually do something instead of assume
> everything is all set up.
>
> Signed-off-by: Jason Ekstrand
> Fixes: 62b53b37e4b1 ("drm
On 2021.07.21 17:53:34 +0200, Christoph Hellwig wrote:
> Hi all,
>
> the GVT code in the i915 is a bit of a mess right now due to strange
> abstractions and lots of indirect calls. This series refactors various
> bits to clean that up. The main user visible change is that almost all
> of the GVT
On Wed, Jul 21, 2021 at 03:15:09PM -0500, Jason Ekstrand wrote:
> On Wed, Jul 21, 2021 at 1:56 PM Daniel Vetter wrote:
> >
> > On Wed, Jul 21, 2021 at 05:25:41PM +0100, Matthew Auld wrote:
> > > On 21/07/2021 16:23, Jason Ekstrand wrote:
> > > > There's no reason that I can tell why this should be
On Wed, Jul 21, 2021 at 10:23:57AM -0500, Jason Ekstrand wrote:
> We create a bunch of debugfs entries as a side-effect of
> ttm_global_init() and then never clean them up. This isn't usually a
> problem because we free the whole debugfs directory on module unload.
> However, if the global referen
On Thu, Jul 22, 2021 at 11:02:55AM +0100, Tvrtko Ursulin wrote:
> On 21/07/2021 19:32, Daniel Vetter wrote:
> > This essentially reverts
> >
> > commit 84a1074920523430f9dc30ff907f4801b4820072
> > Author: Chris Wilson
> > Date: Wed Jan 24 11:36:08 2018 +
> >
> > drm/i915: Shrink the G
v2:
- Check for dsc enable and slice count ==1 then allow to
double confirm min cdclk value.
Lee Shawn C (5):
drm/i915/dsi: send correct gpio_number on gen11 platform
drm/i915/jsl: program DSI panel GPIOs
drm/i915/dsi: wait for header and payload credit available
drm/i915/dsi: refine sen
Transfer "gpio_nunmber" instead of "gpio_index" while doing
gpio configuration in icl_exec_gpio().
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Vandita Kulkarni
Cc: Cooper Chiou
Cc: William Tseng
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +-
1 file changed, 1
DSI driver should have its own implementation to toggle
gpio pins based on GPIO info coming from VBT sequences.
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Vandita Kulkarni
Cc: Cooper Chiou
Cc: William Tseng
Signed-off-by: Lee Shawn C
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 44
Driver should wait for free header or payload buffer in FIFO.
It would be good to wait a while for HW to release credit before
give it up to write to HW. Without sending initailize command
sets completely. It would caused MIPI display can't light up properly.
Cc: Ville Syrjala
Cc: Jani Nikula
Cc
VDSC engine can process only 1 pixel per Cd clock. In case
VDSC is used and max slice count == 1, max supported pixel
clock should be 100% of CD clock. Then do min_cdclk and
pixel clock comparison to get proper min cdclk.
v2:
- Check for dsc enable and slice count ==1 then allow to
double confir
According to chapter "Sending Commands to the Panel" in bspec #29738
and #49188. If driver try to send DCS long pakcet, we have to program
TX payload register at first. And configure TX header HW register later.
DSC long packet would not be sent properly if we don't follow this
sequence.
Cc: Ville
On 22/07/2021 11:16, Daniel Vetter wrote:
On Thu, Jul 22, 2021 at 11:02:55AM +0100, Tvrtko Ursulin wrote:
On 21/07/2021 19:32, Daniel Vetter wrote:
This essentially reverts
commit 84a1074920523430f9dc30ff907f4801b4820072
Author: Chris Wilson
Date: Wed Jan 24 11:36:08 2018 +
drm
On Thu, Jul 22, 2021 at 05:29:28PM +0800, Desmond Cheong Zhi Xi wrote:
> In particular, we make it clear that &drm_device.mode_config.idr_mutex
> protects the lease idr and list structures for drm_master. The lessor
> field itself doesn't need to be protected as it doesn't change after
> it's set i
On Thu, Jul 22, 2021 at 05:29:27PM +0800, Desmond Cheong Zhi Xi wrote:
> Inside drm_is_current_master, using the outer drm_device.master_mutex
> to protect reads of drm_file.master makes the function prone to creating
> lock hierarchy inversions. Instead, we can use the
> drm_file.master_lookup_loc
On Thu, Jul 22, 2021 at 05:29:29PM +0800, Desmond Cheong Zhi Xi wrote:
> drm_file.master should be protected by either drm_device.master_mutex
> or drm_file.master_lookup_lock when being dereferenced. However,
> drm_master_get is called on unprotected file_priv->master pointers in
> vmw_surface_def
drm-misc-next-2021-07-22:
drm-misc-next for v5.15-rc1:
UAPI Changes:
- Remove sysfs stats for dma-buf attachments, as it causes a performance
regression.
Previous merge is not in a rc kernel yet, so no userspace regression possible.
Cross-subsystem Changes:
- Sanitize user input in kyro's view
Hi Christoph:
Thanks so much for the patches and the testing.
The abstraction between i915 and KVMGT module is for our customers who can
easily port GVT-g into their own hypervisors. As you can see, all the
hypervisor related functions were put in "hypervisor" module. The GVT-g module
talks wi
== Series Details ==
Series: MIPI DSI driver enhancements (rev2)
URL : https://patchwork.freedesktop.org/series/92695/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/displa
== Series Details ==
Series: MIPI DSI driver enhancements (rev2)
URL : https://patchwork.freedesktop.org/series/92695/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10369 -> Patchwork_20676
Summary
---
**SUCCESS**
Hi,
> https://github.com/intel/gvt-linux/blob/topic/gvt-xengt/drivers/gpu/drm/i915/gvt/xengt.c
> But it's hard for some customers to contribute their own "hypervisor"
> module to the upstream Linux kernel. I am thinking what would be a
> better solution here? The MPT layer in the kernel helps a
Try to document the object caching related bits, like cache_coherent and
cache_dirty.
v2(Ville):
- As pointed out by Ville, fix the completely incorrect assumptions
about the "partial" coherency on shared LLC platforms.
v3(Daniel):
- Fix nonsense about "dirtying" the cache with reads.
Sugges
EHL and JSL add the 'Bypass LLC' MOCS entry, which should make it
possible for userspace to bypass the GTT caching bits set by the kernel,
as per the given object cache_level. This is troublesome since the heavy
flush we apply when first acquiring the pages is skipped if the kernel
thinks the objec
Hi Dave and Daniel,
here's the PR for drm-misc-fixes. There's a UAPI change where -ENOTTY is
now being returned for non-DRM ioctls.
Best regards
Thomas
drm-misc-fixes-2021-07-22:
Short summary of fixes pull:
* Return -ENOTTY for non-DRM ioctls
* amdgpu: Fix COW checks
* nouveau: init BO GME
On Thu, Jul 22, 2021 at 12:34:55PM +0100, Matthew Auld wrote:
> Try to document the object caching related bits, like cache_coherent and
> cache_dirty.
>
> v2(Ville):
> - As pointed out by Ville, fix the completely incorrect assumptions
>about the "partial" coherency on shared LLC platforms.
On Wed, Jul 21, 2021 at 9:42 PM Souza, Jose wrote:
> On Wed, 2021-07-21 at 09:56 +0200, Daniel Vetter wrote:
> > On Wed, Jul 21, 2021 at 9:50 AM Daniel Vetter wrote:
> > > On Tue, Jul 20, 2021 at 6:55 PM Souza, Jose wrote:
> > > > On Tue, 2021-07-20 at 17:31 +0200, Daniel Vetter wrote:
> > > > >
On 16/07/2021 21:16, Matthew Brost wrote:
With GuC virtual engines the physical engine which a request executes
and completes on isn't known to the i915. Therefore we can't attach a
request to a physical engines breadcrumbs. To work around this we create
a single breadcrumbs per engine class wh
On Thu, Jul 22, 2021 at 05:45:16PM +0800, Zhenyu Wang wrote:
> The reason we isolated hypervisor specific code from core vgpu
> emulation is to make multiple hypervisor support possible. Yes, we do
> have Xen support but never got way into upstream...And we also have
> third party hypervisors which
On Thu, Jul 22, 2021 at 10:00:40AM -0300, Jason Gunthorpe wrote:
> this is better:
>
>struct sg_append_table state;
>
>sg_append_init(&state, sgt, gfp_mask);
>
>while (..)
> ret = sg_append_pages(&state, pages, n_pages, ..)
> if (ret)
>sg_append_abort(&state); // Fr
On Thu, Jul 22, 2021 at 10:49:47AM +, Wang, Zhi A wrote:
> But it's hard for some customers to contribute their own "hypervisor"
> module to the upstream Linux kernel.
What prevents them from doing this? We will take any code that meets
our standards, what format is this external code in?
>
drm_file.master should be protected by either drm_device.master_mutex
or drm_file.master_lookup_lock when being dereferenced. However,
drm_master_get is called on unprotected file_priv->master pointers in
vmw_surface_define_ioctl and vmw_gb_surface_define_internal.
This is fixed by replacing drm_m
In particular, we make it clear that &drm_device.mode_config.idr_mutex
protects the lease idr and list structures for drm_master. The lessor
field itself doesn't need to be protected as it doesn't change after
it's set in drm_lease_create.
Additionally, we add descriptions for the lifetime of less
Inside drm_is_current_master, using the outer drm_device.master_mutex
to protect reads of drm_file.master makes the function prone to creating
lock hierarchy inversions. Instead, we can use the
drm_file.master_lookup_lock that sits at the bottom of the lock
hierarchy.
Reported-by: Daniel Vetter
S
On 21/7/21 9:23 pm, Daniel Vetter wrote:
On Wed, Jul 21, 2021 at 2:44 PM Desmond Cheong Zhi Xi
wrote:
On 21/7/21 6:29 pm, Daniel Vetter wrote:
On Wed, Jul 21, 2021 at 6:12 AM Desmond Cheong Zhi Xi
wrote:
On 21/7/21 2:24 am, Daniel Vetter wrote:
On Mon, Jul 12, 2021 at 12:35:03PM +0800, Desm
On 22/7/21 6:35 pm, Daniel Vetter wrote:
On Thu, Jul 22, 2021 at 05:29:28PM +0800, Desmond Cheong Zhi Xi wrote:
In particular, we make it clear that &drm_device.mode_config.idr_mutex
protects the lease idr and list structures for drm_master. The lessor
field itself doesn't need to be protected a
Hi,
This series contains some improvements that Daniel Vetter proposed following a
discussion on a recent series:
https://lore.kernel.org/lkml/20210712043508.11584-1-desmondcheon...@gmail.com/
While preparing these patches, I also noticed some unprotected uses of
drm_master in the vmwgfx driver
On Thu, Jul 22, 2021 at 3:44 AM Matthew Auld
wrote:
>
> On Wed, 21 Jul 2021 at 21:28, Jason Ekstrand wrote:
> >
> > On Thu, Jul 15, 2021 at 5:16 AM Matthew Auld wrote:
> > >
> > > From: Chris Wilson
> > >
> > > Jason Ekstrand requested a more efficient method than userptr+set-domain
> > > to de
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: document caching related bits
URL : https://patchwork.freedesktop.org/series/92889/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c4aff2fea027 drm/i915: document caching related bits
abcea5c46d5f drm/i915/ehl:
On Thu, Jul 22, 2021 at 5:34 AM Tvrtko Ursulin
wrote:
> On 22/07/2021 11:16, Daniel Vetter wrote:
> > On Thu, Jul 22, 2021 at 11:02:55AM +0100, Tvrtko Ursulin wrote:
> >> On 21/07/2021 19:32, Daniel Vetter wrote:
> >>> This essentially reverts
> >>>
> >>> commit 84a1074920523430f9dc30ff907f4801b48
Hi Dave and Daniel,
Here goes drm-intel-fixes-2021-07-22:
Couple reverts from Jason getting rid of asynchronous command parsing
and fence error propagation and a GVT fix of shadow ppgtt invalidation
with proper D3 state tracking from Colin.
Thanks,
Rodrigo.
The following changes since commit 27
PORT_A to PORT_F are regular integers defined in the enum port,
while for_each_port_masked requires a bit mask for the ports.
Current given mask: 0b111
Desired mask: 0b11
I noticed this while Christoph was reporting a bug found on headless
GVT configuration which bisect blamed commit 3ae04c0c
On 20/07/2021 02:59, Matthew Brost wrote:
On Tue, Jul 13, 2021 at 10:06:17AM +0100, Tvrtko Ursulin wrote:
On 24/06/2021 08:04, Matthew Brost wrote:
Add trace points for request dependencies and GuC submit. Extended
existing request trace points to include submit fence value,, guc_id,
and rin
== Series Details ==
Series: series starting with [v3,1/2] drm/i915: document caching related bits
URL : https://patchwork.freedesktop.org/series/92889/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10371 -> Patchwork_20677
On 22/07/2021 14:37, Jason Ekstrand wrote:
On Thu, Jul 22, 2021 at 5:34 AM Tvrtko Ursulin
wrote:
On 22/07/2021 11:16, Daniel Vetter wrote:
On Thu, Jul 22, 2021 at 11:02:55AM +0100, Tvrtko Ursulin wrote:
On 21/07/2021 19:32, Daniel Vetter wrote:
This essentially reverts
commit 84a107492052
== Series Details ==
Series: drm, drm/vmwgfx: fixes and updates related to drm_master
URL : https://patchwork.freedesktop.org/series/92894/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+driver
On Thu, Jul 22, 2021 at 3:03 PM Desmond Cheong Zhi Xi
wrote:
>
> On 22/7/21 6:35 pm, Daniel Vetter wrote:
> > On Thu, Jul 22, 2021 at 05:29:28PM +0800, Desmond Cheong Zhi Xi wrote:
> >> In particular, we make it clear that &drm_device.mode_config.idr_mutex
> >> protects the lease idr and list stru
== Series Details ==
Series: MIPI DSI driver enhancements (rev2)
URL : https://patchwork.freedesktop.org/series/92695/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10369_full -> Patchwork_20676_full
Summary
---
**SU
== Series Details ==
Series: SG fix together with update to RDMA umem (rev2)
URL : https://patchwork.freedesktop.org/series/92682/
State : failure
== Summary ==
Applying: lib/scatterlist: Fix wrong update of orig_nents
error: sha1 information is lacking or useless
(drivers/gpu/drm/i915/gem/i9
== Series Details ==
Series: drm, drm/vmwgfx: fixes and updates related to drm_master
URL : https://patchwork.freedesktop.org/series/92894/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10371 -> Patchwork_20678
Summary
On Tue, Jul 20 2021, Jason Gunthorpe wrote:
> Currently the driver ops have an open/release pair that is called once
> each time a device FD is opened or closed. Add an additional set of
> open/close_device() ops which are called when the device FD is opened for
> the first time and closed for th
On Tue, Jul 20 2021, Jason Gunthorpe wrote:
> Platform simply wants to run some code when the device is first
> opened/last closed. Use the core framework and locking for this. Aside
> from removing a bit of code this narrows the locking scope from a global
> lock.
>
> Signed-off-by: Yishai Hada
== Series Details ==
Series: drm/i915/bios: Fix ports mask (rev2)
URL : https://patchwork.freedesktop.org/series/92850/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10371 -> Patchwork_20680
Summary
---
**FAILURE**
On Thu, Jul 22, 2021 at 09:57:00AM +0200, Michal Wajdeczko wrote:
>
>
> On 22.07.2021 01:51, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 7/19/2021 9:04 PM, Matthew Brost wrote:
> >> On Mon, Jul 19, 2021 at 05:51:46PM -0700, Daniele Ceraolo Spurio wrote:
> >>>
> >>> On 7/16/2021 1:16 PM, Matthe
On Thu, Jul 22, 2021 at 08:20:34AM +0100, Christoph Hellwig wrote:
On Thu, Jul 22, 2021 at 01:55:23AM -0400, Lucas De Marchi wrote:
humn... PORT_F. KBL doesn't have PORT_F. We decided to keep the handling
of DISPLAY_VER == 10 and DISPLAY_VER == 9 together and trust the VBT,
but when the VBT is n
On Thu, Jul 22, 2021 at 12:38:10PM +0200, Daniel Vetter wrote:
> On Thu, Jul 22, 2021 at 05:29:27PM +0800, Desmond Cheong Zhi Xi wrote:
> > Inside drm_is_current_master, using the outer drm_device.master_mutex
> > to protect reads of drm_file.master makes the function prone to creating
> > lock hie
On Thu, Jul 22, 2021 at 09:03:45AM -0700, Lucas De Marchi wrote:
> On Thu, Jul 22, 2021 at 08:20:34AM +0100, Christoph Hellwig wrote:
> > On Thu, Jul 22, 2021 at 01:55:23AM -0400, Lucas De Marchi wrote:
> > > humn... PORT_F. KBL doesn't have PORT_F. We decided to keep the handling
> > > of DISPLAY_
On Thu, Jul 22, 2021 at 07:47:21AM +, Patchwork wrote:
> == Series Details ==
>
> Series: CI pass for reviewed Xe_HP SDV and DG2 patches
> URL : https://patchwork.freedesktop.org/series/92853/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_10367_full -> Patchwork_
== Series Details ==
Series: drm/i915/bios: Fix ports mask (rev3)
URL : https://patchwork.freedesktop.org/series/92850/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10371 -> Patchwork_20681
Summary
---
**FAILURE**
On Sun, Jul 18, 2021 at 02:09:12PM +0300, Leon Romanovsky wrote:
> @@ -386,12 +414,14 @@ static struct scatterlist *get_next_sg(struct sg_table
> *table,
> return ERR_PTR(-ENOMEM);
> sg_init_table(new_sg, alloc_size);
> if (cur) {
> + if (total_nents)
> +
Commit 5a9d38b20a5a ("drm/i915/display: hide workaround for broken vbt
in intel_bios.c") moved the workaround for broken or missing VBT to
intel_bios.c. However is_port_valid() only protects the handling of
different skus of the same display version. Since in
intel_setup_outputs() we share the code
On Thu, Jul 22, 2021 at 02:07:51PM +0100, Christoph Hellwig wrote:
> On Thu, Jul 22, 2021 at 10:00:40AM -0300, Jason Gunthorpe wrote:
> > this is better:
> >
> >struct sg_append_table state;
> >
> >sg_append_init(&state, sgt, gfp_mask);
> >
> >while (..)
> > ret = sg_append_page
Hi Vinay,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next drm/drm-next v5.14-rc2 next-20210722]
[If your patch is applied to the wrong git tree
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:217:5: warning: symbol
'slpc_decode_min_freq' was not declared. Should it be static?
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:229:5: warning: symbol
'slpc_decode_max_freq' was not declared. Should it be static?
Reported-by: kernel test robot
Signed
Hi,
I'm not knowledgeable enougth to give this a full review. If you can
just answer my questions, fell free to add an
Acked-by: Thomas Zimmermann
to the patch. :)
Am 13.07.21 um 22:51 schrieb Daniel Vetter:
We want to stop gup, which isn't the case if we use vmf_insert_page
What is gup?
Hi
Am 13.07.21 um 22:51 schrieb Daniel Vetter:
intel-gfx-ci realized that something is not quite coherent anymore on
some platforms for our i915+vgem tests, when I tried to switch vgem
over to shmem helpers.
After lots of head-scratching I realized that I've removed calls to
drm_clflush. And we
Hi
Am 13.07.21 um 22:51 schrieb Daniel Vetter:
Aside from deleting lots of code the real motivation here is to switch
the mmap over to VM_PFNMAP, to be more consistent with what real gpu
drivers do. They're all VM_PFNMP, which means get_user_pages doesn't
work, and even if you try and there's a
On Thu, Jul 22, 2021 at 6:00 PM Boqun Feng wrote:
>
> On Thu, Jul 22, 2021 at 12:38:10PM +0200, Daniel Vetter wrote:
> > On Thu, Jul 22, 2021 at 05:29:27PM +0800, Desmond Cheong Zhi Xi wrote:
> > > Inside drm_is_current_master, using the outer drm_device.master_mutex
> > > to protect reads of drm_
On Thu, Jul 22, 2021 at 10:15:35AM -0700, Lucas De Marchi wrote:
> Commit 5a9d38b20a5a ("drm/i915/display: hide workaround for broken vbt
> in intel_bios.c") moved the workaround for broken or missing VBT to
> intel_bios.c. However is_port_valid() only protects the handling of
> different skus of t
Workaround also needed for alderlake-P.
HSDES: 14010801662
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i
On 7/22/21 5:29 AM, Desmond Cheong Zhi Xi wrote:
drm_file.master should be protected by either drm_device.master_mutex
or drm_file.master_lookup_lock when being dereferenced. However,
drm_master_get is called on unprotected file_priv->master pointers in
vmw_surface_define_ioctl and vmw_gb_surface
Thanks for the feedback!
On Tue, Jul 20, 2021 at 9:29 AM Daniel Vetter wrote:
>
> On Wed, Jul 14, 2021 at 11:51:36AM -0600, Jim Cromie wrote:
> > drm's debug system uses distinct categories of debug messages, encoded
> > in an enum (DRM_UT_), which are mapped to bits in drm.debug.
> > drm_debug_
== Series Details ==
Series: series starting with [01/10] drm/i915/bios: Allow DSI ports to be
parsed by parse_ddi_port() (rev2)
URL : https://patchwork.freedesktop.org/series/92874/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2895a0aeaa5c drm/i915/bios: Allow DSI ports to b
== Series Details ==
Series: series starting with [01/10] drm/i915/bios: Allow DSI ports to be
parsed by parse_ddi_port() (rev2)
URL : https://patchwork.freedesktop.org/series/92874/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each c
On 7/16/2021 1:17 PM, Matthew Brost wrote:
This adds GuC backend support for i915_request_cancel(), which in turn
makes CONFIG_DRM_I915_REQUEST_TIMEOUT work.
This needs a bit of explanation on why we're using fences for this
instead of other simpler options.
Signed-off-by: Matthew Brost
On Thu, Jul 22, 2021 at 12:56:56PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 7/16/2021 1:17 PM, Matthew Brost wrote:
> > This adds GuC backend support for i915_request_cancel(), which in turn
> > makes CONFIG_DRM_I915_REQUEST_TIMEOUT work.
>
> This needs a bit of explanation on why we're usi
== Series Details ==
Series: series starting with [01/10] drm/i915/bios: Allow DSI ports to be
parsed by parse_ddi_port() (rev2)
URL : https://patchwork.freedesktop.org/series/92874/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10373 -> Patchwork_20682
==
On Thu, Jul 22, 2021 at 12:20:41PM -0700, José Roberto de Souza wrote:
> Workaround also needed for alderlake-P.
>
> HSDES: 14010801662
> Cc: Matt Roper
> Signed-off-by: José Roberto de Souza
Marked incorrectly in the workaround database, but based on the notes
there, it is indeed needed for AD
On 7/16/2021 1:17 PM, Matthew Brost wrote:
Implement a simple static mapping algorithm of the i915 priority levels
(int, -1k to 1k exposed to user) to the 4 GuC levels. Mapping is as
follows:
i915 level < 0 -> GuC low level (3)
i915 level == 0 -> GuC normal level (2)
i91
== Series Details ==
Series: drm/i915/display: split DISPLAY_VER 9 and 10 in intel_setup_outputs()
URL : https://patchwork.freedesktop.org/series/92902/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10373 -> Patchwork_20683
== Series Details ==
Series: drm/i915: Extend Wa_1406941453 to adl-p
URL : https://patchwork.freedesktop.org/series/92905/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10373 -> Patchwork_20684
Summary
---
**SUCCESS*
On Thu, Jul 22, 2021 at 01:26:30PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 7/16/2021 1:17 PM, Matthew Brost wrote:
> > Implement a simple static mapping algorithm of the i915 priority levels
> > (int, -1k to 1k exposed to user) to the 4 GuC levels. Mapping is as
> > follows:
> >
> > i915 l
On Thu, Jul 22, 2021 at 03:09:13PM -, Patchwork wrote:
>Patch Details
>
>Series: drm/i915/bios: Fix ports mask (rev2)
>URL: [1]https://patchwork.freedesktop.org/series/92850/
>State: failure
>Details:
>[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20680/i
1 - 100 of 163 matches
Mail list logo
