[Intel-gfx] [PATCH v3] drm/i915/mst: Hookup DRM DP MST late_register/early_unregister callbacks

2020-03-10 Thread Lyude Paul
i915 can enable aux device nodes for DP MST by calling drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister(), so let's hook that up. Changes since v1: * Call intel_connector_register/unregister() from intel_dp_mst_connector_late_register/unregister() so we don't lose err

Re: [Intel-gfx] [RFC 02/12] drm/i915: Update client name on context create

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 18:11, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 18:31:19) @@ -92,8 +107,8 @@ __i915_drm_client_register(struct i915_drm_client *client, static void __i915_drm_client_unregister(struct i915_drm_client *client) { - put_pid(fetch_and_zero(&client->pid)); -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for list: Prevent compiler reloads inside 'safe' list iteration

2020-03-10 Thread Patchwork
== Series Details == Series: list: Prevent compiler reloads inside 'safe' list iteration URL : https://patchwork.freedesktop.org/series/74495/ State : warning == Summary == $ dim checkpatch origin/drm-tip d40a755ea0b3 list: Prevent compiler reloads inside 'safe' list iteration -:37: CHECK:MACR

Re: [Intel-gfx] [RFC 05/12] drm/i915: Track runtime spent in unreachable intel_contexts

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 18:25, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 18:31:22) From: Tvrtko Ursulin As contexts are abandoned we want to remember how much GPU time they used (per class) so later we can used it for smarter purposes. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm

Re: [Intel-gfx] [RFC 06/12] drm/i915: Track runtime spent in closed GEM contexts

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 18:28, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 18:31:23) diff --git a/drivers/gpu/drm/i915/i915_drm_client.h b/drivers/gpu/drm/i915/i915_drm_client.h index 7825df32798d..10752107e8c7 100644 --- a/drivers/gpu/drm/i915/i915_drm_client.h +++ b/drivers/gpu/drm/i915/i9

Re: [Intel-gfx] [RFC 08/12] drm/i915: Expose per-engine client busyness

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 18:32, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 18:31:25) +static ssize_t +show_client_busy(struct device *kdev, struct device_attribute *attr, char *buf) +{ + struct i915_engine_busy_attribute *i915_attr = + container_of(attr, typeof(*i915_attr)

Re: [Intel-gfx] [PATCH 6/7] drm/i915/perf: add interrupt enabling parameter

2020-03-10 Thread Umesh Nerlige Ramappa
On Tue, Mar 03, 2020 at 02:19:04PM -0800, Umesh Nerlige Ramappa wrote: From: Lionel Landwerlin This let's the application choose to be driven by the interrupt mechanism of the HW. In conjuction with long periods for checks for the availability of data on the CPU, this can reduce the CPU load wh

Re: [Intel-gfx] [PATCH v3] drm/i915/mst: Hookup DRM DP MST late_register/early_unregister callbacks

2020-03-10 Thread Ville Syrjälä
On Tue, Mar 10, 2020 at 03:51:21PM -0400, Lyude Paul wrote: > i915 can enable aux device nodes for DP MST by calling > drm_dp_mst_connector_late_register()/drm_dp_mst_connector_early_unregister(), > so let's hook that up. > > Changes since v1: > * Call intel_connector_register/unregister() from >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: Invalidate OA TLB on when closing perf stream

2020-03-10 Thread Patchwork
== Series Details == Series: drm/i915/perf: Invalidate OA TLB on when closing perf stream URL : https://patchwork.freedesktop.org/series/74469/ State : success == Summary == CI Bug Log - changes from CI_DRM_8106_full -> Patchwork_16897_full

Re: [Intel-gfx] [RFC 08/12] drm/i915: Expose per-engine client busyness

2020-03-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-10 20:04:23) > > On 10/03/2020 18:32, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2020-03-09 18:31:25) > >> +static ssize_t > >> +show_client_busy(struct device *kdev, struct device_attribute *attr, char > >> *buf) > >> +{ > >> + struct i915_engine_busy_a

[Intel-gfx] [PATCH] drm/i915: Get rid of silly void* from MST code

2020-03-10 Thread Ville Syrjala
From: Ville Syrjälä Not sure why this thing is trying to avoid declaring the proper type for these pointers. But since these are used only once let's just get rid of the local variable entirely. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 1 file c

Re: [Intel-gfx] [PATCH v19 1/8] drm/i915: Start passing latency as parameter

2020-03-10 Thread Ville Syrjälä
On Tue, Mar 10, 2020 at 02:54:12PM +, Lisovskiy, Stanislav wrote: > On Tue, 2020-03-10 at 16:32 +0200, Ville Syrjälä wrote: > > On Mon, Mar 09, 2020 at 06:11:57PM +0200, Stanislav Lisovskiy wrote: > > > We need to start passing memory latency as a > > > parameter when calculating plane wm level

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter (rev2)

2020-03-10 Thread Souza, Jose
On Tue, 2020-03-10 at 18:13 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC > in fastsets when disabled by parameter (rev2) > URL : https://patchwork.freedesktop.org/series/74401/ > State : success > > == Summary == > > CI

Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl

2020-03-10 Thread Lionel Landwerlin
On 09/03/2020 21:51, Umesh Nerlige Ramappa wrote: On Wed, Mar 04, 2020 at 09:56:28PM -0800, Dixit, Ashutosh wrote: On Wed, 04 Mar 2020 00:52:34 -0800, Lionel Landwerlin wrote: On 04/03/2020 07:48, Dixit, Ashutosh wrote: > On Tue, 03 Mar 2020 14:19:05 -0800, Umesh Nerlige Ramappa wrote: >> From

Re: [Intel-gfx] [PATCH 6/7] drm/i915/perf: add interrupt enabling parameter

2020-03-10 Thread Lionel Landwerlin
On 10/03/2020 22:08, Umesh Nerlige Ramappa wrote: On Tue, Mar 03, 2020 at 02:19:04PM -0800, Umesh Nerlige Ramappa wrote: From: Lionel Landwerlin This let's the application choose to be driven by the interrupt mechanism of the HW. In conjuction with long periods for checks for the availability

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags

2020-03-10 Thread Patchwork
== Series Details == Series: series starting with [v5,1/2] drm/edid: Name the detailed monitor range flags URL : https://patchwork.freedesktop.org/series/74471/ State : success == Summary == CI Bug Log - changes from CI_DRM_8106_full -> Patchwork_16898_full ===

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Add support for integrated privacy screen

2020-03-10 Thread Patchwork
== Series Details == Series: drm: Add support for integrated privacy screen URL : https://patchwork.freedesktop.org/series/74473/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8106_full -> Patchwork_16899_full Summary -

Re: [Intel-gfx] [PATCH] drm/i915: Get rid of silly void* from MST code

2020-03-10 Thread Souza, Jose
On Tue, 2020-03-10 at 22:27 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Not sure why this thing is trying to avoid declaring the proper > type for these pointers. But since these are used only once let's > just get rid of the local variable entirely. Reviewed-by: José Roberto de Souza

[Intel-gfx] [RFC] GPU-bound energy efficiency improvements for the intel_pstate driver (v2).

2020-03-10 Thread Francisco Jerez
This is my second take on improving the energy efficiency of the intel_pstate driver under IO-bound conditions. The problem and approach to solve it are roughly the same as in my previous series [1] at a high level: In IO-bound scenarios (by definition) the throughput of the system doesn't improv

[Intel-gfx] [PATCH 08/10] cpufreq: intel_pstate: Enable VLP controller based on ACPI FADT profile and CPUID.

2020-03-10 Thread Francisco Jerez
For the moment the VLP controller is only enabled on ICL platforms other than server FADT profiles in order to reduce the validation effort of the initial submission. It should work on any other processors that support HWP though (and soon enough on non-HWP too): In order to override the default b

[Intel-gfx] [PATCH 10/10] OPTIONAL: cpufreq: intel_pstate: Expose VLP controller parameters via debugfs.

2020-03-10 Thread Francisco Jerez
This is not required for the controller to work but has proven very useful for debugging and testing of alternative heuristic parameters, which may offer a better trade-off between energy efficiency and latency. A warning is printed out which should taint the kernel for the non-standard calibratio

[Intel-gfx] [PATCH 03/10] OPTIONAL: drm/i915: Expose PM QoS control parameters via debugfs.

2020-03-10 Thread Francisco Jerez
Signed-off-by: Francisco Jerez --- drivers/gpu/drm/i915/i915_debugfs.c | 69 + 1 file changed, 69 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 8f2525e4ce0f..e5c27b9302d9 100644 --- a/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 07/10] cpufreq: intel_pstate: Implement VLP controller for HWP parts.

2020-03-10 Thread Francisco Jerez
This implements a simple variably low-pass-filtering governor in control of the HWP MIN/MAX PERF range based on the previously introduced get_vlp_target_range(). See "cpufreq: intel_pstate: Implement VLP controller target P-state range estimation." for the rationale. Signed-off-by: Francisco Jere

[Intel-gfx] [PATCH 01/10] PM: QoS: Add CPU_RESPONSE_FREQUENCY global PM QoS limit.

2020-03-10 Thread Francisco Jerez
The purpose of this PM QoS limit is to give device drivers additional control over the latency/energy efficiency trade-off made by the PM subsystem (particularly the CPUFREQ governor). It allows device drivers to set a lower bound on the response latency of PM (defined as the time it takes from wa

[Intel-gfx] [PATCH 02/10] drm/i915: Adjust PM QoS response frequency based on GPU load.

2020-03-10 Thread Francisco Jerez
This allows CPUFREQ governors to realize when the system becomes non-CPU-bound due to GPU rendering activity, and cause them to respond more conservatively to the workload by limiting their response frequency: CPU energy usage will be reduced when there isn't a good chance for system performance to

[Intel-gfx] [PATCH 04/10] Revert "cpufreq: intel_pstate: Drop ->update_util from pstate_funcs"

2020-03-10 Thread Francisco Jerez
This reverts commit c4f3f70cacba2fa19545389a12d09b606d2ad1cf. A future commit will introduce a new update_util implementation, so the pstate_funcs table entry is going to be useful. Signed-off-by: Francisco Jerez --- drivers/cpufreq/intel_pstate.c | 17 + 1 file changed, 13 inse

[Intel-gfx] [PATCH 09/10] OPTIONAL: cpufreq: intel_pstate: Add tracing of VLP controller status.

2020-03-10 Thread Francisco Jerez
Signed-off-by: Francisco Jerez --- drivers/cpufreq/intel_pstate.c | 9 ++--- include/trace/events/power.h | 13 + 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index 050cc8f03c26..c4558a131660 100

[Intel-gfx] [PATCH 06/10] cpufreq: intel_pstate: Implement VLP controller target P-state range estimation.

2020-03-10 Thread Francisco Jerez
The function introduced here calculates a P-state range derived from the statistics computed in the previous patch which will be used to drive the HWP P-state range or (if HWP is not available) as basis for some additional kernel-side frequency selection mechanism which will choose a single P-state

[Intel-gfx] [PATCH 05/10] cpufreq: intel_pstate: Implement VLP controller statistics and status calculation.

2020-03-10 Thread Francisco Jerez
The goal of the helper code introduced here is to compute two informational data structures: struct vlp_input_stats aggregating various scheduling and PM statistics gathered in every call of the update_util() hook, and struct vlp_status_sample which contains status information derived from the form

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Adjust PM QoS response frequency based on GPU load.

2020-03-10 Thread Chris Wilson
Quoting Francisco Jerez (2020-03-10 21:41:55) > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > b/drivers/gpu/drm/i915/gt/intel_lrc.c > index b9b3f78f1324..a5d7a80b826d 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1577,6 +1577,11 @@ static

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Gen11 workarounds

2020-03-10 Thread Souza, Jose
On Tue, 2020-03-10 at 17:30 +, Patchwork wrote: > == Series Details == > > Series: Gen11 workarounds > URL : https://patchwork.freedesktop.org/series/74475/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_8106 -> Patchwork_16900 > ==

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: conversion to drm_device based logging macros (rev6)

2020-03-10 Thread Patchwork
== Series Details == Series: drm/i915/display: conversion to drm_device based logging macros (rev6) URL : https://patchwork.freedesktop.org/series/72760/ State : success == Summary == CI Bug Log - changes from CI_DRM_8106_full -> Patchwork_16901_full ===

Re: [Intel-gfx] [PULL] gvt-next

2020-03-10 Thread Rodrigo Vivi
On Tue, Mar 10, 2020 at 04:19:28PM +0800, Zhenyu Wang wrote: > > Hi, > > Here's more gvt change for -next. Mostly rebase and fix Chris's > cleanup on intel engine and dev_priv usage. And also one fix for CFL > after VFIO edid enabled in last gvt-next pull. pulled to dinq, Thanks, Rodrigo. > >

[Intel-gfx] [PATCH v6 2/2] drm/edid: Add function to parse EDID descriptors for monitor range

2020-03-10 Thread Manasi Navare
Adaptive Sync is a VESA feature so add a DRM core helper to parse the EDID's detailed descritors to obtain the adaptive sync monitor range. Store this info as part fo drm_display_info so it can be used across all drivers. This part of the code is stripped out of amdgpu's function amdgpu_dm_update_f

[Intel-gfx] [PATCH v6 1/2] drm/edid: Name the detailed monitor range flags

2020-03-10 Thread Manasi Navare
This patch adds defines for the detailed monitor range flags as per the EDID specification. v2: * Rename the flags with DRM_EDID_ (Jani N) Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Cc: Harry Wentland Cc: Clinton A Taylor Cc: Kazlauskas Nicholas Cc: Jani Nikula Signed-off-by: Manasi Nava

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Gen11 workarounds

2020-03-10 Thread Matt Roper
On Tue, Mar 10, 2020 at 03:28:01PM -0700, Souza, Jose wrote: > On Tue, 2020-03-10 at 17:30 +, Patchwork wrote: > > == Series Details == > > > > Series: Gen11 workarounds > > URL : https://patchwork.freedesktop.org/series/74475/ > > State : failure > > > > == Summary == > > > > CI Bug Log -

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Adjust PM QoS response frequency based on GPU load.

2020-03-10 Thread Francisco Jerez
Chris Wilson writes: > Quoting Francisco Jerez (2020-03-10 21:41:55) >> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c >> b/drivers/gpu/drm/i915/gt/intel_lrc.c >> index b9b3f78f1324..a5d7a80b826d 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c >> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Pull checking rps->pm_events under the irq_lock (rev2)

2020-03-10 Thread Patchwork
== Series Details == Series: drm/i915/gt: Pull checking rps->pm_events under the irq_lock (rev2) URL : https://patchwork.freedesktop.org/series/74510/ State : warning == Summary == $ dim checkpatch origin/drm-tip 76ddbcfdb7a0 drm/i915/gt: Pull checking rps->pm_events under the irq_lock -:7: WA

Re: [Intel-gfx] [PATCH v4 7/7] drm/i915/dp: Program vswing, pre-emphasis, test-pattern

2020-03-10 Thread Almahallawy, Khaled
Thank You Animesh. Tested using scope with small set of tests and automation run to completion. Started full DP PHY compliance (~160 tests) overnight. On Tue, 2020-03-10 at 21:07 +0530, Animesh Manna wrote: > This patch process phy compliance request by programming requested > vswing, pre-emphasi

Re: [Intel-gfx] [RFC] GPU-bound energy efficiency improvements for the intel_pstate driver (v2).

2020-03-10 Thread Pandruvada, Srinivas
On Tue, 2020-03-10 at 14:41 -0700, Francisco Jerez wrote: > [...] > Thanks in advance for any review feed-back and test reports. > > [PATCH 01/10] PM: QoS: Add CPU_RESPONSE_FREQUENCY global PM QoS > limit. > [PATCH 02/10] drm/i915: Adjust PM QoS response frequency based on GPU > load. > [PATCH

[Intel-gfx] linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

2020-03-10 Thread Stephen Rothwell
Hi all, Today's linux-next merge of the drm-intel tree got a conflict in: drivers/gpu/drm/i915/gvt/vgpu.c between commit: 04d6067f1f19 ("drm/i915/gvt: Fix unnecessary schedule timer when no vGPU exits") from the drm-intel-fixes tree and commit: 12d5861973c7 ("drm/i915/gvt: Make WARN* d

Re: [Intel-gfx] [PATCH 7/7] drm/i915/perf: add flushing ioctl

2020-03-10 Thread Dixit, Ashutosh
On Tue, 10 Mar 2020 13:44:30 -0700, Lionel Landwerlin wrote: > > On 09/03/2020 21:51, Umesh Nerlige Ramappa wrote: > > On Wed, Mar 04, 2020 at 09:56:28PM -0800, Dixit, Ashutosh wrote: > >> On Wed, 04 Mar 2020 00:52:34 -0800, Lionel Landwerlin wrote: > >>> > >>> On 04/03/2020 07:48, Dixit, Ashutosh

Re: [Intel-gfx] [PATCH v4] drm/i915: Init lspcon after HPD in intel_dp_detect()

2020-03-10 Thread Kai-Heng Feng
> On Feb 15, 2020, at 01:56, Kai-Heng Feng wrote: > > On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port > becomes useless and never responds to cable hotplugging: > [3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon > [3.031945] [drm:intel_ddi_init

Re: [Intel-gfx] [RFC] GPU-bound energy efficiency improvements for the intel_pstate driver (v2).

2020-03-10 Thread Francisco Jerez
"Pandruvada, Srinivas" writes: > On Tue, 2020-03-10 at 14:41 -0700, Francisco Jerez wrote: >> > > [...] > >> Thanks in advance for any review feed-back and test reports. >> >> [PATCH 01/10] PM: QoS: Add CPU_RESPONSE_FREQUENCY global PM QoS >> limit. >> [PATCH 02/10] drm/i915: Adjust PM QoS resp

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/mst: Hookup DRM DP MST late_register/early_unregister callbacks (rev3)

2020-03-10 Thread Patchwork
== Series Details == Series: drm/i915/mst: Hookup DRM DP MST late_register/early_unregister callbacks (rev3) URL : https://patchwork.freedesktop.org/series/74532/ State : failure == Summary == Applying: drm/i915/mst: Hookup DRM DP MST late_register/early_unregister callbacks Using index info

[Intel-gfx] ✗ Fi.CI.BUILD: failure for GPU-bound energy efficiency improvements for the intel_pstate driver (v2).

2020-03-10 Thread Patchwork
== Series Details == Series: GPU-bound energy efficiency improvements for the intel_pstate driver (v2). URL : https://patchwork.freedesktop.org/series/74540/ State : failure == Summary == Applying: PM: QoS: Add CPU_RESPONSE_FREQUENCY global PM QoS limit. error: sha1 information is lacking or

[Intel-gfx] [PATCH -next 026/491] INTEL GVT-g DRIVERS (Intel GPU Virtualization): Use fallthrough;

2020-03-10 Thread Joe Perches
Convert the various uses of fallthrough comments to fallthrough; Done via script Link: https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe.com/ Signed-off-by: Joe Perches --- drivers/gpu/drm/i915/gvt/handlers.c | 2 +- 1 file changed, 1 insertion(+), 1 dele

[Intel-gfx] [PATCH v8 02/12] drm/i915: Use 64-bit division macro

2020-03-10 Thread Guru Das Srinagesh
Since the PWM framework is switching struct pwm_state.duty_cycle's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend. Cc: Jani Nikula Cc: Joonas Lahtinen Cc: David Airlie Cc: Daniel Vetter Cc: Chris Wilson Cc: "Ville Syrjälä" Cc: intel-gfx@lis

[Intel-gfx] [PATCH -next 000/491] treewide: use fallthrough;

2020-03-10 Thread Joe Perches
es matched by all F: patterns in in each section. Done via the perl script below and the previously posted cvt_fallthrough.pl script. Link: https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe.com/ These patches are based on next-20200310 and are available in gi

[Intel-gfx] [PATCH v8 00/12] Convert PWM period and duty cycle to u64

2020-03-10 Thread Guru Das Srinagesh
Because period and duty cycle are defined in the PWM framework structs as ints with units of nanoseconds, the maximum time duration that can be set is limited to ~2.147 seconds. Consequently, applications desiring to set greater time periods via the PWM framework are not be able to do so - like, fo

[Intel-gfx] [PULL] gvt-fixes

2020-03-10 Thread Zhenyu Wang
Hi, Here's more gvt fixes for 5.6. Fix timer issue caused by idr destroy change and VBT size error. Thanks -- The following changes since commit b549c252b1292aea959cd9b83537fcb9384a6112: drm/i915/gvt: Fix orphan vgpu dmabuf_objs' lifetime (2020-02-25 16:14:20 +0800) are available in the Gi

[Intel-gfx] [PULL] gvt-next

2020-03-10 Thread Zhenyu Wang
Hi, Here's more gvt change for -next. Mostly rebase and fix Chris's cleanup on intel engine and dev_priv usage. And also one fix for CFL after VFIO edid enabled in last gvt-next pull. thanks -- The following changes since commit a8bb49b64c4f4284fb36169bdd9fc6efd62eb26a: drm/i915/gvt: Fix drm_

Re: [Intel-gfx] [RFC 01/12] drm/i915: Expose list of clients in sysfs

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 00:13, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 23:26:34) On 09/03/2020 21:34, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 18:31:18) +struct i915_drm_client * +i915_drm_client_add(struct i915_drm_clients *clients, struct task_struct *task) +{ + s

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-10 Thread Tvrtko Ursulin
On 09/03/2020 17:02, Mrozek, Michal wrote: But he asked whether it's possible for Media and OpenCL drivers to also disable mid-thread preemption through the INTERFACE_DESCRIPTOR_DATA, instead of from the >>kernel side, so we could try to experiment with it in the future. Interface Descripto

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaDisableGPGPUMidThreadPreemption

2020-03-10 Thread Mrozek, Michal
>>With "disable it completely" you mean disable preemption completely - go >>lower than thread-group in granularity? Yes, disable it completely. Michal ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/lis

[Intel-gfx] [PATCH 04/10] drm/i915/fifo_underrun: convert to drm_device based logging.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Convert various instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_fifo_underrun.c. This was done using the following coccinelle script: @@ identifier fn, T; @@ fn(...,struct drm_i915_private *T,...) { <+... (

[Intel-gfx] [PATCH 03/10] drm/i915/fbdev: convert to drm_device based logging.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Convert various instances of printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_fbdev.c. This also involves extracting the drm_i915_private device from various intel types. v2 by Jani: - fix the final one too Signed-off-by: Wa

[Intel-gfx] [PATCH 10/10] drm/i915/overlay: convert to drm_device based logging.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Convert various instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_overlay.c. This transformation was achieved using the following coccinelle script: @@ identifier fn, T; @@ fn(...,struct drm_i915_private *T,..

[Intel-gfx] [PATCH 09/10] drm/i915/lvds: convert to drm_device based logging macros.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Converts various instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_lvds.c. This transformation was done by the following coccinelle script that matches based on the existence of a drm_i915_private device: @@ id

[Intel-gfx] [PATCH 02/10] drm/i915/fbc: convert to drm_device based logging macros.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga This replaces the uses of the printk based drm logging macros with the struct drm_device based logging macros in i915/display/intel_fbc.c. This transformation was done using the following coccinelle semantic patch that matches based on the existence of a drm_i915_private devic

[Intel-gfx] [PATCH 05/10] drm/i915/gmbus: convert to drm_device based logging,

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Conversion instances of printk based drm logging macros to use the struct drm_device based logging macros in i915/display/intel_gmbus.c. This was done using the following coccinelle semantic patch that transforms based on the existence of an existing drm_i915_private device: @

[Intel-gfx] [PATCH 06/10] drm/i915/hdcp: convert to struct drm_device based logging.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Converts various instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_hdcp.c. This also involves extracting the drm_i915_private device from the intel_connector type for use in the macros. v2 by Jani: - rebase S

[Intel-gfx] [PATCH 08/10] drm/i915/lpe_audio: convert to drm_device based logging macros.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Convert various uses of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_lpe_audio.c. Note that this converts DRM_DEBUG to drm_dbg(). References: https://lists.freedesktop.org/archives/dri-devel/2020-January/253381.html

[Intel-gfx] [PATCH 07/10] drm/i915/hotplug: convert to drm_device based logging.

2020-03-10 Thread Jani Nikula
From: Wambui Karuga Converts various instances of the printk based drm logging macros to the struct drm_device based logging macros in i915/display/intel_hotplug.c. In some cases, this involves extracting the drm_i915_private pointer from the drm_device struct to be used in the logging macros. S

Re: [Intel-gfx] [PATCH] drm/i915/perf: Invalidate OA TLB on when closing perf stream

2020-03-10 Thread Lionel Landwerlin
On 09/03/2020 23:10, Umesh Nerlige Ramappa wrote: On running several back to back perf capture sessions involving closing and opening the perf stream, invalid OA reports are seen in the beginning of the OA buffer in some sessions. Fix this by invalidating OA TLB when the perf stream is closed or

[Intel-gfx] [PATCH] drm/i915/tgl: WaEnablePreemptionGranularityControlByUMD

2020-03-10 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Certain workloads need the ability to disable preemption completely so allow them to do that by whitelisting GEN8_CS_CHICKEN1. Signed-off-by: Tvrtko Ursulin Cc: Michal Mrozek Cc: Tony Ye Cc: Rafael Antognolli Cc: Jason Ekstrand --- We need confirmation and acks from all

[Intel-gfx] [PATCH] list: Prevent compiler reloads inside 'safe' list iteration

2020-03-10 Thread Chris Wilson
Instruct the compiler to read the next element in the list iteration once, and that it is not allowed to reload the value from the stale element later. This is important as during the course of the safe iteration, the stale element may be poisoned (unbeknownst to the compiler). This helps prevent

Re: [Intel-gfx] [PULL] gvt-fixes

2020-03-10 Thread Jani Nikula
On Tue, 10 Mar 2020, Zhenyu Wang wrote: > Hi, > > Here's more gvt fixes for 5.6. Fix timer issue caused by idr destroy > change and VBT size error. Pulled and pushed to drm-intel-fixes, thanks. BR, Jani. > > Thanks > -- > > The following changes since commit b549c252b1292aea959cd9b83537fcb9384

Re: [Intel-gfx] [PATCH] drm/i915/tgl: WaEnablePreemptionGranularityControlByUMD

2020-03-10 Thread Mrozek, Michal
>> We need confirmation and acks from all three userspace components here. >> Especially since my impression was some are for and some were against >> whitelisting this one. Acked-by: Michal Mrozek ___ Intel-gfx mailing list Intel-gfx@lists.freedeskto

Re: [Intel-gfx] [PATCH 03/17] drm/i915: Improve the start alignment of bonded pairs

2020-03-10 Thread Tvrtko Ursulin
On 06/03/2020 13:38, Chris Wilson wrote: Always wait on the start of the signaler request to reduce the problem of dequeueing the bonded pair too early -- we want both payloads to start at the same time, with no latency, and yet still allow others to make full use of the slack in the system. Th

Re: [Intel-gfx] [PATCH 04/17] drm/i915: Tweak scheduler's kick_submission()

2020-03-10 Thread Tvrtko Ursulin
On 06/03/2020 13:38, Chris Wilson wrote: Skip useless priority bumping on adding a new dependency, but otherwise prevent tasklet scheduling until we have completed all the potential rescheduling. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_scheduler.c | 7 ++- 1 file chan

Re: [Intel-gfx] [RFC 0/7] Asynchronous flip implementation for i915

2020-03-10 Thread B S, Karthik
> -Original Message- > From: Zanoni, Paulo R > Sent: Tuesday, March 10, 2020 5:35 AM > To: B S, Karthik ; intel-gfx@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com; Kulkarni, Vandita > ; Shankar, Uma > Subject: Re: [RFC 0/7] Asynchronous flip implementation for i915 > > Em se

[Intel-gfx] [PATCH] drm/i915: Defer semaphore priority bumping to a workqueue

2020-03-10 Thread Chris Wilson
Since the semaphore fence may be signaled from inside an interrupt handler from inside a request holding its request->lock, we cannot then enter into the engine->active.lock for processing the semaphore priority bump as we may traverse our call tree and end up on another held request. CPU 0: [ 224

Re: [Intel-gfx] [PATCH 06/17] drm/i915: Extend i915_request_await_active to use all timelines

2020-03-10 Thread Tvrtko Ursulin
On 06/03/2020 13:38, Chris Wilson wrote: Extend i915_request_await_active() to be able to asynchronously wait on all the tracked timelines simultaneously. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_active.c | 51 +++--- drivers/gpu/drm/i915/i915_activ

Re: [Intel-gfx] [PATCH 08/17] drm/i915/selftests: Add request throughput measurement to perf

2020-03-10 Thread Tvrtko Ursulin
On 06/03/2020 13:38, Chris Wilson wrote: Under ideal circumstances, the driver should be able to keep the GPU fully saturated with work. Measure how close to ideal we get under the harshest of conditions with no user payload. Signed-off-by: Chris Wilson --- .../drm/i915/selftests/i915_perf_

Re: [Intel-gfx] [PATCH] drm/i915: Defer semaphore priority bumping to a workqueue

2020-03-10 Thread Chris Wilson
Quoting Chris Wilson (2020-03-10 10:17:20) > Since the semaphore fence may be signaled from inside an interrupt > handler from inside a request holding its request->lock, we cannot then > enter into the engine->active.lock for processing the semaphore priority > bump as we may traverse our call tre

Re: [Intel-gfx] [RFC 1/7] drm/i915: Define flip done functions and enable IER

2020-03-10 Thread B S, Karthik
> -Original Message- > From: Zanoni, Paulo R > Sent: Tuesday, March 10, 2020 4:48 AM > To: B S, Karthik ; intel-gfx@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com; Kulkarni, Vandita > ; Shankar, Uma > Subject: Re: [RFC 1/7] drm/i915: Define flip done functions and enable IER >

Re: [Intel-gfx] [RFC 2/7] drm/i915: Add support for async flips in I915

2020-03-10 Thread B S, Karthik
> -Original Message- > From: Zanoni, Paulo R > Sent: Tuesday, March 10, 2020 4:48 AM > To: B S, Karthik ; intel-gfx@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com; Kulkarni, Vandita > ; Shankar, Uma > Subject: Re: [RFC 2/7] drm/i915: Add support for async flips in I915 > > Em

[Intel-gfx] [drm-intel:topic/core-for-CI 18/20] init/Kconfig:77: symbol BROKEN is selected by DRM_I915_DEBUG

2020-03-10 Thread kbuild test robot
tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI head: 72212a758bdd916331477e782bdad1fa3f625322 commit: 19f102d485b9f5e03677f73133d9922e2650686f [18/20] Revert "drm/i915: Don't select BROKEN" config: powerpc-randconfig-a001-20200310 compiler: powerpc-linux-

Re: [Intel-gfx] [PATCH 04/17] drm/i915: Tweak scheduler's kick_submission()

2020-03-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-10 10:07:33) > > On 06/03/2020 13:38, Chris Wilson wrote: > > Skip useless priority bumping on adding a new dependency, but otherwise > > prevent tasklet scheduling until we have completed all the potential > > rescheduling. > > > > Signed-off-by: Chris Wilson > >

[Intel-gfx] [drm-intel:topic/core-for-CI 18/20] arch/powerpc/platforms/embedded6xx/Kconfig:2: symbol EMBEDDED6xx depends on BROKEN_ON_SMP

2020-03-10 Thread kbuild test robot
tree: git://anongit.freedesktop.org/drm-intel topic/core-for-CI head: 72212a758bdd916331477e782bdad1fa3f625322 commit: 19f102d485b9f5e03677f73133d9922e2650686f [18/20] Revert "drm/i915: Don't select BROKEN" config: powerpc-defconfig compiler: powerpc64-linux-gcc (GCC) 9.2.0 reproduce:

Re: [Intel-gfx] [PATCH 08/17] drm/i915/selftests: Add request throughput measurement to perf

2020-03-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-10 10:38:21) > > On 06/03/2020 13:38, Chris Wilson wrote: > > +static int perf_many(void *arg) > > +{ > > + struct perf_parallel *p = arg; > > + struct intel_engine_cs *engine = p->engine; > > + struct intel_context *ce; > > + IGT_TIMEOUT(end_time);

Re: [Intel-gfx] [PATCH 07/17] drm/i915/perf: Schedule oa_config after modifying the contexts

2020-03-10 Thread Chris Wilson
Quoting Chris Wilson (2020-03-06 13:38:42) > static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream) > { > - struct i915_request *rq; > + struct i915_active *active; > + int err; > > - rq = stream->perf->ops.enable_metric_set(stream); > - if (IS_ER

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

2020-03-10 Thread Kai Vehmanen
Hey, On Mon, 9 Mar 2020, Takashi Iwai wrote: > On Fri, 06 Mar 2020 17:45:44 +0100, Kai Vehmanen wrote: >> unfortunately it seems this fix that was done is not holding up in wider >> testing. It now looks we need to enforce the constraint in one form or [...] >> So how about: We move the glk_for

Re: [Intel-gfx] [RFC 01/12] drm/i915: Expose list of clients in sysfs

2020-03-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-09 18:31:18) > +static int > +__i915_drm_client_register(struct i915_drm_client *client, > + struct task_struct *task) > +{ > + struct i915_drm_clients *clients = client->clients; > + struct device_attribute *attr; > + int r

Re: [Intel-gfx] [PATCH] list: Prevent compiler reloads inside 'safe' list iteration

2020-03-10 Thread David Laight
From: Chris Wilson > Sent: 10 March 2020 09:21 > Instruct the compiler to read the next element in the list iteration > once, and that it is not allowed to reload the value from the stale > element later. This is important as during the course of the safe > iteration, the stale element may be poiso

Re: [Intel-gfx] [PATCH 04/17] drm/i915: Tweak scheduler's kick_submission()

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 11:00, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-10 10:07:33) On 06/03/2020 13:38, Chris Wilson wrote: Skip useless priority bumping on adding a new dependency, but otherwise prevent tasklet scheduling until we have completed all the potential rescheduling. Signed-of

Re: [Intel-gfx] [PATCH] list: Prevent compiler reloads inside 'safe' list iteration

2020-03-10 Thread Chris Wilson
Quoting David Laight (2020-03-10 11:36:41) > From: Chris Wilson > > Sent: 10 March 2020 09:21 > > Instruct the compiler to read the next element in the list iteration > > once, and that it is not allowed to reload the value from the stale > > element later. This is important as during the course of

Re: [Intel-gfx] [PATCH 08/17] drm/i915/selftests: Add request throughput measurement to perf

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 11:09, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-10 10:38:21) On 06/03/2020 13:38, Chris Wilson wrote: +static int perf_many(void *arg) +{ + struct perf_parallel *p = arg; + struct intel_engine_cs *engine = p->engine; + struct intel_context *ce; + IGT_

[Intel-gfx] [CI] drm/i915: Tweak scheduler's kick_submission()

2020-03-10 Thread Chris Wilson
Skip useless priority bumping on adding a new dependency by making sure that we do update the priority if we would have rescheduled the active cotnext. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_scheduler.c | 3 ++- 1 file changed, 2 insertions(+), 1 d

Re: [Intel-gfx] [PATCH 07/17] drm/i915/perf: Schedule oa_config after modifying the contexts

2020-03-10 Thread Lionel Landwerlin
On 10/03/2020 13:17, Chris Wilson wrote: Quoting Chris Wilson (2020-03-06 13:38:42) static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream) { - struct i915_request *rq; + struct i915_active *active; + int err; - rq = stream->perf->ops.enable_metric

Re: [Intel-gfx] [RFC 01/12] drm/i915: Expose list of clients in sysfs

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 11:41, Chris Wilson wrote: Quoting Tvrtko Ursulin (2020-03-09 18:31:18) +static int +__i915_drm_client_register(struct i915_drm_client *client, + struct task_struct *task) +{ + struct i915_drm_clients *clients = client->clients; + struct devic

Re: [Intel-gfx] [PATCH 08/17] drm/i915/selftests: Add request throughput measurement to perf

2020-03-10 Thread Chris Wilson
Quoting Tvrtko Ursulin (2020-03-10 11:58:26) > > On 10/03/2020 11:09, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2020-03-10 10:38:21) > >> > >> On 06/03/2020 13:38, Chris Wilson wrote: > >>> + intel_engine_pm_get(engine); > >>> + > >>> + memset(&engines

Re: [Intel-gfx] [PATCH] drm/i915: Defer semaphore priority bumping to a workqueue

2020-03-10 Thread Tvrtko Ursulin
On 10/03/2020 10:17, Chris Wilson wrote: Since the semaphore fence may be signaled from inside an interrupt handler from inside a request holding its request->lock, we cannot then enter into the engine->active.lock for processing the semaphore priority bump as we may traverse our call tree and

Re: [Intel-gfx] [PATCH] list: Prevent compiler reloads inside 'safe' list iteration

2020-03-10 Thread David Laight
From: Chris Wilson > Sent: 10 March 2020 11:50 > > Quoting David Laight (2020-03-10 11:36:41) > > From: Chris Wilson > > > Sent: 10 March 2020 09:21 > > > Instruct the compiler to read the next element in the list iteration > > > once, and that it is not allowed to reload the value from the stale

Re: [Intel-gfx] [PATCH] list: Prevent compiler reloads inside 'safe' list iteration

2020-03-10 Thread Chris Wilson
Quoting David Laight (2020-03-10 12:23:34) > From: Chris Wilson > > Sent: 10 March 2020 11:50 > > > > Quoting David Laight (2020-03-10 11:36:41) > > > From: Chris Wilson > > > > Sent: 10 March 2020 09:21 > > > > Instruct the compiler to read the next element in the list iteration > > > > once, and

Re: [Intel-gfx] [RFC 4/7] drm/i915: Add checks specific to async flips

2020-03-10 Thread B S, Karthik
> -Original Message- > From: Zanoni, Paulo R > Sent: Tuesday, March 10, 2020 4:49 AM > To: B S, Karthik ; intel-gfx@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com; Kulkarni, Vandita > ; Shankar, Uma > Subject: Re: [RFC 4/7] drm/i915: Add checks specific to async flips > > Em s

Re: [Intel-gfx] [RFC 5/7] drm/i915: Add flip_done_handler definition

2020-03-10 Thread B S, Karthik
> -Original Message- > From: Zanoni, Paulo R > Sent: Tuesday, March 10, 2020 4:49 AM > To: B S, Karthik ; intel-gfx@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com; Kulkarni, Vandita > ; Shankar, Uma > Subject: Re: [RFC 5/7] drm/i915: Add flip_done_handler definition > > Em sex

[Intel-gfx] [PATCH] drm/i915/gt: Pull checking rps->pm_events under the irq_lock

2020-03-10 Thread Chris Wilson
Avoid angering kcsan by serialising the read of the pm_events with the write in rps_diable_interrupts. [ 6268.713419] BUG: KCSAN: data-race in intel_rps_park [i915] / rps_work [i915] [ 6268.713437] [ 6268.713449] write to 0x8881eda8efac of 4 bytes by task 1127 on cpu 3: [ 6268.713680] intel_r

[Intel-gfx] [PATCH v2 14/17] drm/i915: have *_debugfs_init() functions return void.

2020-03-10 Thread Wambui Karuga
Since commit 987d65d01356 (drm: debugfs: make drm_debugfs_create_files() never fail), drm_debugfs_create_files() never fails and should return void. Therefore, remove its use as the return value of debugfs_init() functions and have the functions return void. v2: convert intel_display_debugfs_regis

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