> -Original Message-
> From: Chris Wilson
> Sent: 23 February 2020 23:10
> To: intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Laxminarayan Bharadiya, Pankaj
> ; Nikula, Jani
>
> Subject: [PATCH] drm/i915/display: Fix inverted WARN_ON
>
> Restore the previous WARN_ON(cond) so tha
On Wed, Feb 19, 2020 at 11:20:40AM +0100, Daniel Vetter wrote:
> With this we can drop the final kfree from the release function.
>
> I also noticed that cirrus forgot to call drm_dev_fini().
>
> v2: Don't call kfree(cirrus) after we've handed overship of that to
> drm_device and the drmm_ stuff.
On Wed, Feb 19, 2020 at 11:20:58AM +0100, Daniel Vetter wrote:
> Small mistake that crept into
>
> commit 81da8c3b8d3df6f05b11300b7d17ccd1f3017fab
> Author: Gerd Hoffmann
> Date: Tue Feb 11 14:52:18 2020 +0100
>
> drm/bochs: add drm_driver.release callback
>
> where drm_atomic_helper_shut
On Wed, Feb 19, 2020 at 11:20:59AM +0100, Daniel Vetter wrote:
> Instead rely on the automatic clean, for which we just need to check
> that drm_mode_config_init succeeded. To avoid an inversion in the
> cleanup we also have to move the dev_private allocation over to
> drmm_kzalloc.
>
> Signed-off
On Wed, Feb 19, 2020 at 11:21:00AM +0100, Daniel Vetter wrote:
> We can even delete the drm_driver.release hook now!
>
> Signed-off-by: Daniel Vetter
> Cc: Dave Airlie
> Cc: Gerd Hoffmann
> Cc: Daniel Vetter
> Cc: "Noralf Trønnes"
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> Cc: virtualizat
On Wed, Feb 19, 2020 at 11:21:01AM +0100, Daniel Vetter wrote:
> With the drm_device lifetime fun cleaned up there's nothing in the way
> anymore to use devm_ for everything hw releated. Do it, and in the
> process, throw out the entire onion unwinding.
>
> Signed-off-by: Daniel Vetter
> Cc: Dave
> -Original Message-
> From: Intel-gfx On Behalf Of
> Laxminarayan Bharadiya, Pankaj
> Sent: 24 February 2020 13:39
> To: Chris Wilson ; Nikula, Jani
>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Fix inverted WARN_ON
>
>
>
> > -Origi
> -Original Message-
> From: Jani Nikula
> Sent: 24 February 2020 11:43
> To: Chris Wilson ; intel-gfx@lists.freedesktop.org
> Cc: Chris Wilson ; Laxminarayan Bharadiya, Pankaj
>
> Subject: Re: [PATCH] drm/i915/display: Fix inverted WARN_ON
>
> On Sun, 23 Feb 2020, Chris Wilson wrote
== Series Details ==
Series: drm/i915/display: Fix inverted WARN_ON (rev2)
URL : https://patchwork.freedesktop.org/series/73823/
State : failure
== Summary ==
Applying: drm/i915/display: Fix inverted WARN_ON
error: patch failed: drivers/gpu/drm/i915/display/intel_dp.c:1024
error: drivers/gpu/d
== Series Details ==
Series: drm/i915/dsb: Enable lmem for dsb (rev2)
URL : https://patchwork.freedesktop.org/series/72818/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fd559e8f5963 drm/i915/dsb: Enable lmem for dsb
-:6: WARNING:TYPO_SPELLING: 'memeory' may be misspelled - per
On 2020-02-21 15:56, Chris Wilson wrote:
> Since we check before and then after each debugfs entry, we do not need
> to check before each time as well. We will error out as soon as it does
> fail, at all other times we know the system to be idle.
>
> No impact on runtime for glk (which apparently
> -Original Message-
> From: Ville Syrjala
> Sent: Friday, February 21, 2020 9:13 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Navare, Manasi D ; Shankar, Uma
> ; Ville Syrjälä
> Subject: [PATCH] drm/i915: Correctly terminate connector iteration
>
> From: Ville Syrjälä
>
> One shou
> -Original Message-
> From: Patchwork
> Sent: Saturday, February 22, 2020 12:30 AM
> To: Shankar, Uma
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.IGT: failure for Adding YUV444 packed format support for
> skl+ (rev3)
>
> == Series Details ==
>
> Series: Adding YUV444 pa
On 2020-02-21 21:38, Chris Wilson wrote:
> The test throws a large number of objects at the GPU across many
> batches. It only serves to try and assess the scaling impact, without
> doing any conformance checking, nor analysing said impact of scaling.
> The only effective coverage it gives us is on
+Lakshmi
On 2020-02-24 11:20, Shankar, Uma wrote:
>
>
>> -Original Message-
>> From: Patchwork
>> Sent: Saturday, February 22, 2020 12:30 AM
>> To: Shankar, Uma
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: ✗ Fi.CI.IGT: failure for Adding YUV444 packed format support for
>> skl+
Quoting Martin Peres (2020-02-24 09:16:02)
> On 2020-02-21 15:56, Chris Wilson wrote:
> > Since we check before and then after each debugfs entry, we do not need
> > to check before each time as well. We will error out as soon as it does
> > fail, at all other times we know the system to be idle.
>
We need to be extremely careful inside i915_request_await_start() as it
needs to walk the list of requests in the foreign timeline with very
little protection. As we hold our own timeline mutex, we can not nest
inside the signaler's timeline mutex, so all that remains is our RCU
protection. However
Give the reset worker a kick before losing help when waiting for hang
recovery, as the CPU scheduler is a little unreliable.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 74 ++
1 file changed, 52 insertions(+), 22 deletions(-)
diff --git a/dri
No good reason why we must always use a static ringsize, so let
userspace select one during construction.
Link: https://github.com/intel/compute-runtime/pull/261
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Steve Carbonari
Reviewed-by: Janusz Krzysztofik
---
drivers/gpu/drm/i915/Makefi
Check that we can recover if the LRC is totally corrupted.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 135 +
1 file changed, 135 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c
b/drivers/gpu/drm/i915/gt/selftest_lrc.c
inde
If we do find ourselves with an idle barrier inside our active while
waiting, attempt to flush it by emitting a pulse using the kernel
context.
Signed-off-by: Chris Wilson
Cc: Steve Carbonari
---
drivers/gpu/drm/i915/i915_active.c | 42 ++
drivers/gpu/drm/i915/selftest
Record the LRC registers before/after a preemption event to ensure that
the first context sees nothing from the second client; at least in the
normal per-context register state.
References: https://gitlab.freedesktop.org/drm/intel/issues/1233
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/
To prevent the context from proceeding past the end of the request as we
unwind, we embed a semaphore into the footer of each request. (If the
context were to skip past the end of the request as we perform the
preemption, next time we reload the context it's RING_HEAD would be past
the RING_TAIL an
If we find ourselves waiting on a MI_SEMAPHORE_WAIT, either within the
user batch or in our own preamble, the engine raises a
GT_WAIT_ON_SEMAPHORE interrupt. We can unmask that interrupt and so
respond to a semaphore wait by yielding the timeslice, if we have
another context to yield to!
The only
Let userspace know if they can trust timeslicing by including it as part
of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
v2: Only declare timeslicing if we can safely preempt userspace.
Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
Signed-off-by: Chris Wilso
We only use sentinel requests for "preempt-to-idle" passes, so assert
that they are the only request in a new submission.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_l
Use the same engine_idle_release() routine for cleaning all old
ctx->engine[] state, closing any potential races with concurrent execbuf
submission.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1241
Signed-off-by: Chris Wilson
---
Reorder set-closed/engine_idle_release to avoid prematu
If a context is banned even before we submit our first request to it,
report the failure before we attempt to allocate any resources for the
context.
Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gt/intel_context.c | 5 +
1 file changed, 5 insertions(+)
dif
As setup takes a long time, the user may close the context during the
construction of the execbuf. In order to make sure we correctly track
all outstanding work with non-persistent contexts, we need to serialise
the submission with the context closure and mop up any leaks.
Signed-off-by: Chris Wil
Check the user's flags on the struct file before deciding whether or not
to stall before submitting a request. This allows us to reasonably
cheaply honour O_NONBLOCK without checking at more critical phases
during request submission.
Suggested-by: Joonas Lahtinen
Signed-off-by: Chris Wilson
Cc:
== Series Details ==
Series: drm/i915/dsb: Enable lmem for dsb (rev2)
URL : https://patchwork.freedesktop.org/series/72818/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7993 -> Patchwork_16681
Summary
---
**FAILURE*
On 2020.02.23 18:09:35 +0200, Jani Nikula wrote:
> On Thu, 20 Feb 2020, Pankaj Bharadiya
> wrote:
> > drm/i915/gvt: Make WARN* drm specific where drm_priv ptr is available
> > drm/i915/gvt: Make WARN* drm specific where vgpu ptr is available
>
> Thanks for the patches, pushed everything exce
Full-ppgtt on gen7 is proving to be highly unstable and not robust.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/694
Fixes: 3cd6e8860ecd ("drm/i915/gen7: Re-enable full-ppgtt for ivb & hsw")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Jani Nikula
Cc: Dave Ai
Restore the previous WARN_ON(cond) so that we don't complain about poor
old Cherryview.
Fixes: eb020ca3d43f ("drm/i915/display/dp: Make WARN* drm specific where
drm_device ptr is available")
Signed-off-by: Chris Wilson
Cc: Pankaj Bharadiya
Cc: Jani Nikula
---
drivers/gpu/drm/i915/display/inte
On Mon, 24 Feb 2020, Chris Wilson wrote:
> Restore the previous WARN_ON(cond) so that we don't complain about poor
> old Cherryview.
>
> Fixes: eb020ca3d43f ("drm/i915/display/dp: Make WARN* drm specific where
> drm_device ptr is available")
> Signed-off-by: Chris Wilson
> Cc: Pankaj Bharadiya
Quoting Jani Nikula (2020-02-24 10:58:03)
> On Mon, 24 Feb 2020, Chris Wilson wrote:
> > Restore the previous WARN_ON(cond) so that we don't complain about poor
> > old Cherryview.
> >
> > Fixes: eb020ca3d43f ("drm/i915/display/dp: Make WARN* drm specific where
> > drm_device ptr is available")
>
== Series Details ==
Series: series starting with [01/14] drm/i915/selftests: Verify LRC isolation
URL : https://patchwork.freedesktop.org/series/73840/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
748167061786 drm/i915/selftests: Verify LRC isolation
-:451: WARNING:MEMORY_BAR
On Mon, 24 Feb 2020, Zhenyu Wang wrote:
> On 2020.02.23 18:09:35 +0200, Jani Nikula wrote:
>> On Thu, 20 Feb 2020, Pankaj Bharadiya
>> wrote:
>> > drm/i915/gvt: Make WARN* drm specific where drm_priv ptr is available
>> > drm/i915/gvt: Make WARN* drm specific where vgpu ptr is available
>>
On 2020.02.24 13:11:05 +0200, Jani Nikula wrote:
> On Mon, 24 Feb 2020, Zhenyu Wang wrote:
> > On 2020.02.23 18:09:35 +0200, Jani Nikula wrote:
> >> On Thu, 20 Feb 2020, Pankaj Bharadiya
> >> wrote:
> >> > drm/i915/gvt: Make WARN* drm specific where drm_priv ptr is available
> >> > drm/i915/
We no longer need or use it as we subclass struct drm_device in our
struct drm_i915_private, and can always use to_i915() to get at
i915. Stop assigning the pointer to catch anyone trying to add new users
for ->dev_private.
Cc: Chris Wilson
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i9
== Series Details ==
Series: mmotm 2020-02-19-19-51 uploaded (gpu/drm/i915/ + HDRTEST)
URL : https://patchwork.freedesktop.org/series/73755/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7982_full -> Patchwork_16657_full
Su
== Series Details ==
Series: drm/i915: fix header test with GCOV
URL : https://patchwork.freedesktop.org/series/73757/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7982_full -> Patchwork_16658_full
Summary
---
**SUC
== Series Details ==
Series: drm/i915/selftests: Be a little more lenient for reset workers
URL : https://patchwork.freedesktop.org/series/73765/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7982_full -> Patchwork_16659_full
===
Split inte_modeset_init() to parts before and after irq install, to
facilitate further cleanup. The error paths are a mess, otherwise no
functional changes.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 17 +++
== Series Details ==
Series: drm/i915: Check that the vma hasn't been closed before we insert it
URL : https://patchwork.freedesktop.org/series/73768/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7982_full -> Patchwork_16660_full
==
On Fri, 21 Feb 2020, Randy Dunlap wrote:
> On 2/21/20 2:54 AM, Jani Nikula wrote:
>> $(CC) with $(CFLAGS_GCOV) assumes the output filename with .gcno suffix
>> appended is writable. This is not the case when the output filename is
>> /dev/null:
>>
>> HDRTEST drivers/gpu/drm/i915/display/intel_f
On Fri, 21 Feb 2020, Randy Dunlap wrote:
> On 2/21/20 9:49 PM, Masahiro Yamada wrote:
>> On Sat, Feb 22, 2020 at 2:25 PM Randy Dunlap wrote:
>>>
>>> On 2/21/20 8:53 PM, Masahiro Yamada wrote:
On Sat, Feb 22, 2020 at 1:43 PM Masahiro Yamada
wrote:
>
> Hi Jani,
>
> On Fr
It should not be assumed that a disabled display pipe will be
always last the pipe.
for_each_pipe() should iterate over I915_MAX_PIPES and check
for the disabled pipe and skip that pipe so that it should not
initialize the intel crtc for any disabled pipes.
Due to changes in for_each_pipe() macro,
Skip the transcoder whose pipe is disabled while
initializing transcoder error state in 3 non-contiguous
display pipe system.
v2:
- Don't skip EDP_TRANSCODER error state. [Ville]
- Use a helper has_transcoder(). [Ville]
v3:
- Removed DSI transcoder case from has_transcoder(),
and few other cosme
As a disabled pipe in pipe_mask is not having a valid intel crtc,
driver wrongly populates the possible_crtcs mask while initializing
the plane for a CRTC. Fixing up the plane possible_crtcs mask.
changes since RFC:
- Simplify the possible_crtcs initialization. [Ville]
v2:
- Removed the unnecessar
we can't have (pipe == crtc->index) assumption in
driver in order to support 3 non-contiguous
display pipe system.
FIXME: Remove the WARN_ON(drm_crtc_index(&crtc->base) != crtc->pipe)
when we will fix all such assumption.
changes since RFC:
- Added again removed (pipe == crtc->index) WARN_ON.
- P
This update is Rebased and fixes the review comment provided by
Ville.
Anshuman Gupta (7):
drm/i915: Iterate over pipes and skip the disabled one
drm/i915: Remove (pipe == crtc->index) assumption
drm/i915: Fix broken transcoder err state
drm/i915: Fix wrongly populated plane possible_crtc
intel_plane_fb_max_stride should return the max stride of
primary plane for first available pipe in intel device info
pipe_mask.
Similarly glk_force_audio_cdclk() should also use the first
available CRTC instead of pipe 'A' crtc to force the cdclk
changes.
changes since RFC:
- Introduced a helper
skl_ddb_allocation_overlaps() num_entries hass been passed as
INTEL_NUM_PIPES, it should be I915_MAX_PIPES.
v2:
- Rebased.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +++
1 file changed, 3 insertions(+),
Add a WARN_ON for a disabled pipe in pipe_mask at
intel_get_crtc_for_pipe() function.
v2:
- Use drm_WARN_ON instead of WARN_ON.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
1 file changed, 3 insertio
== Series Details ==
Series: dma-buf: Precheck for a valid dma_fence before acquiring the reference
URL : https://patchwork.freedesktop.org/series/73772/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7983_full -> Patchwork_16663_full
===
== Series Details ==
Series: Refactor Gen11+ SAGV support (rev2)
URL : https://patchwork.freedesktop.org/series/73703/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7983_full -> Patchwork_16662_full
Summary
---
**FAI
Pull the final atomic_dec of vm->open (marking the vm as closed)
underneath the same vm->mutex as used to close it. This is required to
correctly serialise with attempting to reuse the vma as the vm is closed
by a second thread.
References: 00de702c6c6f ("drm/i915: Check that the vma hasn't been c
On Fri, Feb 21, 2020 at 06:27:22PM +0100, Sam Ravnborg wrote:
> Hi Ville.
>
> On Wed, Feb 19, 2020 at 10:35:41PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Store the timings (apart from the clock) as u16. The uapi mode
> > struct already uses u16 for everything so using somethin
On Sat, Feb 22, 2020 at 01:32:40PM +0100, Sam Ravnborg wrote:
> Hi Ville.
>
> Nice patch - and diffstat looks good:
> > 63 files changed, 217 insertions(+), 392 deletions(-)
>
> There is an item in the Documentation/gpu/todo.rst that
> describes this.
> Could you drop this from todo.rst in this
== Series Details ==
Series: series starting with [01/14] drm/i915/selftests: Verify LRC isolation
URL : https://patchwork.freedesktop.org/series/73840/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7993 -> Patchwork_16682
On Fri, Feb 21, 2020 at 05:15:20PM +0100, Sam Ravnborg wrote:
> On Wed, Feb 19, 2020 at 10:35:43PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > gma500 needs 4 bits (to store a pixel multiplier) in the
> > mode->private_flags, i915 currently has three bits defined.
> > No one else u
== Series Details ==
Series: drm/i915/display: Fix inverted WARN_ON (rev3)
URL : https://patchwork.freedesktop.org/series/73823/
State : failure
== Summary ==
Applying: drm/i915/display: Fix inverted WARN_ON
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/display/in
== Series Details ==
Series: drm/i915: Correctly terminate connector iteration
URL : https://patchwork.freedesktop.org/series/73779/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7984_full -> Patchwork_1_full
Summary
--
== Series Details ==
Series: series starting with [1/7] dma-buf: add dynamic DMA-buf handling v15
(rev2)
URL : https://patchwork.freedesktop.org/series/73665/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7984_full -> Patchwork_16667_full
=
== Series Details ==
Series: series starting with [resend,1/2] drm/i915: panel: Use
intel_panel_compute_brightness() from pwm_setup_backlight()
URL : https://patchwork.freedesktop.org/series/73784/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7984_full -> Patchwork_16668_ful
On 19.02.2020 21:35, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Get rid of mode->vrefresh and just calculate it on demand. Saves
> a bit of space and avoids the cached value getting out of sync
> with reality.
>
> Mostly done with cocci, with the following manual fixups:
> - Remove the now emp
On Mon, 03 Feb 2020, Vandita Kulkarni wrote:
> Configure the transcoder to operate in TE GATE command mode
> and take TE events from GPIO.
> Also disable the periodic command mode, that GOP would have
> programmed.
>
> v2: Disable util pin (Jani)
>
> Signed-off-by: Vandita Kulkarni
> ---
> driv
== Series Details ==
Series: drm/i915/gtt: Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgtt
URL : https://patchwork.freedesktop.org/series/73842/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7996 -> Patchwork_16683
Su
We cannot assert the fence is not yet changed as the next thread may
change it prior to acquiring our lock.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_active.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active
== Series Details ==
Series: drm managed resources, v2
URL : https://patchwork.freedesktop.org/series/73794/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7984_full -> Patchwork_16670_full
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915: stop assigning drm->dev_private pointer
URL : https://patchwork.freedesktop.org/series/73848/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7996 -> Patchwork_16685
Summary
---
*
On 19/02/2020 19:30, Andi Shyti wrote:
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create the 'gt/' directory in sysfs and move the power management
related files.
The new interfaces are:
gt/gt_act_freq_mhz
gt/gt_boost_freq_mhz
gt/gt_cur_freq_mhz
== Series Details ==
Series: drm/i915/psr: Force PSR probe only after full initialization (rev7)
URL : https://patchwork.freedesktop.org/series/73436/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7984_full -> Patchwork_16671_full
==
On Mon, 03 Feb 2020, Vandita Kulkarni wrote:
> Transcoder timing calculation differ for command mode.
>
> v2: Use is_vid_mode, and use same I915_WRITE (Jani)
> v3: Adjust the calculations to reflect dsc compression ratio
> v4: Rearrange the vertical and horizontal timing calc, optimize
> local
On Mon, 03 Feb 2020, Vandita Kulkarni wrote:
> If the GOP has programmed periodic command mode,
> we need to disable that which would need a
> deconfigure and configure sequence.
>
> v2: Fix sparse error, pass only intel_dsi (Jani)
>
> Signed-off-by: Vandita Kulkarni
> Reviewed-by: Jani Nikula
>
We need to start passing memory latency as a
parameter when calculating plane wm levels,
as latency can get changed in different
circumstances(for example with or without SAGV).
So we need to be more flexible on that matter.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c
For future Gen12 SAGV implementation we need to
seemlessly alter wm levels calculated, depending
on whether we are allowed to enable SAGV or not.
So this accessor will give additional flexibility
to do that.
Currently this accessor is still simply working
as "pass-through" function. This will be
For Gen11+ platforms BSpec suggests disabling specific
QGV points separately, depending on bandwidth limitations
and current display configuration. Thus it required adding
a new PCode request for disabling QGV points and some
refactoring of already existing SAGV code.
Also had to refactor intel_can
Add correspondent helpers to be able to get old/new bandwidth
global state object.
v2: - Fixed typo in function call
v3: - Changed new functions naming to use convention proposed
by Jani Nikula, i.e intel_bw_* in intel_bw.c file.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915
We need a new PCode request commands and reply codes
to be added as a prepartion patch for QGV points
restricting for new SAGV support.
v2: - Extracted those changes into separate patch
(Ville Syrjälä)
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/i915_reg.h | 4
The reasoning behind this is such that current dependencies
in the code are rather implicit in a sense, we have to constantly
check a bunch of different bits like state->modeset,
state->active_pipe_changes, which sometimes can indicate counter
intuitive changes.
By introducing more fine grained st
According to BSpec 53998, we should try to
restrict qgv points, which can't provide
enough bandwidth for desired display configuration.
Currently we are just comparing against all of
those and take minimum(worst case).
v2: Fixed wrong PCode reply mask, removed hardcoded
values.
v3: Forbid si
Flip the switch and enable SAGV support
for Gen12 also.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 853fc9e9084d..fe2873af7f4b 100644
--- a/dr
Currently intel_can_enable_sagv function contains
a mix of workarounds for different platforms
some of them are not valid for gens >= 11 already,
so lets split it into separate functions.
v2:
- Rework watermark calculation algorithm to
attempt to calculate Level 0 watermark
with ad
Tidy up after a call to eb_parse() if a later bind fails.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execb
== Series Details ==
Series: drm/i915: Avoid recursing onto active vma from the shrinker
URL : https://patchwork.freedesktop.org/series/73799/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7984_full -> Patchwork_16672_full
On Fri, Feb 21, 2020 at 06:08:08PM -0800, José Roberto de Souza wrote:
> This workaround is only fixed in C0 stepping to extend it to B0 too.
>
> BSpec: 52890
> Cc: Radhakrishna Sripada
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/
As we disable the heartbeat, and prevent the engine parking, the switch
to kernel context is not automatic. Make it an explicit switch instead.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/s
On Fri, Feb 21, 2020 at 06:08:09PM -0800, José Roberto de Souza wrote:
> This workaround the CS not done issue on PIPE_CONTROL.
>
> BSpec: 52890
> BSpec: 46218
> Cc: Matt Roper
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++
> drivers/gpu/d
== Series Details ==
Series: Adding YUV444 packed format support for skl+ (rev3)
URL : https://patchwork.freedesktop.org/series/73020/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7966_full -> Patchwork_16632_full
Summary
On Fri, Feb 21, 2020 at 06:08:11PM -0800, José Roberto de Souza wrote:
> From: Matt Atwood
>
> Disable Push Constant buffer addition for TGL.
>
> v2: typos, add additional Wa reference
> v3: use REG_BIT macro, move to rcs_engine_wa_init, clean up commit
> message.
>
> Bspec: 52890
> Cc: Rafael
> > +void intel_gt_sysfs_register(struct intel_gt *gt)
> > +{
> > + struct kobject *parent = kobject_get(gt_get_parent_obj(gt));
> > + int ret;
> > +
> > + ret = kobject_init_and_add(>->sysfs_root,
> > + &sysfs_gt_ktype,
> > + parent,
== Series Details ==
Series: drm/i915/dsb: Pre allocate and late cleanup of cmd buffer (rev2)
URL : https://patchwork.freedesktop.org/series/73036/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16543_full
=
== Series Details ==
Series: drm/i915: split intel_modeset_init() to pre/post irq install
URL : https://patchwork.freedesktop.org/series/73849/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7997 -> Patchwork_16686
Summary
-
On Fri, Feb 21, 2020 at 06:08:13PM -0800, José Roberto de Souza wrote:
> Add note about the confliting information in BSpec about this WA.
>
> BSpec: 52890
> Signed-off-by: José Roberto de Souza
Acked-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +++---
> 1 file
On Fri, Feb 21, 2020 at 06:08:14PM -0800, José Roberto de Souza wrote:
> This issue workaround in Wa_1607063988 has the same fix as
> Wa_1607138336, so just adding a note in the code.
>
> Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_workar
On 24/02/2020 16:30, Andi Shyti wrote:
+void intel_gt_sysfs_register(struct intel_gt *gt)
+{
+ struct kobject *parent = kobject_get(gt_get_parent_obj(gt));
+ int ret;
+
+ ret = kobject_init_and_add(>->sysfs_root,
+ &sysfs_gt_ktype,
+
== Series Details ==
Series: Adding YUV444 packed format support for skl+ (rev3)
URL : https://patchwork.freedesktop.org/series/73020/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7966_full -> Patchwork_16632_full
Summary
On Fri, Feb 21, 2020 at 06:08:15PM -0800, José Roberto de Souza wrote:
> This Wa will also be needed by B0 stepping.
>
> BSpec: 52890
> Signed-off-by: José Roberto de Souza
Same question as patch #1 --- does the bspec's stepping for display
workarounds reflect the CPU+GT stepping or the display
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