[Intel-gfx] [PATCH v5 1/3] drm: Add CRTC background color property (v5)

Some display controllers can be programmed to present non-black colors for pixels not covered by any plane (or pixels covered by the transparent regions of higher planes). Compositors that want a UI with a solid color background can potentially save memory bandwidth by setting the CRTC background

[Intel-gfx] [PATCH v5 3/3] drm/i915: Add background color hardware readout and state check

We should support readout and verification of crtc background color as we do with other pipe state. Note that our hardware holds less bits of precision than the CRTC state allows, so we need to take care to only verify the most significant bits of the color after performing readout. At boot time

[Intel-gfx] [PATCH v5 2/3] drm/i915/gen9+: Add support for pipe background color (v5)

Gen9+ platforms allow CRTC's to be programmed with a background/canvas color below the programmable planes. Let's expose this for use by compositors. v2: - Split out bgcolor sanitization and programming of csc/gamma bits to a separate patch that we can land before the ABI changes are ready to

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for CRTC background color (rev6)

== Series Details == Series: CRTC background color (rev6) URL : https://patchwork.freedesktop.org/series/50834/ State : warning == Summary == $ dim checkpatch origin/drm-tip 8c549af67706 drm: Add CRTC background color property (v5) -:239: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'shift' - p

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for CRTC background color (rev6)

== Series Details == Series: CRTC background color (rev6) URL : https://patchwork.freedesktop.org/series/50834/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm: Add CRTC background color property (v5) Okay! Commit: drm/i915/gen9+: Add support for p

[Intel-gfx] ✓ Fi.CI.BAT: success for CRTC background color (rev6)

== Series Details == Series: CRTC background color (rev6) URL : https://patchwork.freedesktop.org/series/50834/ State : success == Summary == CI Bug Log - changes from CI_DRM_5521 -> Patchwork_12112 Summary --- **SUCCESS** No regr

[Intel-gfx] [PATCH v2 2/4] drm/dp_mst: Remove port validation in drm_dp_atomic_find_vcpi_slots()

Since we now have an easy way of refcounting drm_dp_mst_port structs and safely accessing their contents, there isn't any good reason to keep validating ports here. It doesn't prevent us from performing modesets on branch devices that have been removed either, and we already disallow enabling new d

[Intel-gfx] [PATCH v2 1/3] drm/i915: Move workaround infrastructure code up

From: Tvrtko Ursulin Top comment in intel_workarounds.c says common code should come first so lets respect that. Also, by moving the common code together opportunities to reduce duplication will become more obvious. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_workarounds.c | 7

[Intel-gfx] [PATCH v2 3/3] drm/i915/icl: restore WaEnableFloatBlendOptimization

Enables blend optimization for floating point RTs This restores the workaround that was reverted in c358514ba8da ("Revert "drm/i915/icl: WaEnableFloatBlendOptimization""). The revert was due to the register write seemingly not sticking, but the HW team has confirmed that this is because the regis

[Intel-gfx] [PATCH v2 0/3] restore WaEnableFloatBlendOptimization

This is the v2 of my patch after taking the feed from Chris. I have also included the HSDES per Mika's suggestion. I am attaching the two-patch series from Tvrtko as there is a dependency. Also to note that git couldn't apply Tvrtko's first patch due to a patch by Daniele that touched the same fi

[Intel-gfx] [PATCH v2 2/3] drm/i915: Save some lines of source code in workarounds

From: Tvrtko Ursulin No functional or code size change - just notice we can compact the source by re-using a single helper for adding workarounds. Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_workarounds.c | 32 ++-- 1 file

[Intel-gfx] [PATCH v2 0/4] drm/dp_mst: Fix regressions from new atomic VCPI helpers

This fixes the extra issues I discovered upstream after the introduction of my rework of the atomic VCPI helpers that occur during suspend/resume. This time around, we use a slightly different but much less complicated approach for fixing said issues. Cc: Daniel Vetter Lyude Paul (4): drm/dp_

Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Move workaround infrastructure code up

Quoting Talha Nassar (2019-02-01 01:08:42) > From: Tvrtko Ursulin > > Top comment in intel_workarounds.c says common code should come first so > lets respect that. Also, by moving the common code together opportunities > to reduce duplication will become more obvious. > > Signed-off-by: Tvrtko U

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for restore WaEnableFloatBlendOptimization

== Series Details == Series: restore WaEnableFloatBlendOptimization URL : https://patchwork.freedesktop.org/series/56071/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5ff28df401d6 drm/i915: Move workaround infrastructure code up 3724f3bfa9a7 drm/i915: Save some lines of source

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/icl: restore WaEnableFloatBlendOptimization

Quoting Talha Nassar (2019-02-01 01:08:44) > Enables blend optimization for floating point RTs > > This restores the workaround that was reverted in c358514ba8da > ("Revert "drm/i915/icl: WaEnableFloatBlendOptimization""). > > The revert was due to the register write seemingly not sticking, > but

[Intel-gfx] [PATCH] drm/i915: Allow normal clients to always preempt idle priority clients

When first enabling preemption, we hesitated from making it a free-for-all where every higher priority client would force a preempt-to-idle cycle and take over from all lower priority clients. We hesitated because we were uncertain just how well preemption would work in practice, whether the preemp

[Intel-gfx] ✓ Fi.CI.BAT: success for restore WaEnableFloatBlendOptimization

== Series Details == Series: restore WaEnableFloatBlendOptimization URL : https://patchwork.freedesktop.org/series/56071/ State : success == Summary == CI Bug Log - changes from CI_DRM_5521 -> Patchwork_12113 Summary --- **SUCCESS**

[Intel-gfx] [PATCH v3] drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug

Changing the i915_edp_psr_debug was enabling, disabling or switching PSR version by directly calling intel_psr_disable_locked() and intel_psr_enable_locked(), what is not the default PSR path that will be executed by real users. So lets force a fastset in the PSR CRTC to trigger a pipe update and

Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug

On Thu, 2019-01-31 at 10:34 +0100, Maarten Lankhorst wrote: > Op 31-01-2019 om 01:58 schreef José Roberto de Souza: > > Changing the i915_edp_psr_debug was enabling, disabling or > > switching > > PSR version by directly calling intel_psr_disable_locked() and > > intel_psr_enable_locked(), what is

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Allow normal clients to always preempt idle priority clients

== Series Details == Series: drm/i915: Allow normal clients to always preempt idle priority clients URL : https://patchwork.freedesktop.org/series/56072/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0f047db61683 drm/i915: Allow normal clients to always preempt idle priority c

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Allow normal clients to always preempt idle priority clients

== Series Details == Series: drm/i915: Allow normal clients to always preempt idle priority clients URL : https://patchwork.freedesktop.org/series/56072/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Allow normal clients to always preempt id

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs

== Series Details == Series: drm/i915/dp: Preliminary support for DP YCbCr4:2:0 outputs URL : https://patchwork.freedesktop.org/series/56059/ State : success == Summary == CI Bug Log - changes from CI_DRM_5520_full -> Patchwork_12111_full S

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Allow normal clients to always preempt idle priority clients

== Series Details == Series: drm/i915: Allow normal clients to always preempt idle priority clients URL : https://patchwork.freedesktop.org/series/56072/ State : success == Summary == CI Bug Log - changes from CI_DRM_5522 -> Patchwork_12114

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug (rev3)

== Series Details == Series: drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug (rev3) URL : https://patchwork.freedesktop.org/series/56013/ State : success == Summary == CI Bug Log - changes from CI_DRM_5522 -> Patchwork_12115

[Intel-gfx] ✓ Fi.CI.IGT: success for CRTC background color (rev6)

== Series Details == Series: CRTC background color (rev6) URL : https://patchwork.freedesktop.org/series/50834/ State : success == Summary == CI Bug Log - changes from CI_DRM_5521_full -> Patchwork_12112_full Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.IGT: success for restore WaEnableFloatBlendOptimization

== Series Details == Series: restore WaEnableFloatBlendOptimization URL : https://patchwork.freedesktop.org/series/56071/ State : success == Summary == CI Bug Log - changes from CI_DRM_5521_full -> Patchwork_12113_full Summary --- **

[Intel-gfx] [drm-tip:drm-tip 891/897] drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:160:9: warning: #pragma pack (pop) encountered without matching #pragma pack (push)

tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip head: 3f287cb6d4ae4689eb7c53e4c25f0fba3df16438 commit: 0a2fe4901d16d28bb8ad5f7032e9579f85e7e594 [891/897] Merge remote-tracking branch 'drm/drm-next' into drm-tip config: riscv-allmodconfig (attached as .config) compiler: riscv64-linux-gc

[Intel-gfx] [PATCH] drm/i915/cfl: Adding another PCI Device ID.

While cross checking PCI IDs from Intel Media SDK and kernel Dmitry noticed this gap. So we checked the spec and this new ID had been recently added. Reported-by: Dmitry Rogozhkin Cc: Dmitry Rogozhkin Cc: José Roberto de Souza Signed-off-by: Rodrigo Vivi --- include/drm/i915_pciids.h | 4

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/cfl: Adding another PCI Device ID.

== Series Details == Series: drm/i915/cfl: Adding another PCI Device ID. URL : https://patchwork.freedesktop.org/series/56075/ State : warning == Summary == $ dim checkpatch origin/drm-tip ab594f4fdd62 drm/i915/cfl: Adding another PCI Device ID. -:13: WARNING:BAD_SIGN_OFF: email address 'Dmitr

[Intel-gfx] [PULL] gvt-next

Hi, This should be last gvt-next pull for this round, which adds VFIO edid region support in GVT, VM manager can use this to specify custom EDID for VM, which can be used for e.g UI resize, etc. p.s, Next week will be chinese new year, so team will be offline then. Thanks. -- The following chan

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cfl: Adding another PCI Device ID.

== Series Details == Series: drm/i915/cfl: Adding another PCI Device ID. URL : https://patchwork.freedesktop.org/series/56075/ State : success == Summary == CI Bug Log - changes from CI_DRM_5522 -> Patchwork_12116 Summary --- **SUCCE

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Allow normal clients to always preempt idle priority clients

== Series Details == Series: drm/i915: Allow normal clients to always preempt idle priority clients URL : https://patchwork.freedesktop.org/series/56072/ State : success == Summary == CI Bug Log - changes from CI_DRM_5522_full -> Patchwork_12114_full ===

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug (rev3)

== Series Details == Series: drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug (rev3) URL : https://patchwork.freedesktop.org/series/56013/ State : success == Summary == CI Bug Log - changes from CI_DRM_5522_full -> Patchwork_12115_full ==

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