Re: [Intel-gfx] Backports for drm-intel-next-fixes

2018-10-03 Thread Joonas Lahtinen
Quoting Ville Syrjälä (2018-10-02 16:43:00) > On Tue, Oct 02, 2018 at 12:56:02PM +0300, Joonas Lahtinen wrote: > > The following patches with Fixes: do not cleanly apply > > to drm-intel-next-fixes: > > > > 47658556da85 ("drm/i915/dp: Do not grab crtc modeset lock in > > intel_dp_detect()") > >

[Intel-gfx] [PATCH 4/8] drm/i915/icl: Use helper functions to classify the ports

2018-10-03 Thread Mahesh Kumar
From: Vandita Kulkarni Use intel_port_is_tc and intel_port_is_combophy functions to replace the individual port checks from port C to F and port A to B respectively. Signed-off-by: Vandita Kulkarni Signed-off-by: Mahesh Kumar Cc: Lucas De Marchi Cc: Madhav Chauhan --- drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 5/8] drm/i915/icl: Refactor icl pll functions

2018-10-03 Thread Mahesh Kumar
From: Vandita Kulkarni This patch adds helper function for identifying whether the given PLL is combo PHY PLL or not. This helper function is used inside various ICL functions to make them scalable. Signed-off-by: Vandita Kulkarni Signed-off-by: Mahesh Kumar Cc: Madhav Chauhan Cc: Lucas De Ma

[Intel-gfx] [PATCH 0/8] Refactor and Add helper function for combophy/tc ports

2018-10-03 Thread Mahesh Kumar
This series refactor code and register definitions for combophy port registers. And also creates helper functions to identify combophy/tc ports. Lucas De Marchi (1): drm/i915/icl: Introduce new macros to get combophy registers Mahesh Kumar (4): drm/i915/icl: create function to identify combop

[Intel-gfx] [PATCH 3/8] drm/i915/icl: Refactor get_ddi_pll using helper func

2018-10-03 Thread Mahesh Kumar
From: Vandita Kulkarni Use the existing port-to-id helper function, to refactor hence making it scalable. Signed-off-by: Vandita Kulkarni Signed-off-by: Mahesh Kumar Cc: Lucas De Marchi Cc: Madhav Chauhan --- drivers/gpu/drm/i915/intel_display.c | 8 +--- drivers/gpu/drm/i915/intel_dpl

[Intel-gfx] [PATCH 2/8] drm/i915/icl: use combophy/TC helper functions during display detection

2018-10-03 Thread Mahesh Kumar
Instead of directly comparing HPD pins use intel_port_is_combophy/tc helper functions to distinguish between combophy/TC ports. Signed-off-by: Mahesh Kumar Cc: Manasi Navare --- drivers/gpu/drm/i915/intel_dp.c | 15 +-- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/

[Intel-gfx] [PATCH 8/8] drm/i915/icl: Fix DDI/TC port clk_off bits

2018-10-03 Thread Mahesh Kumar
DDI/TC clock-off bits are not equally distanced. TC1-3 bits are from offset 12 & TC4 is at offset 21. Create a function to choose correct clk-off bit. Signed-off-by: Mahesh Kumar Signed-off-by: Vandita Kulkarni Cc: Lucas De Marchi --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/

[Intel-gfx] [PATCH 1/8] drm/i915/icl: create function to identify combophy port

2018-10-03 Thread Mahesh Kumar
This patch creates a function/wrapper to check if port is combophy port instead of explicitly comparing ports. Signed-off-by: Mahesh Kumar Cc: Madhav Chauhan Cc: Manasi Navare --- drivers/gpu/drm/i915/intel_ddi.c | 15 --- drivers/gpu/drm/i915/intel_display.c | 11 +++

[Intel-gfx] [PATCH 6/8] drm/i915/icl: Combine all port/combophy macros at one place

2018-10-03 Thread Mahesh Kumar
This patch combines CNL/ICL specific port/combophy macros together at one location. This is prework for patches later in series where new macros to find port/combophy register will be introduced. Signed-off-by: Mahesh Kumar Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_reg.h | 13

[Intel-gfx] [PATCH 7/8] drm/i915/icl: Introduce new macros to get combophy registers

2018-10-03 Thread Mahesh Kumar
From: Lucas De Marchi combo-phy register instances are at same offset from base for each combo-phy port, i.e. Port A base offset: 0x16200 Port B base offset: 0x6C000 All the other addresses for both ports can be derived by calculating offset to these base addresses. PORT_CL_DW_OFFSET 0x0

Re: [Intel-gfx] [PATCH] drm/i915: Optionally disable automatic recovery after a GPU reset

2018-10-03 Thread Chris Wilson
Quoting Mika Kuoppala (2018-10-03 07:22:13) > Chris Wilson writes: > > > Some clients, such as mesa, may only emit minimal incremental batches > > that rely on the logical context state from previous batches. They know > > that recovery is impossible after a hang as their required GPU state is >

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Make intel_dp_detect() more clear to read

2018-10-03 Thread Jani Nikula
On Tue, 02 Oct 2018, José Roberto de Souza wrote: > Moving all the error handling to the end of the function and ealier > returning for connected MST ports make this function way more easy to > read. > No functional changed is intended here. Honestly, I disagree that the end result would be more

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Refactor and Add helper function for combophy/tc ports

2018-10-03 Thread Patchwork
== Series Details == Series: Refactor and Add helper function for combophy/tc ports URL : https://patchwork.freedesktop.org/series/50484/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4591313167c8 drm/i915/icl: create function to identify combophy port b95d617455a9 drm/i915/icl

Re: [Intel-gfx] [RFC 1/3] drm/i915/icl: Restructure ICL DPLL enable functionality

2018-10-03 Thread Jani Nikula
On Fri, 14 Sep 2018, Ville Syrjälä wrote: > On Fri, Sep 14, 2018 at 12:24:12PM +0530, Vandita Kulkarni wrote: >> From: Madhav Chauhan >> >> In Gen11, DPLL 0 and 1 are shared between DDI and DSI. >> Most of the steps for enabling DPLL are common across DDI >> and DSI. This patch makes icl_dpll_en

[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable ICL DSI PLL (rev2)

2018-10-03 Thread Patchwork
== Series Details == Series: Enable ICL DSI PLL (rev2) URL : https://patchwork.freedesktop.org/series/49683/ State : failure == Summary == CALLscripts/checksyscalls.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/intel_dpll_mgr.o drivers/gpu/drm/i

[Intel-gfx] ✗ Fi.CI.BAT: failure for Refactor and Add helper function for combophy/tc ports

2018-10-03 Thread Patchwork
== Series Details == Series: Refactor and Add helper function for combophy/tc ports URL : https://patchwork.freedesktop.org/series/50484/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4917 -> Patchwork_10334 = == Summary - FAILURE == Serious unknown changes coming with P

Re: [Intel-gfx] [RFC 1/3] drm/i915/icl: Restructure ICL DPLL enable functionality

2018-10-03 Thread Jani Nikula
On Wed, 03 Oct 2018, Jani Nikula wrote: > On Fri, 14 Sep 2018, Ville Syrjälä wrote: >> On Fri, Sep 14, 2018 at 12:24:12PM +0530, Vandita Kulkarni wrote: >>> From: Madhav Chauhan >>> >>> In Gen11, DPLL 0 and 1 are shared between DDI and DSI. >>> Most of the steps for enabling DPLL are common acr

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold task_struct ref for smoking kthread

2018-10-03 Thread Tvrtko Ursulin
On 02/10/2018 14:29, Chris Wilson wrote: As the kthread may terminate itself, the parent must hold a task_struct reference for it to call kthread_stop(). <4> [498.827675] stack segment: [#1] PREEMPT SMP PTI <4> [498.827683] CPU: 0 PID: 3872 Comm: drv_selftest Tainted: G U 4

Re: [Intel-gfx] [PATCH v10 1/2] drm: Introduce new DRM_FORMAT_XYUV

2018-10-03 Thread Alexandru-Cosmin Gheorghe
On Wed, Oct 03, 2018 at 06:39:00AM +, Lisovskiy, Stanislav wrote: > On Tue, 2018-10-02 at 15:28 +, Alexandru-Cosmin Gheorghe wrote: > > Hi, > > > > On Tue, Oct 02, 2018 at 02:15:42PM +0300, Stanislav Lisovskiy wrote: > > > v5: This is YUV444 packed format same as AYUV, but without alpha, >

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Hold task_struct ref for smoking kthread

2018-10-03 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-10-03 09:05:07) > > On 02/10/2018 14:29, Chris Wilson wrote: > > As the kthread may terminate itself, the parent must hold a task_struct > > reference for it to call kthread_stop(). > > > > <4> [498.827675] stack segment: [#1] PREEMPT SMP PTI > > <4> [498.827683]

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] lib/kms: Handle no connectors for igt_enable_connectors()

2018-10-03 Thread Maarten Lankhorst
Op 02-10-18 om 17:29 schreef Chris Wilson: > Take the device fd from the caller as to which card we should try and > enable connectors for (or else we may not enable the right connectors > for the test!) and fail gracefully if there is no kms support on the > device. > > Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH v3] drm/i915: Handle incomplete Z_FINISH for compressed error states

2018-10-03 Thread Chris Wilson
The final call to zlib_deflate(Z_FINISH) may require more output space to be allocated and so needs to re-invoked. Failure to do so in the current code leads to incomplete zlib streams (albeit intact due to the use of Z_SYNC_FLUSH) resulting in the occasional short object capture. v2: Check agains

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Rename full ppgtt configuration to be more generic (rev5)

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Rename full ppgtt configuration to be more generic (rev5) URL : https://patchwork.freedesktop.org/series/49021/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4915_full -> Patchwork_10327_full = == Summary - FAILURE == Serious unknow

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/10] drm: Do not call drm_dp_cec_set_edid() while registering DP connectors

2018-10-03 Thread Patchwork
== Series Details == Series: series starting with [01/10] drm: Do not call drm_dp_cec_set_edid() while registering DP connectors URL : https://patchwork.freedesktop.org/series/50456/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4915_full -> Patchwork_10328_full = == Summa

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Fix kernel doc for DRM_MODE_PROP_IMMUTABLE

2018-10-03 Thread Patchwork
== Series Details == Series: drm: Fix kernel doc for DRM_MODE_PROP_IMMUTABLE URL : https://patchwork.freedesktop.org/series/50462/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4915_full -> Patchwork_10330_full = == Summary - FAILURE == Serious unknown changes coming wit

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Use the correct crtc when sanitizing plane mapping

2018-10-03 Thread Daniel Vetter
On Tue, Oct 02, 2018 at 05:21:36PM +0300, Ville Syrjälä wrote: > On Tue, Oct 02, 2018 at 02:11:34PM +0200, Daniel Vetter wrote: > > On Mon, Oct 01, 2018 at 05:31:20PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > When we decide that a plane is attached to the wrong pipe we try

Re: [Intel-gfx] [PATCH v3] drm/i915: Handle incomplete Z_FINISH for compressed error states

2018-10-03 Thread Tvrtko Ursulin
On 03/10/2018 09:24, Chris Wilson wrote: The final call to zlib_deflate(Z_FINISH) may require more output space to be allocated and so needs to re-invoked. Failure to do so in the current code leads to incomplete zlib streams (albeit intact due to the use of Z_SYNC_FLUSH) resulting in the occasi

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Replace some open-coded i915_map_coherent_type() (rev3)

2018-10-03 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Replace some open-coded i915_map_coherent_type() (rev3) URL : https://patchwork.freedesktop.org/series/50408/ State : failure == Summary == Applying: drm/i915: Replace some open-coded i915_map_coherent_type() Using index info t

Re: [Intel-gfx] [PATCH 02/18] drm/atomic-helper: Unexport drm_atomic_helper_best_encoder

2018-10-03 Thread Daniel Vetter
On Tue, Oct 02, 2018 at 04:53:12PM +0300, Laurent Pinchart wrote: > Hi Daniel, > > Thank you for the patch. > > On Tuesday, 2 October 2018 16:35:10 EEST Daniel Vetter wrote: > > It's the default. The exported version was kinda a transition state, > > before we made this the default. > > > > To s

Re: [Intel-gfx] [PATCH 03/18] drm: Extract drm_atomic_state_helper.[hc]

2018-10-03 Thread Daniel Vetter
On Tue, Oct 02, 2018 at 06:40:52PM +0300, Ville Syrjälä wrote: > On Tue, Oct 02, 2018 at 03:35:11PM +0200, Daniel Vetter wrote: > > We already have a separate overview doc for this, makes sense to > > untangle it from the overall atomic helpers. > > > > v2: Rebase > > > > v3: Rebase more. > > Ho

Re: [Intel-gfx] [PATCH 07/18] drm/vmwgfx: Add FIXME comments for customer page_flip handlers

2018-10-03 Thread Daniel Vetter
On Tue, Oct 02, 2018 at 04:49:30PM +, Thomas Hellstrom wrote: > Hi, Daniel, > > On 10/02/2018 03:35 PM, Daniel Vetter wrote: > > The idea behind allowing drivers to override legacy ioctls (instead of > > using the generic implementations unconditionally) is to handle bugs > > in old driver-spe

[Intel-gfx] [PATCH 11/18] drm/msm: Use drm_atomic_helper_shutdown

2018-10-03 Thread Daniel Vetter
drm_plane_helper_disable is a non-atomic drivers only function, and will blow up (since no one passes the locking context it needs). Atomic drivers which want to quiescent their hw on unload should use drm_atomic_helper_shutdown() instead. Signed-off-by: Daniel Vetter Cc: Rob Clark Cc: Rajesh Y

[Intel-gfx] [PATCH 12/18] drm/sti: Use drm_atomic_helper_shutdown

2018-10-03 Thread Daniel Vetter
drm_plane_helper_disable is a non-atomic drivers only function, and will blow up (since no one passes the locking context it needs). Atomic drivers which want to quiescent their hw on unload should use drm_atomic_helper_shutdown() instead. The sti cleanup code seems supremely confused: - In the l

[Intel-gfx] [PATCH 13/18] drm/vc4: Use drm_atomic_helper_shutdown

2018-10-03 Thread Daniel Vetter
drm_plane_helper_disable is a non-atomic drivers only function, and will blow up (since no one passes the locking context it needs). Atomic drivers which want to quiescent their hw on unload should use drm_atomic_helper_shutdown() instead. v2: Rebase. Signed-off-by: Daniel Vetter Cc: Eric Anhol

[Intel-gfx] [PATCH 15/18] drm: Remove transitional helpers

2018-10-03 Thread Daniel Vetter
With armada the last bigger driver that realistically needed these to convert from legacy kms to atomic is converted. These helpers have been broken more often than not the past 2 years, and as this little patch series shows, tricked a bunch of people into using the wrong helpers for their function

[Intel-gfx] [PATCH 17/18] drm: Unexport drm_plane_helper_check_update

2018-10-03 Thread Daniel Vetter
It's for legacy drivers only (atomic ones should use drm_atomic_helper_check_plane_state() instead), and there's no users left except the one in the primary plane helpers. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_plane_helper.c | 49 +++--- include/drm/drm_pla

[Intel-gfx] [PATCH 16/18] drm/vmwgfx: Fix vmw_du_cursor_plane_atomic_check

2018-10-03 Thread Daniel Vetter
From: Thomas Hellstrom Use the correct helper and also return early on helper success rather than on helper failure. Also explicitly return 0 in the case of no fb. v2: Check for !fb after updating state->visible (Ville). Signed-off-by: Thomas Hellstrom (v1) Reported-by: Dan Carpenter Reporte

[Intel-gfx] [PATCH 14/18] drm/zte: Use drm_atomic_helper_shutdown

2018-10-03 Thread Daniel Vetter
drm_plane_helper_disable is a non-atomic drivers only function, and will blow up (since no one passes the locking context it needs). Atomic drivers which want to quiescent their hw on unload should use drm_atomic_helper_shutdown() instead. Signed-off-by: Daniel Vetter Cc: Shawn Guo --- drivers

[Intel-gfx] [PATCH 18/18] drm: Unexport primary plane helpers

2018-10-03 Thread Daniel Vetter
Well except the destroy helper, which isn't really a primary helper but generally useful, if mislabelled. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_plane_helper.c | 85 -- include/drm/drm_plane_helper.h | 10 2 files changed, 11 insertions(+), 84 d

Re: [Intel-gfx] [PATCH 08/18] drm/arcpgu: Drop transitional hooks

2018-10-03 Thread Daniel Vetter
On Tue, Oct 02, 2018 at 06:34:39PM +0300, Ville Syrjälä wrote: > On Tue, Oct 02, 2018 at 03:35:16PM +0200, Daniel Vetter wrote: > > These do absolutely nothing for atomic drivers. > > > > Signed-off-by: Daniel Vetter > > Cc: Alexey Brodkin > > --- > > drivers/gpu/drm/arc/arcpgu_crtc.c | 2 -- >

Re: [Intel-gfx] [PATCH] drm/i915: Fix the HDMI hot plug disconnection failure

2018-10-03 Thread Chris Chiu
It works on my problematic laptops. Verified on X530UN and X560UD. On Wed, Oct 3, 2018 at 1:23 PM Guang Bai wrote: > > On some platforms, slowly unplugging (wiggling) the HDMI cable makes > the kernel to believe the HDMI display still connected. This is because > the HDMI DDC lines are disconnecte

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix the HDMI hot plug disconnection failure

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Fix the HDMI hot plug disconnection failure URL : https://patchwork.freedesktop.org/series/50477/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4916_full -> Patchwork_10333_full = == Summary - FAILURE == Serious unknown changes comi

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix the HDMI hot plug disconnection failure

2018-10-03 Thread Martin Peres
On 03/10/2018 12:34, Patchwork wrote: > == Series Details == > > Series: drm/i915: Fix the HDMI hot plug disconnection failure > URL : https://patchwork.freedesktop.org/series/50477/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4916_full -> Patchwork_10333_full =

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Fix kernel doc for DRM_MODE_PROP_IMMUTABLE

2018-10-03 Thread Martin Peres
On 03/10/2018 11:38, Patchwork wrote: > == Series Details == > > Series: drm: Fix kernel doc for DRM_MODE_PROP_IMMUTABLE > URL : https://patchwork.freedesktop.org/series/50462/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4915_full -> Patchwork_10330_full = > >

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Rename full ppgtt configuration to be more generic (rev5)

2018-10-03 Thread Martin Peres
On 03/10/2018 11:29, Patchwork wrote: > == Series Details == > > Series: drm/i915: Rename full ppgtt configuration to be more generic (rev5) > URL : https://patchwork.freedesktop.org/series/49021/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4915_full -> Patchwo

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/selftests: Hold task_struct ref for smoking kthread

2018-10-03 Thread Martin Peres
On 03/10/2018 09:24, Patchwork wrote: > == Series Details == > > Series: drm/i915/selftests: Hold task_struct ref for smoking kthread > URL : https://patchwork.freedesktop.org/series/50441/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4915_full -> Patchwork_1032

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915: Replace some open-coded i915_map_coherent_type() (rev2)

2018-10-03 Thread Martin Peres
On 03/10/2018 05:47, Patchwork wrote: > == Series Details == > > Series: series starting with [1/4] drm/i915: Replace some open-coded > i915_map_coherent_type() (rev2) > URL : https://patchwork.freedesktop.org/series/50408/ > State : failure > > == Summary == > > = CI Bug Log - changes from C

[Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Engine discovery query allows userspace to enumerate engines, probe their configuration features, all without needing to maintain the internal PCI ID based database. A new query for the generic i915 query ioctl is added named DRM_I915_QUERY_ENGINE_INFO, together with accompa

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Engine discovery query (rev4)

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Engine discovery query (rev4) URL : https://patchwork.freedesktop.org/series/39958/ State : warning == Summary == $ dim checkpatch origin/drm-tip c387de8457ce drm/i915: Engine discovery query -:190: WARNING:TYPO_SPELLING: 'an user' may be misspelled - per

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Engine discovery query (rev4)

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Engine discovery query (rev4) URL : https://patchwork.freedesktop.org/series/39958/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4918 -> Patchwork_10337 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10337

[Intel-gfx] [PATCH i-g-t] igt/gem_exec_capture: Capture many, many objects

2018-10-03 Thread Chris Wilson
Exercise O(N^2) behaviour in reading the error state, and push it to the extreme. Reported-by: Jason Ekstrand Signed-off-by: Chris Wilson --- lib/meson.build | 1 + tests/gem_exec_capture.c | 351 ++- tests/intel-ci/blacklist.txt | 1 + 3 fil

Re: [Intel-gfx] [PATCH v3] drm/i915: Handle incomplete Z_FINISH for compressed error states

2018-10-03 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-10-03 10:04:04) > > On 03/10/2018 09:24, Chris Wilson wrote: > > The final call to zlib_deflate(Z_FINISH) may require more output > > space to be allocated and so needs to re-invoked. Failure to do so in > > the current code leads to incomplete zlib streams (albeit int

[Intel-gfx] [PATCH] drm/i915: Cache the error string

2018-10-03 Thread Chris Wilson
Currently, we convert the error state into a string every time we read from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to window the string and only capture the portion that is being read, but that means that we must always convert up to the window to find the start. For a very l

[Intel-gfx] [PATCH v2] drm/i915: Optionally disable automatic recovery after a GPU reset

2018-10-03 Thread Chris Wilson
Some clients, such as mesa, may only emit minimal incremental batches that rely on the logical context state from previous batches. They know that recovery is impossible after a hang as their required GPU state is lost, and that each in flight and subsequent batch will hang (resetting the context i

[Intel-gfx] [CI] drm/i915/execlists: Flush the CS events before unpinning

2018-10-03 Thread Chris Wilson
Inside the execlists submission tasklet, we often make the mistake of assuming that everything beneath the request is available for use. However, the submission and the request live on two separate timelines, and the request contents may be freed from an early retirement before we have had a chance

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

2018-10-03 Thread Chris Wilson
Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > index 6669af9d..ef88d1f9 100644 > --- a/src/sna/sna_render.h > +++ b/src/sna/sna_render.h > @@ -139,20 +139,25 @@ struct sna_composite_op { > > struct { >

Re: [Intel-gfx] [PATCH 1/4] drm: Add P010, P012, P016 format definitions and fourcc

2018-10-03 Thread Juha-Pekka Heikkila
Hi Alex, For my patches there seems limited interest to get them merged before IGT support these modes..I'm not holding my breath for this. https://lists.freedesktop.org/archives/intel-gfx/2018-September/174877.html /Juha-Pekka On 02.10.2018 18:00, Alexandru-Cosmin Gheorghe wrote: Hi, How

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Cache the error string (rev5)

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Cache the error string (rev5) URL : https://patchwork.freedesktop.org/series/46777/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: Cache the error string +drivers/gpu/drm/i915/i915_gpu_error.c:922:23: warning: expression using

Re: [Intel-gfx] [RFC 1/3] drm/i915/icl: Restructure ICL DPLL enable functionality

2018-10-03 Thread Jani Nikula
On Wed, 03 Oct 2018, Jani Nikula wrote: > On Wed, 03 Oct 2018, Jani Nikula wrote: >> On Fri, 14 Sep 2018, Ville Syrjälä wrote: >>> On Fri, Sep 14, 2018 at 12:24:12PM +0530, Vandita Kulkarni wrote: From: Madhav Chauhan In Gen11, DPLL 0 and 1 are shared between DDI and DSI. M

[Intel-gfx] [PATCH] drm/i915: Always try to reset the GPU on takeover

2018-10-03 Thread Chris Wilson
When we first introduced the reset to sanitize the GPU on taking over from the BIOS and before returning control to third parties (the BIOS!), we restricted it to only systems utilizing HW contexts as we were uncertain of how stable our reset mechanism truly was. We now have reasonable coverage acr

[Intel-gfx] [RFC 01/13] drm/i915/pmu: Fix enable count array size and bounds checking

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Enable count array is supposed to have one counter for each possible engine sampler. As such array sizing and bounds checking is not correct when more engine samplers are added. At the same time tidy the assert for readability and robustness. Signed-off-by: Tvrtko Ursulin

[Intel-gfx] [RFC 12/13] drm/i915: Expose per-engine client busyness

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Expose per-client and per-engine busyness under the previously added sysfs client root. The new files are one per-engine instance and located under the 'busy' directory. Each contains a monotonically increasing nano-second resolution times each client's jobs were executing

[Intel-gfx] [RFC 00/13] 21st century intel_gpu_top

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin A collection of patches which I have been sending before, sometimes together and sometimes separately, which enable intel_gpu_top to report queue depths (also translates as overall GPU load average) and per DRM client per engine busyness. This enables a fancy intel_gpu_top w

[Intel-gfx] [RFC 03/13] drm/i915: Keep a count of requests submitted from userspace

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a count of requests submitted from userspace and not yet runnable due unresolved dependencies. v2: Rename and move under the container struct. (Chris Wilson) v3: Rebase. v4: Move decrement site to the backend to shrink the window of double- accounting as much as pos

[Intel-gfx] [RFC 02/13] drm/i915: Keep a count of requests waiting for a slot on GPU

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Keep a per-engine number of runnable (waiting for GPU time) requests. We choose to mange the runnable counter at the backend level instead of at the request submit_notify callback. The latter would be more consolidated and less code, but it would require making the counter e

[Intel-gfx] [RFC 04/13] drm/i915/pmu: Add queued counter

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We add a PMU counter to expose the number of requests which have been submitted from userspace but are not yet runnable due dependencies and unsignaled fences. This is useful to analyze the overall load of the system. v2: * Rebase for name change and re-order. * Drop floa

[Intel-gfx] [RFC 05/13] drm/i915/pmu: Add runnable counter

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We add a PMU counter to expose the number of requests with resolved dependencies waiting for a slot on the GPU to run. This is useful to analyze the overall load of the system. v2: Don't limit to gen8+. v3: * Rebase for dynamic sysfs. * Drop currently executing requests.

[Intel-gfx] [RFC 08/13] drm/i915: Move intel_engine_context_in/out into intel_lrc.c

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Intel_lrc.c is the only caller and so to avoid some header file ordering issues in future patches move these two over there. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_lrc.c| 57 + drivers/gpu/drm/i915/intel_ringbuffer.h |

[Intel-gfx] [RFC 13/13] drm/i915: Add sysfs toggle to enable per-client engine stats

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin By default we are not collecting any per-engine and per-context statistcs. Add a new sysfs toggle to enable this facility: $ echo 1 >/sys/class/drm/card0/clients/enable_stats v2: Rebase. v3: sysfs_attr_init. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_dr

[Intel-gfx] [RFC 09/13] drm/i915: Track per-context engine busyness

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Some customers want to know how much of the GPU time are their clients using in order to make dynamic load balancing decisions. With the hooks already in place which track the overall engine busyness, we can extend that slightly to split that time between contexts. v2: Fix

[Intel-gfx] [RFC 10/13] drm/i915: Expose list of clients in sysfs

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Expose a list of clients with open file handles in sysfs. This will be a basis for a top-like utility showing per-client and per- engine GPU load. Currently we only expose each client's pid and name under opaque numbered directories in /sys/class/drm/card0/clients/. For in

[Intel-gfx] [RFC 07/13] drm/i915: Store engine backpointer in the intel_context

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin It will become useful in a later patch. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_context.c | 1 + drivers/gpu/drm/i915/i915_gem_context.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm

[Intel-gfx] [RFC 11/13] drm/i915: Update client name on context create

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Some clients have the DRM fd passed to them over a socket by the X server. Grab the real client and pid when they create their first context and update the exposed data for more useful enumeration. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [RFC 06/13] drm/i915/pmu: Add running counter

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin We add a PMU counter to expose the number of requests currently executing on the GPU. This is useful to analyze the overall load of the system. v2: * Rebase. * Drop floating point constant. (Chris Wilson) v3: * Change scale to 1024 for faster arithmetics. (Chris Wilson)

[Intel-gfx] [RFC i-g-t 3/6] intel-gpu-overlay: Show 1s, 30s and 15m GPU load

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Show total GPU loads in the window banner. Engine load is defined as total of runnable and running requests on an engine. Total, non-normalized, load is display. In other words if N engines are busy with exactly one request, the load will be shown as N. v2: * Different fl

[Intel-gfx] [RFC i-g-t 4/6] tests/perf_pmu: Add tests for engine queued/runnable/running stats

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Simple tests to check reported queue depths are correct. v2: * Improvements similar to ones from i915_query.c. v3: * Rebase for __igt_spin_batch_new. Signed-off-by: Tvrtko Ursulin --- tests/perf_pmu.c | 259 +++ 1 file change

[Intel-gfx] [RFC i-g-t 0/6] 21st century intel_gpu_top & Co.

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin IGT patches accompanying the similary named i915 series. Most notably to sketch an improved intel_gpu_top which now, like the real top, can show the per client engine utilisation: intel-gpu-top - load avg 3.30, 1.51, 0.08; 949/ 949 MHz;0% RC6; 14.66 Watts; 3605

[Intel-gfx] [RFC i-g-t 2/6] intel-gpu-overlay: Add engine queue stats

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Use new PMU engine queue stats (queued, runnable and running) and display them per engine. v2: * Compact per engine stats. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- overlay/gpu-top.c | 42 ++ overlay/gpu-top.h | 11 +

[Intel-gfx] [RFC i-g-t 5/6] intel-gpu-top: Add queue depths and load average

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin With the driver now exporting various request queue depths for each engine, we can display this information here. Both as raw counters, and by adding a load average like metrics composed from number of runnable and running requests in a given time period. 1s, 30s and 5m perio

[Intel-gfx] [RFC i-g-t 6/6] intel-gpu-top: Support for client stats

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- tools/intel_gpu_top.c | 360 -- 1 file changed, 351 insertions(+), 9 deletions(-) diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c index 8990ef17b771..02c5a7d77614 100644 --- a/tools/intel_

[Intel-gfx] [RFC i-g-t 1/6] include: DRM uAPI headers update

2018-10-03 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Signed-off-by: Tvrtko Ursulin --- include/drm-uapi/amdgpu_drm.h | 52 +++- include/drm-uapi/drm.h | 16 ++ include/drm-uapi/drm_fourcc.h | 215 ++ include/drm-uapi/drm_mode.h| 26 +- include/drm-uapi/etnaviv_drm.h | 6 + include/drm-uapi/exyno

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cache the error string (rev5)

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Cache the error string (rev5) URL : https://patchwork.freedesktop.org/series/46777/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4919 -> Patchwork_10338 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10338 ne

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

2018-10-03 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-10-03 10:58:55) > +static int > +query_engine_info(struct drm_i915_private *i915, > + struct drm_i915_query_item *query_item) > +{ > + for_each_engine(engine, i915, id) { > + struct drm_i915_engine_info info; > + > + if

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote: > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > > index 6669af9d..ef88d1f9 100644 > > --- a/src/sna/sna_render.h > > +++ b/src/sna/sna_render.h > > @@ -139,20 +139,25 @@

Re: [Intel-gfx] [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.

2018-10-03 Thread Chris Wilson
Quoting Ville Syrjälä (2018-10-03 13:28:30) > On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote: > > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53) > > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h > > > index 6669af9d..ef88d1f9 100644 > > > --- a/src/sna/sna_render.h > >

Re: [Intel-gfx] [RFC 00/13] 21st century intel_gpu_top

2018-10-03 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-10-03 13:03:53) > From: Tvrtko Ursulin > > A collection of patches which I have been sending before, sometimes together > and > sometimes separately, which enable intel_gpu_top to report queue depths (also > translates as overall GPU load average) and per DRM client

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

2018-10-03 Thread Chris Wilson
Quoting Chris Wilson (2018-10-03 13:28:09) > Quoting Tvrtko Ursulin (2018-10-03 10:58:55) > > +static int > > +query_engine_info(struct drm_i915_private *i915, > > + struct drm_i915_query_item *query_item) > > +{ > > + for_each_engine(engine, i915, id) { > > + st

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

2018-10-03 Thread Tvrtko Ursulin
On 03/10/2018 13:42, Chris Wilson wrote: Quoting Chris Wilson (2018-10-03 13:28:09) Quoting Tvrtko Ursulin (2018-10-03 10:58:55) +static int +query_engine_info(struct drm_i915_private *i915, + struct drm_i915_query_item *query_item) +{ + for_each_engine(engine, i915, id)

Re: [Intel-gfx] [PATCH v5] drm/i915: Engine discovery query

2018-10-03 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-10-03 13:51:58) > > On 03/10/2018 13:42, Chris Wilson wrote: > > Quoting Chris Wilson (2018-10-03 13:28:09) > >> Quoting Tvrtko Ursulin (2018-10-03 10:58:55) > >>> +static int > >>> +query_engine_info(struct drm_i915_private *i915, > >>> + struct drm_i9

Re: [Intel-gfx] [RFC 00/13] 21st century intel_gpu_top

2018-10-03 Thread Tvrtko Ursulin
On 03/10/2018 13:36, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-10-03 13:03:53) From: Tvrtko Ursulin A collection of patches which I have been sending before, sometimes together and sometimes separately, which enable intel_gpu_top to report queue depths (also translates as overall GPU l

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Optionally disable automatic recovery after a GPU reset (rev2)

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Optionally disable automatic recovery after a GPU reset (rev2) URL : https://patchwork.freedesktop.org/series/50458/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4919 -> Patchwork_10339 = == Summary - WARNING == Minor unknown chang

Re: [Intel-gfx] [PATCH 11/18] drm/msm: Use drm_atomic_helper_shutdown

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:16:44AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use drm_atomic_helper_shutd

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/5] igt/kms_getfb: Check the iface exists before use

2018-10-03 Thread Joonas Lahtinen
Quoting Antonio Argenziano (2018-10-02 23:27:46) > > > On 02/10/18 01:30, Joonas Lahtinen wrote: > > Quoting Antonio Argenziano (2018-10-01 22:53:46) > >> Fair enough. > >> > >> Acked-by: Antonio Argenziano > >> > >> for the series. > > > > Please, read the following chapters (they're applicabl

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/execlists: Flush the CS events before unpinning

2018-10-03 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Flush the CS events before unpinning URL : https://patchwork.freedesktop.org/series/50494/ State : warning == Summary == $ dim checkpatch origin/drm-tip f8924caa9ada drm/i915/execlists: Flush the CS events before unpinning -:16: WARNING:COMMIT_L

Re: [Intel-gfx] [PATCH 12/18] drm/sti: Use drm_atomic_helper_shutdown

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:17:26AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use drm_atomic_helper_shutd

Re: [Intel-gfx] [PATCH 13/18] drm/vc4: Use drm_atomic_helper_shutdown

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:18:22AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use drm_atomic_helper_shutd

Re: [Intel-gfx] [PATCH 14/18] drm/zte: Use drm_atomic_helper_shutdown

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:18:23AM +0200, Daniel Vetter wrote: > drm_plane_helper_disable is a non-atomic drivers only function, and > will blow up (since no one passes the locking context it needs). > > Atomic drivers which want to quiescent their hw on unload should > use drm_atomic_helper_shutd

Re: [Intel-gfx] [PATCH 15/18] drm: Remove transitional helpers

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:18:24AM +0200, Daniel Vetter wrote: > With armada the last bigger driver that realistically needed these to > convert from legacy kms to atomic is converted. These helpers have > been broken more often than not the past 2 years, and as this little > patch series shows, tr

Re: [Intel-gfx] [PATCH 16/18] drm/vmwgfx: Fix vmw_du_cursor_plane_atomic_check

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:18:25AM +0200, Daniel Vetter wrote: > From: Thomas Hellstrom > > Use the correct helper and also return early on helper > success rather than on helper failure. > > Also explicitly return 0 in the case of no fb. > > v2: Check for !fb after updating state->visible (Vil

Re: [Intel-gfx] [PATCH 18/18] drm: Unexport primary plane helpers

2018-10-03 Thread Ville Syrjälä
On Wed, Oct 03, 2018 at 11:18:27AM +0200, Daniel Vetter wrote: > Well except the destroy helper, which isn't really a primary helper > but generally useful, if mislabelled. > > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/drm_plane_helper.c | 85 -- > include/

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