Implements the DP adaptation specific HDCP2.2 functions.
These functions perform the DPCD read and write for communicating the
HDCP2.2 auth message back and forth.
v2:
wait for cp_irq is merged with this patch. Rebased.
v3:
wait_queue is used for wait for cp_irq [Chris Wilson]
v4:
Style fix
HDCP check link is invoked only on CP_IRQ detection, instead of all
short pulses.
v3:
No Changes.
v4:
Added sean in cc and collected the reviewed-by received.
v5:
No Change.
v6:
No Change.
v7:
No Change.
Signed-off-by: Ramalingam C
cc: Sean Paul
Reviewed-by: Uma Shankar
Reviewed-by:
Implements the HDMI adaptation specific HDCP2.2 operations.
Basically these are DDC read and write for authenticating through
HDCP2.2 messages.
v2:
Rebased.
v3:
No Changes.
v4:
No more special handling of Gmbus burst read for AKE_SEND_CERT.
Style fixed with few naming. [Uma]
%s/PARING/P
On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link
integrity check for the HDCP version that is enabled.
v2:
Rebased. Function name is changed.
v3:
No Changes.
v4:
No Changes.
v5:
No Changes.
v6:
%s/_in_force/_in_use [Sean Paul]
v7:
Rebased.
Signed-off-by: Ramalingam C
cc
GVTg implemented the read_shared_page functionality based on
hypervisor_read_gpa().
the shared_page_gpa was passed from guest driver through PVINFO
shared_page_gpa register.
Signed-off-by: Xiaolin Zhang
---
drivers/gpu/drm/i915/gvt/gvt.h | 4 +++-
drivers/gpu/drm/i915/gvt/handlers.c | 5
This patch extends g2v notification to notify host GVT-g of
ppgtt update from guest, including alloc_4lvl, clear_4lv4 and
insert_4lvl. It uses shared page to pass the additional params.
This patch also add one new pvmmio level to control ppgtt update.
Use PVMMIO_PPGTT_UPDATE to control this level
On DP connector init, intel_hdcp_init is passed with a flag for hdcp2.2
support based on the platform capability.
v2:
Rebased.
v3:
No Changes.
v4:
Collected the reviewed-by received.
v5:
No change.
v6:
No change.
v7:
No change.
Signed-off-by: Ramalingam C
Reviewed-by: Uma Shankar
--
Master irq register is accessed twice every irq handling, then trapped
to SOS very frequently. Optimize it by moving master irq register
to share page, writing don't need be trapped.
When need enable irq to let SOS inject irq timely, use another pvmmio
register to achieve this purpose. So avoid on
It is performance optimization to reduce mmio trap numbers from 4 to
1 durning ELSP porting writing (context submission).
When context subission, to cache elsp_data[4] values in
the shared page, the last elsp_data[0] port writing will be trapped
to gvt for real context submission.
Use PVMMIO_ELSP
implement enable_pvmmio PVINFO register handler in GVTg to
control different level pvmmio optimization within guest.
Signed-off-by: Xiaolin Zhang
---
drivers/gpu/drm/i915/gvt/handlers.c | 10 ++
drivers/gpu/drm/i915/gvt/vgpu.c | 6 ++
2 files changed, 16 insertions(+)
diff --gi
From: Tomas Winkler
Whitelist HDCP client for in kernel drm use
v2:
Rebased.
v3:
No changes.
v4:
No changes.
v5:
No changes.
v6:
No changes
v7:
No changes
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 16
1 file changed, 16 insertions(+)
diff --
Request ME FW to start the HDCP2.2 session for an intel port.
Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sends
to ME FW.
On Success, ME FW will start a HDCP2.2 session for the port and
provides the content for HDCP2.2 AKE_Init message.
v2:
Rebased.
v3:
cldev is add as a se
Defines the HDCP specific ME FW interfaces such as Request CMDs,
payload structure for CMDs and their response status codes.
This patch defines payload size(Excluding the Header)for each WIRED
HDCP2.2 CMDs.
v2:
Rebased.
v3:
Extra comments are removed.
v4:
%s/\/\*\*/\/\*
v5:
Extra lines ar
ME FW is contributes a vital role in HDCP2.2 authentication.
HDCP2.2 driver needs to communicate to ME FW for each step of the
HDCP2.2 authentication.
ME FW prepare and HDCP2.2 authentication parameters and encrypt them
as per spec. With such parameter Driver prepares HDCP2.2 auth messages
and co
Requests for verification for receiver certification and also the
preparation for next AKE auth message with km.
On Success ME FW validate the HDCP2.2 receivers certificate and do the
revocation check on the receiver ID. AKE_Stored_Km will be prepared if
the receiver is already paired, else AKE_No
From: Tomas Winkler
Export to_mei_cl_device macro, it is needed also in mei client drivers.
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus.c | 1 -
include/linux/mei_cl_bus.h | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/mei/bus.c b/drivers/misc/
On HDMI connector init, intel_hdcp_init is passed with a flag for hdcp2.2
support based on the platform capability.
v2:
Rebased.
v3:
No Changes.
v4:
Collected the reviewed-by received.
v5:
No change.
v6:
No change.
v7:
No change.
Signed-off-by: Ramalingam C
Reviewed-by: Uma Shankar
Requests for the verification of AKE_Send_H_prime.
ME will calculate the H and comparing it with received H_Prime.
The result will be returned as status.
Here AKE_Send_H_prime is a HDCP2.2 Authentication msg.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments an
Request to ME to verify the LPrime received from HDCP sink.
On Success, ME FW will verify the received Lprime by calculating and
comparing with L.
This represents the completion of Locality Check.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are r
This patch handles ppgtt update from g2v notification.
It read out ppgtt pte entries from guest pte tables page and
convert them to host pfns.
It creates local ppgtt tables and insert the content pages
into the local ppgtt tables directly, which does not track
the usage of guest page table and re
implemented context submission pvmmio optimizaiton with GVTg.
GVTg to read context submission data (elsp_data) from the shared_page
directly without trap cost to improve guest GPU peformrnace.
Signed-off-by: Xiaolin Zhang
---
drivers/gpu/drm/i915/gvt/handlers.c | 12
1 file changed
GVTg to check master irq status in the shared_page instead
of register.
Signed-off-by: Xiaolin Zhang
---
drivers/gpu/drm/i915/gvt/handlers.c | 4
drivers/gpu/drm/i915/gvt/interrupt.c | 17 +
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i9
Request ME to verify the downstream topology information received.
ME FW will validate the Repeaters receiver id list and
downstream topology.
On Success ME FW will provide the Least Significant
128bits of VPrime, which forms the repeater ack.
v2:
Rebased.
v3:
cldev is passed as first parame
Request to ME to configure a port as authenticated.
On Success, ME FW will mark the port as authenticated and provides
HDCP cipher with the encryption keys.
Enabling the Authentication can be requested once all stages of
HDCP2.2 authentication is completed by interacting with ME FW.
Only after t
Requests ME to start the second stage of HDCP2.2 authentication,
called Locality Check.
On Success, ME FW will provide LC_Init message to send to hdcp sink.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
v4:
%zd used for ssize_t
Request to ME to prepare the encrypted session key.
On Success, ME provides Encrypted session key. Function populates
the HDCP2.2 authentication msg SKE_Send_Eks.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and cast are removed [Tomas]
v4:
%zd for ssize_
Provides Pairing info to ME to store.
Pairing is a process to fast track the subsequent authentication
with the same HDCP sink.
On Success, received HDCP pairing info is stored in non-volatile
memory of ME.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant comments and
Request the ME to terminate the HDCP2.2 session for a port.
On Success, ME FW will mark the intel port as Deauthenticated and
terminate the wired HDCP2.2 Tx session started due to the cmd
WIRED_INITIATE_HDCP2_SESSION.
v2:
Rebased.
v3:
cldev is passed as first parameter [Tomas]
Redundant com
Request to ME to verify the M_Prime received from the HDCP sink.
ME FW will calculate the M and compare with M_prime received
as part of RepeaterAuth_Stream_Ready, which is HDCP2.2 protocol msg.
On successful completion of this stage, downstream propagation of
the stream management info is comple
Implement the required WA sequence for KBL to fix the
incorrect positioning of the window of oppurtunity and enc_en
signalling.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/intel_hdcp.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i91
Commits the content protection change of a connector,
without crtc modeset. This improves the user experience.
Originally proposed by Sean Paul at v3 of HDCP1.4 framework
https://patchwork.freedesktop.org/patch/191759/. For some
reason this was dropped, but needed for the proper functionality
of H
Mei hdcp driver is designed as component slave for the I915 component
master.
v2:
Rebased.
v3:
Notifier chain is adopted for cldev state update [Tomas]
v4:
Made static dummy functions as inline in mei_hdcp.h
API for polling client device status
IS_ENABLED used in header, for config statu
FOR TESTING PURPOSE ONLY.
Enabled the mei support for HDCP2.2. This patch is created to test
the interface between I915 and MEI_HDCP.
Signed-off-by: Ramalingam C
---
drivers/misc/mei/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
Quoting Xiaolin Zhang (2018-09-27 17:37:46)
> This int type module parameter is used to control the different
> level pvmmio feature for MMIO emulation in GVT.
>
> This parameter is default zero, no pvmmio feature enabled.
>
> Its permission type is 0400 which means user could only change its
> v
According to patch "drm/i915/aml: Introducing Amber Lake platform"
(e364672477a1). Add a new marco for AML ULX GT2 devices.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Jose Roberto de Souza
Signed-off-by: Lee, Shawn C
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
1 file changed, 2 insertions(+)
diff
Amber Lake used the same gen graphics as Kaby Lake. Kernel driver
should configure KBL's DDI buffer setting for AML ULX as well.
So far, driver would load DDI translation table that used for
KBL H/S platform and apply it on AML devices. But AML is belong to
ULX series. This change will lead driver
Quoting Xiaolin Zhang (2018-09-27 17:37:47)
> To enable pvmmio feature, we need to prepare one 4K shared page
> which will be accessed by both guest and backend i915 driver.
>
> guest i915 allocate one page memory and then the guest physical address is
> passed to backend i915 driver through PVINF
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/50257/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b7754818ea52 drm/i915/gvt: add module parameter enable_pvmmio
-:25: CHECK:MACRO_ARG_PRECEDENCE: Macro argumen
Quoting Xiaolin Zhang (2018-09-27 17:37:48)
> It is performance optimization to reduce mmio trap numbers from 4 to
> 1 durning ELSP porting writing (context submission).
>
> When context subission, to cache elsp_data[4] values in
> the shared page, the last elsp_data[0] port writing will be trappe
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/50257/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gvt: add module parameter enable_pvmmio
Okay!
Commit: drm/i915/gvt: get ready of memory for pvm
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/50257/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4890 -> Patchwork_10291 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patc
Use uniform prefixes for firmware path, version and size. Unify
alignments. Order macro groups as in the if ladder using them. Add
platform specific max firmware size macros for all platforms for clarity
in the if ladder. Place the max firmware size macros in the platform
specific macro groups.
No
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev9)
URL : https://patchwork.freedesktop.org/series/38254/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
77a2e81767f0 drm: hdcp2.2 authentication msg definitions
27a36da1e882 drm: HDMI and DP specific HDCP2.2 defines
c3
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev9)
URL : https://patchwork.freedesktop.org/series/38254/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm: hdcp2.2 authentication msg definitions
Okay!
Commit: drm: HDMI and DP specific HDCP2.2 defines
Okay!
Co
Quoting Chris Wilson (2018-09-26 23:12:22)
> Now that we are confident in providing full-ppgtt where supported,
> remove the ability to override the context isolation.
>
> v2: Remove faked aliasing-ppgtt for testing as it no longer is accepted.
> v3: s/USES/HAS/ to match usage and reject attempts
== Series Details ==
Series: drm/i915: Implement HDCP2.2 (rev9)
URL : https://patchwork.freedesktop.org/series/38254/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4891 -> Patchwork_10292 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10292 absol
== Series Details ==
Series: series starting with [1/2] drm/i915: Add new AML_ULX support list
URL : https://patchwork.freedesktop.org/series/50258/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
774790f183ba drm/i915: Add new AML_ULX support list
-:22: CHECK:MACRO_ARG_REUSE: Ma
== Series Details ==
Series: series starting with [1/2] drm/i915: Add new AML_ULX support list
URL : https://patchwork.freedesktop.org/series/50258/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Add new AML_ULX support list
-drivers/gpu/drm/i915/selftests/../i915_
When submitting chains to each engine, we can do so (mostly) in
parallel, so delegate submission to threads on a per-engine basis.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_lrc.c | 71 ++
1 file changed, 59 insertions(+), 12 deletions(-)
diff --git
Include a batch full of a page of arbitration points in order to provide
a window for inject_preempt_context() in the preemption smoketests.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_lrc.c | 104 +
1 file changed, 85 insertions(+), 19 deletions(-)
== Series Details ==
Series: series starting with [1/2] drm/i915: Add new AML_ULX support list
URL : https://patchwork.freedesktop.org/series/50258/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4891 -> Patchwork_10293 =
== Summary - SUCCESS ==
No regressions found.
E
Quoting Chris Wilson (2018-09-27 09:49:39)
> When submitting chains to each engine, we can do so (mostly) in
> parallel, so delegate submission to threads on a per-engine basis.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/selftests/intel_lrc.c | 71 ++
> 1 fi
Quoting Jani Nikula (2018-09-27 08:53:11)
> Use uniform prefixes for firmware path, version and size. Unify
> alignments. Order macro groups as in the if ladder using them. Add
> platform specific max firmware size macros for all platforms for clarity
> in the if ladder. Place the max firmware size
Quoting Joonas Lahtinen (2018-09-27 09:20:06)
> Quoting Chris Wilson (2018-09-26 23:12:22)
> > Now that we are confident in providing full-ppgtt where supported,
> > remove the ability to override the context isolation.
> >
> > v2: Remove faked aliasing-ppgtt for testing as it no longer is accepte
Hi Dave,
Thanks for the backmerge, we now have sun4i R40 support in again. Also
noteworthy for this week are 3 new additions to -misc.
This is very likely the last -misc-next pull for 4.20, but I'll see how things
go in the next ~week.
drm-misc-next-2018-09-27:
drm-misc-next for 4.20:
UAPI Ch
This is an RFC to get input on how people feel about moving towards
using and macros for register field
definitions and manipulation:
* BIT()
* GENMASK()
* FIELD_GET()
* FIELD_PREP()
I'm not necessarily proposing pushing the patches in this series;
they're more of a piece-by-piece transformatio
GENMASK() is much easier to get right and review against the specs than
hand rolled masks.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm
Slightly verbose, but does away with hand rolled shifts and provides
static checking that the values fit the mask.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu
BIT() is the preferred way of defining bits in the kernel.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 15 +++
drivers/gpu/drm/i915/intel_dp.c | 2 +-
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/dr
bitfield.h defines FIELD_GET() and FIELD_PREP() macros to access
bitfields using the mask alone, with no need for separate shift. Indeed,
the shift is redundant.
For the most part, FIELD_GET() is shorter than masking followed by
shift, and arguably has more clarity.
FIELD_PREP() can get more verb
On Thu, 27 Sep 2018, Jani Nikula wrote:
> I'm not necessarily proposing pushing the patches in this series;
> they're more of a piece-by-piece transformation of the power sequencer
> macros and code to use the above macros, to give an idea what the end
> result would look like.
And if it isn't cl
== Series Details ==
Series: drm/i915/csr: restructure CSR firmware definition macros
URL : https://patchwork.freedesktop.org/series/50262/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4892 -> Patchwork_10294 =
== Summary - SUCCESS ==
No regressions found.
External U
Hi Dave,
Here's the second and final set of changes for v4.20, tagged
last Friday before -rc5. We run it through the testing with
the CI farm machines and found no regressions.
Most user noticeable things are MythTV video stuttering
regression fix for older hardware, black screen fix on resume
wh
drm-misc-fixes-2018-09-27:
Single fix on top of v4.19-rc5.
drm-misc-fixes for v4.19-rc6:
- Don't leak fences in drm/syncobj
The following changes since commit 6bf4ca7fbc85d80446ac01c0d1d77db4d91a6d84:
Linux 4.19-rc5 (2018-09-23 19:15:18 +0200)
are available in the Git repository at:
git://a
On Wed, Sep 05, 2018 at 12:53:21PM +0300, Jani Nikula wrote:
> We've opted to use the maximum link rate and lane count for eDP panels,
> because typically the maximum supported configuration reported by the
> panel has matched the native resolution requirements of the panel, and
> optimizing the li
== Series Details ==
Series: i915 pvmmio to improve GVTg performance
URL : https://patchwork.freedesktop.org/series/50257/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4890_full -> Patchwork_10291_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues
On 26/09/2018 16:49, Patchwork wrote:
== Series Details ==
Series: drm/i915: Log HWS seqno consistently (rev2)
URL : https://patchwork.freedesktop.org/series/50193/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4883 -> Patchwork_10286 =
== Summary - WARNING ==
Minor
On 26/09/2018 10:11, Patchwork wrote:
== Series Details ==
Series: drm/i915: Trim partial view sg lists
URL : https://patchwork.freedesktop.org/series/50177/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4878 -> Patchwork_10281 =
== Summary - WARNING ==
Minor unknown
Quoting Jani Nikula (2018-09-27 10:40:23)
> Slightly verbose, but does away with hand rolled shifts and provides
> static checking that the values fit the mask.
>
> Signed-off-by: Jani Nikula
> ---
> @@ -4650,11 +4650,11 @@ enum {
> #define _PP_ON_DELAYS 0x61208
> #define PP_ON
== Series Details ==
Series: series starting with [1/2] drm/i915: Add new AML_ULX support list
URL : https://patchwork.freedesktop.org/series/50258/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4891_full -> Patchwork_10293_full =
== Summary - SUCCESS ==
No regressions f
Quoting Mika Kuoppala (2018-09-24 12:48:18)
> Requirement to clear forcewake bits is for all gen9. Update
> the wa comment to reflect that.
I trust the change in wa name is accurate.
> Signed-off-by: Mika Kuoppala
Reviewed-by: Chris Wilson
-Chris
___
Quoting Chris Wilson (2018-09-27 11:55:03)
> Quoting Joonas Lahtinen (2018-09-27 09:20:06)
> > Quoting Chris Wilson (2018-09-26 23:12:22)
> > > Now that we are confident in providing full-ppgtt where supported,
> > > remove the ability to override the context isolation.
> > >
> > > v2: Remove fake
Quoting Xiaolin Zhang (2018-09-27 19:37:46)
> This int type module parameter is used to control the different
> level pvmmio feature for MMIO emulation in GVT.
>
> This parameter is default zero, no pvmmio feature enabled.
>
> Its permission type is 0400 which means user could only change its
> v
Quoting Joonas Lahtinen (2018-09-27 11:57:53)
> Quoting Chris Wilson (2018-09-27 11:55:03)
> > Quoting Joonas Lahtinen (2018-09-27 09:20:06)
> > > Quoting Chris Wilson (2018-09-26 23:12:22)
> > > > Now that we are confident in providing full-ppgtt where supported,
> > > > remove the ability to over
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Split preemption smoke
test into threads
URL : https://patchwork.freedesktop.org/series/50264/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
295fda403839 drm/i915/selftests: Split preemption smoke test
Quoting Xiaolin Zhang (2018-09-27 19:37:45)
> To improve GVTg performance, it could reduce the mmio access trap
> numbers within guest driver in some certain scenarios since mmio
> access trap will introuduce vm exit/vm enter cost.
>
> the solution in this patch set is to setup a shared memory reg
Quoting Xiaolin Zhang (2018-09-27 19:37:48)
> It is performance optimization to reduce mmio trap numbers from 4 to
> 1 durning ELSP porting writing (context submission).
>
> When context subission, to cache elsp_data[4] values in
> the shared page, the last elsp_data[0] port writing will be trappe
On Thu, 27 Sep 2018 11:40:19 +0200, Jani Nikula
wrote:
This is an RFC to get input on how people feel about moving towards
using and macros for register field
definitions and manipulation:
* BIT()
* GENMASK()
BIT/GENMASK macros assumes 'unsigned long' type (64b) while our registers
(and
On Thu, 27 Sep 2018, Manasi Navare wrote:
> On Wed, Sep 05, 2018 at 12:53:21PM +0300, Jani Nikula wrote:
>> We've opted to use the maximum link rate and lane count for eDP panels,
>> because typically the maximum supported configuration reported by the
>> panel has matched the native resolution re
On Thu, 27 Sep 2018, Michal Wajdeczko wrote:
> On Thu, 27 Sep 2018 11:40:19 +0200, Jani Nikula
> wrote:
>
>> This is an RFC to get input on how people feel about moving towards
>> using and macros for register field
>> definitions and manipulation:
>>
>> * BIT()
>> * GENMASK()
>
> BIT/GENMASK
On 19/09/2018 20:55, Chris Wilson wrote:
Over the last few years, we have debated how to extend the user API to
support an increase in the number of engines, that may be sparse and
even be heterogeneous within a class (not all video decoders created
equal). We settled on using (class, instance)
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Split preemption smoke
test into threads
URL : https://patchwork.freedesktop.org/series/50264/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4894 -> Patchwork_10295 =
== Summary - SUCCESS ==
No
On 19/09/2018 20:55, Chris Wilson wrote:
In the next patch, we add another user that wants to check whether
requests can be merge into a single HW execution, and in the future we
want to add more conditions under which requests from the same context
cannot be merge. In preparation, extract out c
Chris Wilson writes:
> Quoting Mika Kuoppala (2018-09-24 12:48:18)
>> Requirement to clear forcewake bits is for all gen9. Update
>> the wa comment to reflect that.
>
> I trust the change in wa name is accurate.
It is consistent now and matches the databse, and it has
been changed all the way ba
== Series Details ==
Series: drm/i915/csr: restructure CSR firmware definition macros
URL : https://patchwork.freedesktop.org/series/50262/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4892_full -> Patchwork_10294_full =
== Summary - SUCCESS ==
No regressions found.
On Thu, 27 Sep 2018, Jani Nikula wrote:
> On Thu, 27 Sep 2018, Michal Wajdeczko wrote:
>> On Thu, 27 Sep 2018 11:40:19 +0200, Jani Nikula
>> wrote:
>>
>>> This is an RFC to get input on how people feel about moving towards
>>> using and macros for register field
>>> definitions and manipulat
On Thu, 27 Sep 2018, Chris Wilson wrote:
> Quoting Jani Nikula (2018-09-27 10:40:23)
>> Slightly verbose, but does away with hand rolled shifts and provides
>> static checking that the values fit the mask.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> @@ -4650,11 +4650,11 @@ enum {
>> #define _PP_
Quoting Chris Wilson (2018-09-27 13:35:47)
> Quoting Jani Nikula (2018-09-27 10:40:23)
> > Slightly verbose, but does away with hand rolled shifts and provides
> > static checking that the values fit the mask.
> >
> > Signed-off-by: Jani Nikula
> > ---
> > @@ -4650,11 +4650,11 @@ enum {
> > #def
On Wed, Sep 26, 2018 at 09:09:31PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2018-09-26 10:27:40)
> > On Tue, Sep 25, 2018 at 09:29:44PM +0100, Chris Wilson wrote:
> > > Quoting Ville Syrjala (2018-09-25 20:37:07)
> > > > From: Ville Syrjälä
> > > > + /* Catch potential overflows e
On Thu, 27 Sep 2018, Jani Nikula wrote:
> On Thu, 27 Sep 2018, Chris Wilson wrote:
>> Quoting Jani Nikula (2018-09-27 10:40:23)
>>> Slightly verbose, but does away with hand rolled shifts and provides
>>> static checking that the values fit the mask.
>>>
>>> Signed-off-by: Jani Nikula
>>> ---
>
Quoting Tvrtko Ursulin (2018-09-25 10:48:44)
>
> On 25/09/2018 09:32, Chris Wilson wrote:
> > As we are about to allow ourselves to slightly bump the user priority
> > into a few different sublevels, packthose internal priority lists
> > into the same i915_priolist to keep the rbtree compact and a
On Wed, Sep 26, 2018 at 05:16:40PM -0700, Matt Roper wrote:
> On Fri, Sep 21, 2018 at 07:39:42PM +0200, Maarten Lankhorst wrote:
> > The first 3 planes (primary, sprite 0 and 1) have a dedicated chroma
> > upsampler to upscale YUV420 to YUV444 and the scaler should only be
> > used for upscaling. B
On Tue, Sep 25, 2018 at 01:18:43PM -0700, Matt Roper wrote:
> On Tue, Sep 25, 2018 at 09:34:29PM +0300, Ville Syrjälä wrote:
> > On Tue, Sep 25, 2018 at 11:01:32AM -0700, Matt Roper wrote:
> > > On Mon, Sep 24, 2018 at 04:18:10PM +0300, Ville Syrjälä wrote:
> > > > It pretty much has to. The desig
On Thu, Sep 27, 2018 at 02:15:26PM +0300, Jani Nikula wrote:
> On Thu, 27 Sep 2018, Manasi Navare wrote:
> > On Wed, Sep 05, 2018 at 12:53:21PM +0300, Jani Nikula wrote:
> >> We've opted to use the maximum link rate and lane count for eDP panels,
> >> because typically the maximum supported config
On Thu, Sep 27, 2018 at 04:29:52AM +, Shankar, Uma wrote:
>
>
> >-Original Message-
> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> >Sent: Wednesday, September 26, 2018 3:12 PM
> >To: Maarten Lankhorst
> >Cc: Shankar, Uma ; Adam Jackson
> >; intel-gfx@lists.freedeskto
+ Tvrtko for adding the right media contacts
Quoting kedar.j.kara...@intel.com (2018-09-21 12:13:46)
> From: "Kedar J. Karanje"
>
> drm/i915: Context aware user agnostic EU/Slice/Sub-slice control within kernel
>
> Current GPU configuration code for i915 does not allow us to change
> EU/Slice/S
On Tue, Sep 25, 2018 at 03:02:21PM -0700, Paulo Zanoni wrote:
> Em Ter, 2018-09-25 às 15:02 +0300, Ville Syrjälä escreveu:
> > On Mon, Sep 24, 2018 at 05:19:11PM -0700, Paulo Zanoni wrote:
> > > Function intel_framebuffer_init() checks for the possibilities
> > > during
> > > framebuffer creation (
== Series Details ==
Series: drm/i915/registers: use standard bits.h and bitfield.h macros
URL : https://patchwork.freedesktop.org/series/50267/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i91
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: Split preemption smoke
test into threads
URL : https://patchwork.freedesktop.org/series/50264/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4894_full -> Patchwork_10295_full =
== Summary - SUCCESS
Hi Dave,
Linus posted the device_link revert after Maarten's PR earlier today, and I
figured it was worthwhile enough to warrant a second pull. So here is Maarten's
pull along with Linus' revert.
Apologies for the extra mail :/
drm-misc-fixes-2018-09-27-1:
- Revert adding device-link to panels
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