Quoting Lucas De Marchi (2018-08-28 02:00:27)
> On Sat, Aug 25, 2018 at 10:35:23AM +0100, Chris Wilson wrote:
> > Quoting Lucas De Marchi (2018-08-25 00:56:46)
> > > diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> > > index 4a34b7be..8a0e3e76 100644
> > > --- a/intel/intel_chipset.h
>
Hi Swati,
On Mon, Aug 27, 2018 at 12:17:45PM +0530, Swati Sharma wrote:
> From: Vidya Srinivas
>
> The following pixel formats are packed format that follows 4:2:2
> chroma sampling. For memory represenation each component is
> allocated 16 bits each. Thus each pixel occupies a DWORD.
>
> Y210:
PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
specification.
v2: Edited commit message, removed redundant whitespaces.
v3: Fixed fallthrough logic for the format switch cases.
v4: Yet again fixed fallthrough logic, to reuse code from other case
labels.
v5: Started to use
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/drm_fourcc.c | 1 +
include/uapi/drm/drm_fourcc.h | 1 +
2 files changed, 2 insertions(+)
di
Introduced new XYUV scan-in format for framebuffer and
added support for it to i915 driver.
Stanislav Lisovskiy (2):
drm: Introduce new DRM_FORMAT_XYUV
drm/i915: Adding YUV444 packed format(DRM_FORMAT_XYUV) support.
drivers/gpu/drm/drm_fourcc.c | 1 +
drivers/gpu/drm/i915/intel_displ
== Series Details ==
Series: Add XYUV format support (rev2)
URL : https://patchwork.freedesktop.org/series/48007/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
da0d36f3cafb drm: Introduce new DRM_FORMAT_XYUV
-:21: WARNING:LONG_LINE: line over 100 characters
#21: FILE: drivers/g
== Series Details ==
Series: Add XYUV format support (rev2)
URL : https://patchwork.freedesktop.org/series/48007/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4714 -> Patchwork_10026 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10026 absolutel
During power domains initialization we acquire power well references for
power wells in the INIT power domain. The rest of power wells - which
BIOS could have left enabled - we can only acquire references as needed
during display HW readout. Thus during initialization these latter power
wells can h
Quoting Imre Deak (2018-08-28 12:40:43)
> During power domains initialization we acquire power well references for
> power wells in the INIT power domain. The rest of power wells - which
> BIOS could have left enabled - we can only acquire references as needed
> during display HW readout. Thus duri
On Tue, Aug 28, 2018 at 12:45:31PM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2018-08-28 12:40:43)
> > During power domains initialization we acquire power well references for
> > power wells in the INIT power domain. The rest of power wells - which
> > BIOS could have left enabled - we can on
On 28.08.2018 13:53, Stanislav Lisovskiy wrote:
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/drm_fourcc.c | 1 +
include/uapi/drm/drm
On Tue, Aug 28, 2018 at 02:52:20PM +0300, Imre Deak wrote:
> On Tue, Aug 28, 2018 at 12:45:31PM +0100, Chris Wilson wrote:
> > Quoting Imre Deak (2018-08-28 12:40:43)
> > > During power domains initialization we acquire power well references for
> > > power wells in the INIT power domain. The rest
Quoting Imre Deak (2018-08-28 12:56:38)
> On Tue, Aug 28, 2018 at 02:52:20PM +0300, Imre Deak wrote:
> > On Tue, Aug 28, 2018 at 12:45:31PM +0100, Chris Wilson wrote:
> > > Quoting Imre Deak (2018-08-28 12:40:43)
> > > > During power domains initialization we acquire power well references for
> > >
Hi Chris,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.19-rc1 next-20180828]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
== Series Details ==
Series: drm/i915: Don't check power domains state in
intel_power_domains_init_hw()
URL : https://patchwork.freedesktop.org/series/48794/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4714 -> Patchwork_10027 =
== Summary - SUCCESS ==
No regressions f
During power domains initialization we acquire power well references for
power wells in the INIT power domain. The rest of power wells - which
BIOS could have left enabled - we can only acquire references as needed
during display HW readout and so must defer sanitization until then
(also implying t
Quoting Imre Deak (2018-08-28 13:22:31)
> During power domains initialization we acquire power well references for
> power wells in the INIT power domain. The rest of power wells - which
> BIOS could have left enabled - we can only acquire references as needed
> during display HW readout and so mus
On Mon, Aug 27, 2018 at 03:36:14PM -0700, Daniele Ceraolo Spurio wrote:
> We currently verify that all doorbells can be registerd with GuC and
> HW but don't check that all works as expected after a db ring.
>
> Do a nop ring of all doorbells to make sure we haven't misprogrammed
> any WQ or stage
On Mon, Aug 27, 2018 at 11:50:32AM -0700, Abhay Kumar wrote:
> From: Ville Syrjälä
>
> If we have only a single active pipe and the cdclk change only requires
> the cd2x divider to be updated bxt+ can do the update with forcing a full
> modeset on the pipe. Try to hook that up.
>
> Signed-off-by
On Mon, Aug 27, 2018 at 03:30:21PM -0700, Rodrigo Vivi wrote:
> Now that we have a generic caller let's simplify it and
> clean up the intel_psr.c code a bit.
>
> Cc: Dhinakaran Pandiyan
> Signed-off-by: Rodrigo Vivi
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_psr.c | 50 ++
On Mon, Aug 27, 2018 at 03:56:24PM -0700, Dhinakaran Pandiyan wrote:
> skl_plane_has_planar is hard to read, simplify the logic by checking for
> support in the order of platform, pipe and plane.
>
> No change in functionality intended.
> v2: Fix logic for primary plane (Ville)
>
> Cc: Ville Syrj
Quoting Katarzyna Dec (2018-08-28 13:34:16)
> On Mon, Aug 27, 2018 at 03:36:14PM -0700, Daniele Ceraolo Spurio wrote:
> > We currently verify that all doorbells can be registerd with GuC and
> > HW but don't check that all works as expected after a db ring.
> >
> > Do a nop ring of all doorbells t
On Mon, Aug 27, 2018 at 03:30:20PM -0700, Rodrigo Vivi wrote:
> No functional change. But let's get first i915 pointer
> directly from intel_dp so we can clean up a lot of code
> later.
Pretty sure I have a cocci script for this somewhere, just never posted
the results :)
But manual conversion wo
== Series Details ==
Series: drm/i915: Don't check power domains state in
intel_power_domains_init_hw() (rev2)
URL : https://patchwork.freedesktop.org/series/48794/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4714 -> Patchwork_10028 =
== Summary - SUCCESS ==
No regres
From: Ville Syrjälä
gcc is too smart for us and doesn't evaluate BUILD_BUG_ON()s in
unused static inlines. Collect them up in one static inline and
actually call it to make sure gcc sees it.
Cc: Chris Wilson
Suggested-by: Chris Wilson
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i91
== Series Details ==
Series: drm/i915: Fix gtt_view asserts
URL : https://patchwork.freedesktop.org/series/48801/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4ae3a32128f9 drm/i915: Fix gtt_view asserts
-:49: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#49: FILE:
Quoting Ville Syrjala (2018-08-28 14:37:23)
> From: Ville Syrjälä
>
> gcc is too smart for us and doesn't evaluate BUILD_BUG_ON()s in
> unused static inlines. Collect them up in one static inline and
> actually call it to make sure gcc sees it.
>
> Cc: Chris Wilson
> Suggested-by: Chris Wilson
== Series Details ==
Series: drm/i915: Don't check power domains state in
intel_power_domains_init_hw() (rev2)
URL : https://patchwork.freedesktop.org/series/48794/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4714_full -> Patchwork_10028_full =
== Summary - SUCCESS ==
On Tue, Aug 28, 2018 at 03:43:28PM +0300, Ville Syrjälä wrote:
> On Mon, Aug 27, 2018 at 03:30:20PM -0700, Rodrigo Vivi wrote:
> > No functional change. But let's get first i915 pointer
> > directly from intel_dp so we can clean up a lot of code
> > later.
>
> Pretty sure I have a cocci script for
Am 27.08.2018 um 10:43 schrieb Jani Nikula:
> On Sat, 25 Aug 2018, Lyude Paul wrote:
>> From: Jan-Marek Glogowski
>>
>> This re-applies the workaround for "some DP sinks, [which] are a
>> little nuts" from commit 1a36147bb939 ("drm/i915: Perform link
>> quality check unconditionally during long p
== Series Details ==
Series: drm/i915: Fix gtt_view asserts
URL : https://patchwork.freedesktop.org/series/48801/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4715 -> Patchwork_10029 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.fre
From: Ville Syrjälä
.check_plane() already gets the plane state, so we can dig out the plane
from there if needed. No need in passing it separately.
Cc: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 2 +-
drivers/gpu/drm/i915/intel_display
From: Ville Syrjälä
Y/Yf tiling can't be used with IF-ID. We already reject uncompressed
Y/Yf but we should also reject them when compressed.
Cc: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 4 +++-
1 file changed, 3 insertions(+), 1 delet
From: Jyoti
This patch resolves the DMC FW loading issue.
Earlier DMC FW package have only one DMC FW for one stepping. But as such
there is no such restriction from Package side.
For ICL icl_dmc_ver1_07.bin binary package has DMC FW for 2 steppings.
So while reading the dmc_offset from package h
Hi Lyude,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.19-rc1 next-20180828]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
== Series Details ==
Series: drm/i915: Fix gtt_view asserts
URL : https://patchwork.freedesktop.org/series/48801/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4715_full -> Patchwork_10029_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
He
On finishing the reset, the intention is to restart the GPU before we
relinquish the forcewake taken to handle the reset - the goal being the
GPU reloads a context before it is allowed to sleep. For this purpose,
we used tasklet_flush() which although it accomplished the goal of
restarting the GPU,
On Tue, Aug 28, 2018 at 10:44:56AM -0400, Jyoti Yadav wrote:
> From: Jyoti
>
> This patch resolves the DMC FW loading issue.
> Earlier DMC FW package have only one DMC FW for one stepping. But as such
> there is no such restriction from Package side.
> For ICL icl_dmc_ver1_07.bin binary package h
From: Ville Syrjälä
Copy the 38.4 vs. 19.2 MHz ref clock exception from the dpll
mgr into the clock readout function as well.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107722
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_ddi.c | 7 +++
1 file changed, 7 insertion
Hi,
On Tue, Aug 28, 2018 at 7:57 PM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> Y/Yf tiling can't be used with IF-ID. We already reject uncompressed
> Y/Yf but we should also reject them when compressed.
>
> Cc: José Roberto de Souza
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/
== Series Details ==
Series: series starting with [1/2] drm/i915: Don't pass plane to .check_plane()
URL : https://patchwork.freedesktop.org/series/48802/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4717 -> Patchwork_10030 =
== Summary - SUCCESS ==
No regressions found
On Tue, Aug 28, 2018 at 09:38:59AM +0100, Chris Wilson wrote:
> Quoting Lucas De Marchi (2018-08-28 02:00:27)
> > On Sat, Aug 25, 2018 at 10:35:23AM +0100, Chris Wilson wrote:
> > > Quoting Lucas De Marchi (2018-08-25 00:56:46)
> > > > diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> >
@@ -465,15 +468,19 @@ static void guc_wq_item_append(struct
intel_guc_client *client,
/* WQ starts from the page after doorbell / process_desc */
wqi = client->vaddr + wq_off + GUC_DB_SIZE;
- /* Now fill in the 4-word work queue item */
- wqi->header = WQ_TYPE_INORDER |
-
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 1a0f2a39cef9..8382d591c784 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -49,6 +49,7 @@
#define WQ_TYPE_BATCH_BUF (0x1 << WQ_TYPE_
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
URL : https://patchwork.freedesktop.org/series/48803/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
be9cb4d59307 drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
-:10: WARNING:COMMIT_LOG_LON
On Tue, 2018-08-28 at 17:27 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> .check_plane() already gets the plane state, so we can dig out the
> plane
> from there if needed. No need in passing it separately.
>
Reviewed-by: José Roberto de Souza
> Cc: José Roberto de Souza
> Signed-off
On Tue, 2018-08-28 at 17:27 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Y/Yf tiling can't be used with IF-ID. We already reject uncompressed
> Y/Yf but we should also reject them when compressed.
>
Reviewed-by: José Roberto de Souza
> Cc: José Roberto de Souza
> Signed-off-by: Vill
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
URL : https://patchwork.freedesktop.org/series/48803/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718 -> Patchwork_10031 =
== Summary - SUCCESS ==
No regressions found.
External URL:
From: Jyoti
This patch resolves the DMC FW loading issue.
Earlier DMC FW package have only one DMC FW for one stepping. But as such
there is no such restriction from Package side.
For ICL icl_dmc_ver1_07.bin binary package has DMC FW for 2 steppings.
So while reading the dmc_offset from package h
Hi,
I have a Lenovo T470 notebook with a KBL (GT2) CPU connected to a docking
station with two IPS monitors connected.
According to xrandr the primary laptop screen is connected to eDP-1 and the
monitors are connected to DP-2-1 and DP-2-2.
This setup worked fine until kernel 4.19-rc1. After boo
== Series Details ==
Series: drm/i915/execlists: Flush tasklet directly from reset-finish
URL : https://patchwork.freedesktop.org/series/48804/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718 -> Patchwork_10032 =
== Summary - SUCCESS ==
No regressions found.
Extern
None of you never noticed I didn't send this patch from my tree that I
found helped byt full-ppgtt. I can't believe none of you are psychic.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo
During stress testing of full-ppgtt (on Baytrail at least), we found
that the invalidation around a context/mm switch was insufficient (writes
would go astray). Adding a second MI_FLUSH_DW barrier prevents this, but
it is unclear as to whether this is merely a delaying tactic or if it is
truly seri
This is the next version of my patch series for teaching DRM how to
automatically create debugfs nodes for drivers with MST topologies. This
was originally intended just for nouveau, but has since been expanded to
all DRM drivers.
Changes since previous version:
- Fix documentation error that got
There's no actual reason we pass the connector ID instead of a pointer
to the connector itself, and we're going to need the entire connector
(but only temporarily) in order to name MST debugfs folders properly
since connector IDs can't be looked up until the driver has been
registered with userspac
Now that DRM can create these debugfs nodes automatically; this isn't
needed.
Signed-off-by: Lyude Paul
Cc: Maarten Lankhorst
Cc: Daniel Stone
---
drivers/gpu/drm/i915/i915_debugfs.c | 32 -
1 file changed, 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_deb
On Tue, Aug 28, 2018 at 12:54:13PM -0400, Jyoti Yadav wrote:
> From: Jyoti
>
> This patch resolves the DMC FW loading issue.
> Earlier DMC FW package have only one DMC FW for one stepping. But as such
> there is no such restriction from Package side.
> For ICL icl_dmc_ver1_07.bin binary package h
>-Original Message-
>From: Deak, Imre
>Sent: Tuesday, August 28, 2018 10:16 AM
>To: Yadav, Jyoti R
>Cc: intel-gfx@lists.freedesktop.org; Srivatsa, Anusha
>; Saarinen, Jani
>Subject: Re: [PATCH] [intel-gfx] drm/i915/intel_csr.c Fix DMC FW Loading issue
>on ICL.
>
>On Tue, Aug 28, 2018 at
== Series Details ==
Series: drm/i915: Fix ICL HDMI clock readout
URL : https://patchwork.freedesktop.org/series/48805/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718 -> Patchwork_10033 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwo
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev2)
URL : https://patchwork.freedesktop.org/series/48803/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c6afa54697da drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
-:10: WARNING:COMMIT_
subvendor and subdevice are unsigned, so fix their initialization in
INTEL_VGA_DEVICE.
Cc: Chris Wilson
Signed-off-by: Lucas De Marchi
---
include/drm/i915_pciids.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index fd
Document it like a real struct for ease of copy and paste, remove
comment of C99 compatibility and document that in some cases the first 2
fields can be u16.
Cc: Chris Wilson
Signed-off-by: Lucas De Marchi
---
include/drm/i915_pciids.h | 16 +---
1 file changed, 9 insertions(+), 7 d
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev2)
URL : https://patchwork.freedesktop.org/series/48803/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718 -> Patchwork_10034 =
== Summary - SUCCESS ==
No regressions found.
Extern
Quoting Lucas De Marchi (2018-08-28 18:41:46)
> Document it like a real struct for ease of copy and paste, remove
> comment of C99 compatibility and document that in some cases the first 2
I do recall that we couldn't use either C99 or class due to userspace
compatibility... The essence is that we
On Tue, Aug 28, 2018 at 10:41:46AM -0700, Lucas De Marchi wrote:
> Document it like a real struct for ease of copy and paste, remove
> comment of C99 compatibility and document that in some cases the first 2
> fields can be u16.
>
> Cc: Chris Wilson
> Signed-off-by: Lucas De Marchi
> ---
> incl
From: Jyoti
This patch resolves the DMC FW loading issue.
Earlier DMC FW package have only one DMC FW for one stepping. But as such
there is no such restriction from Package side.
For ICL icl_dmc_ver1_07.bin binary package has DMC FW for 2 steppings.
So while reading the dmc_offset from package h
== Series Details ==
Series: drm/i915/ringbuffer: Delay after invalidating gen6+ xcs
URL : https://patchwork.freedesktop.org/series/48813/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718 -> Patchwork_10035 =
== Summary - SUCCESS ==
No regressions found.
External UR
== Series Details ==
Series: series starting with [1/2] drm/i915: make field unsigned
URL : https://patchwork.freedesktop.org/series/48818/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3def105ca25a drm/i915: make field unsigned
586500c7bf00 drm/i915: reword documentation of po
== Series Details ==
Series: series starting with [1/2] drm/i915: make field unsigned
URL : https://patchwork.freedesktop.org/series/48818/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718 -> Patchwork_10036 =
== Summary - SUCCESS ==
No regressions found.
External U
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev3)
URL : https://patchwork.freedesktop.org/series/48803/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915
== Series Details ==
Series: series starting with [1/2] drm/i915: Don't pass plane to .check_plane()
URL : https://patchwork.freedesktop.org/series/48802/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4717_full -> Patchwork_10030_full =
== Summary - WARNING ==
Minor unkn
On Tue, Aug 28, 2018 at 04:39:21PM +, Souza, Jose wrote:
> On Tue, 2018-08-28 at 17:27 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Y/Yf tiling can't be used with IF-ID. We already reject uncompressed
> > Y/Yf but we should also reject them when compressed.
> >
>
> Reviewed-b
From: Jyoti
This patch resolves the DMC FW loading issue.
Earlier DMC FW package have only one DMC FW for one stepping. But as such
there is no such restriction from Package side.
For ICL icl_dmc_ver1_07.bin binary package has DMC FW for 2 steppings.
So while reading the dmc_offset from package h
On Tue, Aug 28, 2018 at 07:05:46PM +0100, Chris Wilson wrote:
> Quoting Lucas De Marchi (2018-08-28 18:41:46)
> > Document it like a real struct for ease of copy and paste, remove
> > comment of C99 compatibility and document that in some cases the first 2
>
> I do recall that we couldn't use eith
On Tue, Aug 28, 2018 at 07:29:59AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> ccb748df0058 ("drm/vc4: Fix the "no scaling" case on multi-planar YUV
> formats")
>
> is missing a Signed-off-by from its committer.
>
> It was rebased.
Hi Stephen,
I've fixed the commit and fixed our
On Tue, Aug 28, 2018 at 09:06:15PM +0300, Ville Syrjälä wrote:
> On Tue, Aug 28, 2018 at 10:41:46AM -0700, Lucas De Marchi wrote:
> > Document it like a real struct for ease of copy and paste, remove
> > comment of C99 compatibility and document that in some cases the first 2
> > fields can be u16.
On Tue, 2018-08-28 at 15:45 +0300, Ville Syrjälä wrote:
> On Mon, Aug 27, 2018 at 03:56:24PM -0700, Dhinakaran Pandiyan wrote:
> > skl_plane_has_planar is hard to read, simplify the logic by
> > checking for
> > support in the order of platform, pipe and plane.
> >
> > No change in functionality
On Tue, Aug 28, 2018 at 06:04:28PM +0100, Chris Wilson wrote:
> None of you never noticed I didn't send this patch from my tree that I
> found helped byt full-ppgtt. I can't believe none of you are psychic.
I noticed nothing... :P
what tree or patch are we missing that helps full ppgtt on byt?
>
Quoting Rodrigo Vivi (2018-08-28 21:14:14)
> On Tue, Aug 28, 2018 at 06:04:28PM +0100, Chris Wilson wrote:
> > None of you never noticed I didn't send this patch from my tree that I
> > found helped byt full-ppgtt. I can't believe none of you are psychic.
>
> I noticed nothing... :P
> what tree or
On Tue, Aug 28, 2018 at 06:51:31PM +0200, dmummensch...@web.de wrote:
> Hi,
>
> I have a Lenovo T470 notebook with a KBL (GT2) CPU connected to a docking
> station with two IPS monitors connected.
> According to xrandr the primary laptop screen is connected to eDP-1 and the
> monitors are conne
== Series Details ==
Series: drm/i915/execlists: Flush tasklet directly from reset-finish
URL : https://patchwork.freedesktop.org/series/48804/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718_full -> Patchwork_10032_full =
== Summary - WARNING ==
Minor unknown changes
On Tue, Aug 28, 2018 at 12:54:13PM -0400, Jyoti Yadav wrote:
> From: Jyoti
>
> This patch resolves the DMC FW loading issue.
> Earlier DMC FW package have only one DMC FW for one stepping. But as such
> there is no such restriction from Package side.
> For ICL icl_dmc_ver1_07.bin binary package h
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev4)
URL : https://patchwork.freedesktop.org/series/48803/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
18f5fa3a1ecf drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
-:10: WARNING:COMMIT_
On Tue, Aug 28, 2018 at 06:32:01PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Copy the 38.4 vs. 19.2 MHz ref clock exception from the dpll
> mgr into the clock readout function as well.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107722
> Signed-off-by: Ville Syrjälä
>
== Series Details ==
Series: drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL. (rev4)
URL : https://patchwork.freedesktop.org/series/48803/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4721 -> Patchwork_10038 =
== Summary - SUCCESS ==
No regressions found.
Extern
== Series Details ==
Series: drm/i915: Fix ICL HDMI clock readout
URL : https://patchwork.freedesktop.org/series/48805/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718_full -> Patchwork_10033_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
>-Original Message-
>From: Harry Wentland [mailto:harry.wentl...@amd.com]
>Sent: Thursday, August 23, 2018 1:01 PM
>To: Navare, Manasi D ; intel-
>g...@lists.freedesktop.org
>Cc: Singh, Gaurav K ; dri-
>de...@lists.freedesktop.org; Jani Nikula ; Ville
>Syrjala ; Srivatsa, Anusha
>
>Subjec
== Series Details ==
Series: drm/i915/ringbuffer: Delay after invalidating gen6+ xcs
URL : https://patchwork.freedesktop.org/series/48813/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718_full -> Patchwork_10035_full =
== Summary - SUCCESS ==
No regressions found.
>-Original Message-
>From: Navare, Manasi D
>Sent: Monday, July 30, 2018 7:13 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: ville.syrj...@linux.intel.com; jani.nik...@linux.intel.com; Srivatsa,
>Anusha
>; Singh, Gaurav K ; dri-
>de...@lists.freedesktop.org; Navare, Manasi D
>Subject: [PA
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Singh, Gaurav K ; Jani Nikula
>; Ville Syrjala ;
>Srivatsa, Anusha ; Navare, Manasi D
>
>Subject: [PATCH v2 15/23] drm/i915/dsc: Define & Compute VESA DSC params
>
>
>-Original Message-
>From: Navare, Manasi D
>Sent: Monday, July 30, 2018 7:13 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: ville.syrj...@linux.intel.com; jani.nik...@linux.intel.com; Srivatsa,
>Anusha
>; Singh, Gaurav K ;
>Navare, Manasi D
>Subject: [PATCH 17/23] drm/i915/dp: Enable/Dis
== Series Details ==
Series: series starting with [1/2] drm/i915: make field unsigned
URL : https://patchwork.freedesktop.org/series/48818/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4718_full -> Patchwork_10036_full =
== Summary - WARNING ==
Minor unknown changes com
On Tue, Aug 28, 2018 at 03:18:56PM -0700, Srivatsa, Anusha wrote:
>
>
> >-Original Message-
> >From: Navare, Manasi D
> >Sent: Tuesday, July 31, 2018 2:07 PM
> >To: intel-gfx@lists.freedesktop.org
> >Cc: Singh, Gaurav K ; Jani Nikula
> >; Ville Syrjala ;
> >Srivatsa, Anusha ; Navare, Mana
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Navare, Manasi D ; Jani Nikula
>; Ville Syrjala ;
>Srivatsa, Anusha
>Subject: [PATCH v2 19/23] drm/i915/dp: Use the existing write_infoframe() for
>DSC PPS SDPs
>
>
On Tue, Aug 28, 2018 at 03:47:21PM -0700, Manasi Navare wrote:
> On Tue, Aug 28, 2018 at 03:18:56PM -0700, Srivatsa, Anusha wrote:
> >
> >
> > >-Original Message-
> > >From: Navare, Manasi D
> > >Sent: Tuesday, July 31, 2018 2:07 PM
> > >To: intel-gfx@lists.freedesktop.org
> > >Cc: Singh,
Jani, Ville,
Could you take a look at this patch since it touches the DP compute
config quite a bit and I want to make sure that it enables DSC as per
our design agreement that we enable it only for resolutions that
do not fit available link BW.
I have one comment below that I need to fix. But ap
Signed-off-by: Lucas De Marchi
---
intel/intel_chipset.c | 1 +
intel/intel_chipset.h | 34 +-
2 files changed, 2 insertions(+), 33 deletions(-)
diff --git a/intel/intel_chipset.c b/intel/intel_chipset.c
index 5a549ba4..0c2ba884 100644
--- a/intel/intel_chipset.c
Adding PCI IDs to different projects is a boring manual task that
motivated me to create this series. The idea is to centralize the IDs in
the kernel header and let other projects copy it.
Initially my plan was to convert all gens, back to gen2, but that proved
slightly difficult since there are s
Signed-off-by: Lucas De Marchi
---
intel/intel_chipset.c | 1 +
intel/intel_chipset.h | 27 ++-
2 files changed, 3 insertions(+), 25 deletions(-)
diff --git a/intel/intel_chipset.c b/intel/intel_chipset.c
index 8af99ad9..5a549ba4 100644
--- a/intel/intel_chipset.c
+++ b/
We don't need to call IS_GEN() for each gen >= 9: we can rather use the
new intel_is_genx() helper to iterate the pciids array once.
Signed-off-by: Lucas De Marchi
---
intel/intel_bufmgr_gem.c | 8 +---
intel/intel_decode.c | 8 ++--
2 files changed, 3 insertions(+), 13 deletions(-)
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