On Fri, Jan 12, 2018 at 09:57:06PM +, Dhinakaran Pandiyan wrote:
> The HW frame counter can get reset if device enters a low power state after
> vblank interrupts were disabled. This messes up any following vblank count
> update as a negative diff (huge unsigned diff) is calculated from the HW
On Fri, Jan 19, 2018 at 04:53:34AM +, Pandiyan, Dhinakaran wrote:
> ping for review.
sorry for not getting back sooner here.
But yey \o/
I finally have dmc and psr working well on my own laptop!
so far so good! :)
>
> Let me know if there's anything that needs to be done, thanks!
>
>
> On
On Thu, 18 Jan 2018, Adam Jackson wrote:
> On Thu, 2018-01-18 at 17:06 +0200, Jani Nikula wrote:
>> No more sing-a-ling.
>>
>> Reported-by: Adam Jackson
>
> Why'd you omit the typos I reported in tools/intel_vbt_decode.c ?
This one's for the kernel. I'll apply your original patch to igt. (Sorry
Chris Wilson writes:
> sandybride_pcode is another sideband, so move it to their new home.
>
Up to this patch, omitting the waitboosting. Uptime 41min till
system hang on j1900.
With waitboosting patch it did survive without system hangs
for 24h+ but the frequency seemed to remain constant.
-M
Quoting Mika Kuoppala (2018-01-19 08:21:31)
> Chris Wilson writes:
>
> > sandybride_pcode is another sideband, so move it to their new home.
> >
>
> Up to this patch, omitting the waitboosting. Uptime 41min till
> system hang on j1900.
Still weird, my system is still surviving with its spiky fr
On Thu, 18 Jan 2018, David Weinehall wrote:
> On Thu, Jan 18, 2018 at 05:06:13PM +0200, Jani Nikula wrote:
>> No more sing-a-ling.
>
> LOL, well spotted.
>
>> Reported-by: Adam Jackson
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: David Weinehall
Thanks for the reviews, pushed.
BR,
Jani.
>
On Fri, 15 Dec 2017, Adam Jackson wrote:
> Signed-off-by: Adam Jackson
Finally pushed, thanks for the patch.
BR,
Jani.
> ---
> tools/intel_vbt_decode.c | 4 ++--
> tools/intel_vbt_defs.h | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/tools/intel_vbt_decode.c
Sync up with the following intel_vbt_defs.h changes in kernel:
c4fb60b9aba9 ("drm/i915/bios: add DP max link rate to VBT child device
struct")
d6038611aa3d ("drm/i915: Parse max HDMI TMDS clock from VBT")
6e8fbf8d19e4 ("drm/i915/vbt: Fix HDMI level shifter and max data rate
bitfield sizes")
9c3
On Tue, 02 Jan 2018, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: remove redundant ELD connector type update
> URL : https://patchwork.freedesktop.org/series/35853/
> State : success
Pushed to dinq.
BR,
Jani.
>
> == Summary ==
>
> Series 35853v1 drm/i915: remove redundant EL
From: Tvrtko Ursulin
We fail engine initialization if the scratch VMA cannot be created so
there is no point in error handle it later. If the initialization ordering
gets messed up, we can explode during development just as well.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc
From: Tvrtko Ursulin
Render engine constructor helpers must only be called from the render
engine constructors, but there is no need to burden the production
binaries with warnings which can only be triggered during development.
Signed-off-by: Tvrtko Ursulin
Cc: Michel Thierry
---
drivers/gpu
From: Tvrtko Ursulin
Setting up the workaround batch buffers can fail either due programming
errors which will be caught in development, or by the inability to
allocate a 4k object and pin it in GGTT at runtime.
Since this is highly unlikely, and it is not deterministic to allow driver
operation
Quoting Tvrtko Ursulin (2018-01-19 10:00:04)
> From: Tvrtko Ursulin
>
> We fail engine initialization if the scratch VMA cannot be created so
> there is no point in error handle it later. If the initialization ordering
> gets messed up, we can explode during development just as well.
>
> Signed-
Quoting Tvrtko Ursulin (2018-01-19 10:00:05)
> From: Tvrtko Ursulin
>
> Setting up the workaround batch buffers can fail either due programming
> errors which will be caught in development, or by the inability to
> allocate a 4k object and pin it in GGTT at runtime.
>
> Since this is highly unli
Use i915.dmc_firmware_path to override default firmware for the platform
and bypassing version checks.
v2: add missing param struct member declaration (David)
Tested-by: David Weinehall
Reviewed-by: David Weinehall
Cc: Anusha Srivatsa
Cc: David Weinehall
Signed-off-by: Jani Nikula
---
drive
On 19/01/2018 10:09, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-01-19 10:00:05)
From: Tvrtko Ursulin
Setting up the workaround batch buffers can fail either due programming
errors which will be caught in development, or by the inability to
allocate a 4k object and pin it in GGTT at runt
On Fri, 15 Dec 2017, Abdiel Janulgue wrote:
> 4K modes testing by using dummy EDID data has never been working
> properly on boxes with DP++ (dual-mode) adaptors. The reason for
> this is that those modes got pruned during hdmi mode validation.
> intel_hdmi_mode_valid returns CLOCK_HIGH because th
Quoting Tvrtko Ursulin (2018-01-19 10:29:12)
>
> On 19/01/2018 10:09, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-01-19 10:00:05)
> >> From: Tvrtko Ursulin
> >>
> >> Setting up the workaround batch buffers can fail either due programming
> >> errors which will be caught in development, o
== Series Details ==
Series: series starting with [1/3] drm/i915: Downgrade incorrect engine
constructor usage warnings to development
URL : https://patchwork.freedesktop.org/series/36771/
State : success
== Summary ==
Series 36771v1 series starting with [1/3] drm/i915: Downgrade incorrect en
== Series Details ==
Series: drm/i915: add support for specifying DMC firmware override by module
param (rev2)
URL : https://patchwork.freedesktop.org/series/34157/
State : success
== Summary ==
Series 34157v2 drm/i915: add support for specifying DMC firmware override by
module param
https:/
On Wed, 2018-01-10 at 17:17 -0200, Paulo Zanoni wrote:
> From: Rodrigo Vivi
>
> Icelake is an Intel® Processor containing an Intel® Graphics
> Controller.
>
> This is just an initial Icelake definition. PCI IDs, Icelake support
> and new features coming in following patches.
>
> v2: Add .ddb_si
+ Jani
On Wed, 2018-01-10 at 17:32 -0800, Rodrigo Vivi wrote:
> On Tue, Jan 09, 2018 at 11:23:09PM +, Paulo Zanoni wrote:
> > Hello
> >
> > This is the first series of patches for the Icelake platform. Unlike the
> > other
> > series that introduced new platforms, this one is very small and
On 18/01/2018 11:57, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-01-18 10:41:36)
From: Tvrtko Ursulin
We add a PMU counter to expose the number of requests currently executing
on the GPU.
This is useful to analyze the overall load of the system.
Signed-off-by: Tvrtko Ursulin
Ok, the
On 19/01/2018 11:45, Joonas Lahtinen wrote:
+ Jani
On Wed, 2018-01-10 at 17:32 -0800, Rodrigo Vivi wrote:
On Tue, Jan 09, 2018 at 11:23:09PM +, Paulo Zanoni wrote:
Hello
This is the first series of patches for the Icelake platform. Unlike the other
series that introduced new platforms, t
On Fri, Jan 19, 2018 at 10:56:33AM +0200, Jani Nikula wrote:
> Sync up with the following intel_vbt_defs.h changes in kernel:
>
> c4fb60b9aba9 ("drm/i915/bios: add DP max link rate to VBT child device
> struct")
>
> d6038611aa3d ("drm/i915: Parse max HDMI TMDS clock from VBT")
>
> 6e8fbf8d19e4 (
On Fri, 19 Jan 2018, Petri Latvala wrote:
> On Fri, Jan 19, 2018 at 10:56:33AM +0200, Jani Nikula wrote:
>> Sync up with the following intel_vbt_defs.h changes in kernel:
>>
>> c4fb60b9aba9 ("drm/i915/bios: add DP max link rate to VBT child device
>> struct")
>>
>> d6038611aa3d ("drm/i915: Parse
On Fri, 19 Jan 2018, Joonas Lahtinen wrote:
> + Jani
>
> On Wed, 2018-01-10 at 17:32 -0800, Rodrigo Vivi wrote:
>> On Tue, Jan 09, 2018 at 11:23:09PM +, Paulo Zanoni wrote:
>> > Hello
>> >
>> > This is the first series of patches for the Icelake platform. Unlike the
>> > other
>> > series th
While the end goal is to make this information available to userspace
through a new ioctl, there is no reason we can't display it in a human
readable fashion through debugfs.
slice0: 3 subslice(s) (0x7):
subslice0: 8 EUs (0xff)
subslice1: 8 EUs (0xff)
subslice2: 8 EUs (0xff
On Fri, Jan 19, 2018 at 12:49:26PM +, Michal Wajdeczko wrote:
> It looks that GuC log functionality is not fully functional yet and
> causes issues when enabled by auto(-1) modparam on debug builds.
>
> [ 30.062893] ==
> [ 30.062894] WARN
+ Daniel
> -Original Message-
> From: Wajdeczko, Michal
> Sent: Friday, January 19, 2018 2:49 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Wajdeczko, Michal ; Chris Wilson
> ; Saarinen, Jani ;
> Sarvela, Tomi P ; Lofstedt, Marta
> ; Winiarski, Michal
> Subject: [RFC] drm/i915/guc: Keep
From: Tvrtko Ursulin
Expose per-client and per-engine busyness under the previously added sysfs
client root.
The new file is named 'busy' and contains a list of, one line for each
engine, monotonically increasing nano-second resolution times each
client's jobs were executing on the GPU.
$ cat /
Up to now, subslice mask was assumed to be uniform across slices. But
starting with Cannonlake, slices can be asymmetric (for example slice0
has different number of subslices as slice1+). This change stores all
subslices masks for all slices rather than having a single mask that
applies to all slic
On 19/01/2018 13:40, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-01-19 11:45:24)
On 18/01/2018 11:57, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-01-18 10:41:36)
From: Tvrtko Ursulin
We add a PMU counter to expose the number of requests currently executing
on the GPU.
This is us
On Fri, 19 Jan 2018, Ville Syrjälä wrote:
> On Thu, Jan 18, 2018 at 05:33:10PM +0200, Jani Nikula wrote:
>> Update VBT defs to reflect revision 216. While at it, default the
>> expected child device struct size to sizeof the size rather than a
>> hardcoded value.
>>
>> v2: Fix bit order (David)
>
This might be useful information for developers looking at an error
state.
v2: Place topology towards the end of the error state (Chris)
v3: Reuse common printing code (Michal)
v4: Make this a one-liner (Chris)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
On Thu, Jan 18, 2018 at 05:33:10PM +0200, Jani Nikula wrote:
> Update VBT defs to reflect revision 216. While at it, default the
> expected child device struct size to sizeof the size rather than a
> hardcoded value.
>
> v2: Fix bit order (David)
>
> Cc: Rodrigo Vivi
> Signed-off-by: Jani Nikula
It looks that GuC log functionality is not fully functional yet and
causes issues when enabled by auto(-1) modparam on debug builds.
[ 30.062893] ==
[ 30.062894] WARNING: possible circular locking dependency detected
[ 30.062895] 4.15.0-rc8
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
Gen's GPU topology that doesn't aggregate numbers.
This is essential for monitoring parts o
Hi all,
This is hopefully the last iteration with a last tweak on comments for
coding style.
Cheers,
Lionel Landwerlin (6):
drm/i915: store all subslice masks
drm/i915/debugfs: reuse max slice/subslices already stored in sseu
drm/i915/debugfs: add rcs topology entry
drm/i915: add rcs top
There are a number of information that are readable from hardware
registers and that we would like to make accessible to userspace. One
particular example is the topology of the execution units (how are
execution units grouped in subslices and slices and also which ones
have been fused off for die
From: Tvrtko Ursulin
I have sent this as part of a larger series back in October '17.
First part of it is implementing a customer requirement to be able to query
engine utilization on their own contexts. This is done in patch 2, which falls
under the standard open source userspace requirements e
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the hooks already in place which track the overall engine busyness,
we can extend that slightly to split that time between contexts.
v2: Fix
Tvrtko Ursulin writes:
> On 19/01/2018 11:45, Joonas Lahtinen wrote:
>> + Jani
>>
>> On Wed, 2018-01-10 at 17:32 -0800, Rodrigo Vivi wrote:
>>> On Tue, Jan 09, 2018 at 11:23:09PM +, Paulo Zanoni wrote:
Hello
This is the first series of patches for the Icelake platform. Unlike
From: Tvrtko Ursulin
Expose a list of clients with open file handles in sysfs.
This will be a basis for a top-like utility showing per-client and per-
engine GPU load.
Currently we only expose each client's pid and name under opaque numbered
directories in /sys/class/drm/card0/clients/.
For in
Now that we have that information in topology fields, let's just reused it.
v2: Style tweaks (Tvrtko)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 27 +++
1 file changed, 11 insertions(+), 16 deletions(-)
diff -
From: Tvrtko Ursulin
By default we are not collecting any per-engine and per-context
statistcs.
Add a new sysfs toggle to enable this facility:
$ echo 1 >/sys/class/drm/card0/clients/enable_stats
v2: Rebase.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
driver
From: Tvrtko Ursulin
Some clients have the DRM fd passed to them over a socket by the X server.
Grab the real client and pid when they create their first context and
update the exposed data for more useful enumeration.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_drv.h
Quoting Tvrtko Ursulin (2018-01-19 11:45:24)
>
> On 18/01/2018 11:57, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-01-18 10:41:36)
> >> From: Tvrtko Ursulin
> >>
> >> We add a PMU counter to expose the number of requests currently executing
> >> on the GPU.
> >>
> >> This is useful to ana
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the accounting infrastructure in place in the previous patch, we add
a new context param (I915_CONTEXT_GET_ENGINE_BUSY) which takes a class an
Daniele Ceraolo Spurio writes:
> From: Thomas Daniel
>
> Enhanced Execlists is an upgraded version of execlists which supports
> up to 8 ports. The lrcs to be submitted are written to a submit queue,
> which is then loaded on the HW. When writing to the ELSP register, the
> lrcs are written cycl
On Sat, 09 Dec 2017, Chris Wilson wrote:
> The struct platform_device memdups the provided data pointer requiring
> us to free the template we construct during lpe_audio_platdev_create():
>
> unreferenced object 0x88026eafe400 (size 512):
> comm "insmod", pid 6850, jiffies 4295060179 (age 22
On Fri, 19 Jan 2018, Michał Winiarski wrote:
> On Fri, Jan 19, 2018 at 12:49:26PM +, Michal Wajdeczko wrote:
>> It looks that GuC log functionality is not fully functional yet and
>> causes issues when enabled by auto(-1) modparam on debug builds.
This could use a better explanation. Now it s
On Mon, 18 Dec 2017, Mika Kahola wrote:
> We may have fused or unused pipes in our system. Let's check that the pipe
> in question is within limits of accessible pipes. In case, that we are not
> able to access the pipe, we return early with a warning.
>
> v2: Rephrasing of the commit message (Jan
On 19/01/2018 13:22, Lionel Landwerlin wrote:
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
Gen's GPU topology that doesn't aggregate n
== Series Details ==
Series: drm/i915: Avoid leaking lpe audio platdev.data
URL : https://patchwork.freedesktop.org/series/35151/
State : success
== Summary ==
Series 35151v1 drm/i915: Avoid leaking lpe audio platdev.data
https://patchwork.freedesktop.org/api/1.0/series/35151/revisions/1/mbox/
== Series Details ==
Series: series starting with [1/3] drm/i915: Downgrade incorrect engine
constructor usage warnings to development
URL : https://patchwork.freedesktop.org/series/36771/
State : failure
== Summary ==
Test perf:
Subgroup oa-exponents:
fail -> PA
From: Ville Syrjälä
Let's document why we claim hsub==8,vsub==16 for CCS.
v2: Replace my explanation with Jason's
Cc: Daniel Vetter
Cc: Ben Widawsky
Cc: Jason Ekstrand
Cc: Daniel Stone
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 14 ++
1 file change
If we fail to allocate a new request, make sure we recover the pages
that are in the process of being freed by inserting an RCU barrier.
v2: Comment before the shrink and barrier in the error path.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/
On 19/01/18 14:24, Tvrtko Ursulin wrote:
On 19/01/2018 13:22, Lionel Landwerlin wrote:
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
G
== Series Details ==
Series: drm/i915/guc: Keep GuC log disabled by default
URL : https://patchwork.freedesktop.org/series/36796/
State : success
== Summary ==
Series 36796v1 drm/i915/guc: Keep GuC log disabled by default
https://patchwork.freedesktop.org/api/1.0/series/36796/revisions/1/mbox/
By counting the number of times we have woken up, we have a very simple
means of defining an epoch, which will come in handy if we want to
perform deferred tasks at the end of an epoch (i.e. while we are going
to sleep) without imposing on the next activity cycle.
Signed-off-by: Chris Wilson
---
When we finally decide the gpu is idle, that is a good time to shrink
our kmem_caches.
v3: Defer until an rcu grace period after we idle.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 65 +
1 file changed, 65 insert
== Series Details ==
Series: drm/i915: expose RCS topology to userspace
URL : https://patchwork.freedesktop.org/series/36793/
State : success
== Summary ==
Series 36793v1 drm/i915: expose RCS topology to userspace
https://patchwork.freedesktop.org/api/1.0/series/36793/revisions/1/mbox/
Test d
== Series Details ==
Series: Per-context and per-client engine busyness (rev2)
URL : https://patchwork.freedesktop.org/series/32645/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
== Series Details ==
Series: drm/i915: Fix up the CCS code (rev3)
URL : https://patchwork.freedesktop.org/series/29308/
State : failure
== Summary ==
Applying: drm/i915: Add a comment exlaining CCS hsub/vsub
Applying: drm/i915: Nuke a pointless unreachable()
Using index info to reconstruct a b
== Series Details ==
Series: drm/i915: add support for specifying DMC firmware override by module
param (rev2)
URL : https://patchwork.freedesktop.org/series/34157/
State : failure
== Summary ==
Test gem_eio:
Subgroup in-flight-suspend:
pass -> FAIL (shard-
On Thu, Oct 12, 2017 at 12:13:38PM -0700, Manasi Navare wrote:
> In case of eDP because the panel has a fixed mode, the link rate
> and lane count at which it is trained corresponds to the link BW
> required to support the native resolution of the panel. In case of
> panles with lower resolutions w
== Series Details ==
Series: drm/i915: Shrink the request kmem_cache on allocation error
URL : https://patchwork.freedesktop.org/series/36800/
State : success
== Summary ==
Series 36800v1 drm/i915: Shrink the request kmem_cache on allocation error
https://patchwork.freedesktop.org/api/1.0/seri
== Series Details ==
Series: series starting with [1/2] drm/i915: Track the number of times we have
woken the GPU up
URL : https://patchwork.freedesktop.org/series/36802/
State : success
== Summary ==
Series 36802v1 series starting with [1/2] drm/i915: Track the number of times
we have woken
On 19/01/18 05:05, Mika Kuoppala wrote:
Daniele Ceraolo Spurio writes:
From: Thomas Daniel
Enhanced Execlists is an upgraded version of execlists which supports
up to 8 ports. The lrcs to be submitted are written to a submit queue,
which is then loaded on the HW. When writing to the ELSP r
From: Tvrtko Ursulin
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the hooks already in place which track the overall engine busyness,
we can extend that slightly to split that time between contexts.
v2: Fix
Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > From: Anusha Srivatsa
> > >
> > > ICP has two backlight controllers - similar to previous platforms
> >
On Thu, Jan 18, 2018 at 06:40:07PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> For situations where sysadmins might want to allow different level of
> of access control for different PMUs, we start creating per-PMU
> perf_event_paranoid controls in sysfs.
You've completely and utterl
== Series Details ==
Series: Per-context and per-client engine busyness (rev3)
URL : https://patchwork.freedesktop.org/series/32645/
State : failure
== Summary ==
Series 32645v3 Per-context and per-client engine busyness
https://patchwork.freedesktop.org/api/1.0/series/32645/revisions/3/mbox/
Hi,
On 19/01/2018 16:45, Peter Zijlstra wrote:
On Thu, Jan 18, 2018 at 06:40:07PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
For situations where sysadmins might want to allow different level of
of access control for different PMUs, we start creating per-PMU
perf_event_paranoid contro
On 1/19/2018 2:00 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Render engine constructor helpers must only be called from the render
engine constructors, but there is no need to burden the production
binaries with warnings which can only be triggered during development.
Signed-off-by: Tvrtko
On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > > On Thu, Jan 11, 2018 at 04:00:08PM -0200, Paulo Zanoni wrote:
> > > > From: Anusha Srivatsa
> > > >
> >
On 10/01/2018 10:16, Joonas Lahtinen wrote:
On Tue, 2018-01-09 at 21:23 -0200, Paulo Zanoni wrote:
From: Tvrtko Ursulin
v2: Rebase.
v3:
* Remove DPF, it has been removed from SKL+.
* Fix -internal rebase wrt. execlists interrupt handling.
v4: Rebase.
v5:
* Updated for POR changes.
On Fri, Jan 19, 2018 at 05:26:02PM +, Anusha Srivatsa wrote:
> On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > > > On Thu, Jan 11, 2018 at 04:00:08
== Series Details ==
Series: drm/i915: Avoid leaking lpe audio platdev.data
URL : https://patchwork.freedesktop.org/series/35151/
State : failure
== Summary ==
Test perf:
Subgroup buffer-fill:
pass -> FAIL (shard-apl) fdo#103755
Subgroup enable-disab
Em Sex, 2018-01-19 às 17:30 +, Tvrtko Ursulin escreveu:
> On 10/01/2018 10:16, Joonas Lahtinen wrote:
> > On Tue, 2018-01-09 at 21:23 -0200, Paulo Zanoni wrote:
> > > From: Tvrtko Ursulin
> > >
> > > v2: Rebase.
> > >
> > > v3:
> > >* Remove DPF, it has been removed from SKL+.
> > >*
On Fri, Jan 19, 2018 at 09:26:02AM -0800, Anusha Srivatsa wrote:
> On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > On Thu, Jan 11, 2018 at 09:48:57PM +, James Ausmus wrote:
> > > > On Thu, Jan 11, 2018 at 04:00:08
Em Sex, 2018-01-19 às 09:56 -0800, Rodrigo Vivi escreveu:
> On Fri, Jan 19, 2018 at 05:26:02PM +, Anusha Srivatsa wrote:
> > On Fri, Jan 19, 2018 at 02:40:41PM -0200, Paulo Zanoni wrote:
> > > Em Qui, 2018-01-11 às 15:57 -0800, Rodrigo Vivi escreveu:
> > > > On Thu, Jan 11, 2018 at 09:48:57PM +
>-Original Message-
>From: Zanoni, Paulo R
>Sent: Friday, January 19, 2018 10:25 AM
>To: Vivi, Rodrigo ; Srivatsa, Anusha
>
>Cc: Ausmus, James ; Nikula, Jani
>; intel-gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH 6/8] drm/i915/icp: Add backlight Support for
>ICP
>
>Em Sex, 2
From: Ville Syrjälä
Apparently SKL/KBL need some manual help to get the
programmed HDMI vswing to stick. Implement the relevant
workaround (display w/a #1143).
Note that the relevant chicken bits live in a transcoder register
even though the bits affect a specific DDI port rather than a
specific
From: Anusha Srivatsa
ICP has two backlight controllers - similar to previous platforms like
BXT -, but we only use one controller for now, so we can just reuse
the CNP code.
v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani)
Reuse CNP code since it is very similar.(Ville)
v3 (from
== Series Details ==
Series: drm/i915: Implement display w/a #1143
URL : https://patchwork.freedesktop.org/series/36813/
State : success
== Summary ==
Series 36813v1 drm/i915: Implement display w/a #1143
https://patchwork.freedesktop.org/api/1.0/series/36813/revisions/1/mbox/
Test debugfs_tes
This patch clears a single bit. The bit is 0 by default but expected not to be
set. Explicitly clearing the bit in this patch is intended to indicate some
thinking has occurred, and that we want this bit cleared and we are not just
excepting the default value.
v2 (from Paulo): fix indentation.
v3:
== Series Details ==
Series: drm/i915/guc: Keep GuC log disabled by default
URL : https://patchwork.freedesktop.org/series/36796/
State : failure
== Summary ==
Warning: bzip CI_DRM_3658/shard-glkb6/results22.json.bz2 wasn't in correct JSON
format
Test pm_rps:
Subgroup reset:
On Fri, Jan 19, 2018 at 10:48 AM, Paulo Zanoni
wrote:
>
> From: Anusha Srivatsa
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT -, but we only use one controller for now, so we can just reuse
> the CNP code.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT reg
== Series Details ==
Series: ICP initial support (rev2)
URL : https://patchwork.freedesktop.org/series/36350/
State : success
== Summary ==
Series 36350v2 ICP initial support
https://patchwork.freedesktop.org/api/1.0/series/36350/revisions/2/mbox/
Test debugfs_test:
Subgroup read_all_
On Fri, Jan 19, 2018 at 06:48:12PM +, Paulo Zanoni wrote:
> From: Anusha Srivatsa
>
> ICP has two backlight controllers - similar to previous platforms like
> BXT -, but we only use one controller for now, so we can just reuse
> the CNP code.
>
> v2: Remove the usage of ICP_SECOND_PPS_BACKLI
On Fri, Jan 19, 2018 at 06:45:49PM +, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Apparently SKL/KBL need some manual help to get the
> programmed HDMI vswing to stick. Implement the relevant
> workaround (display w/a #1143).
>
> Note that the relevant chicken bits live in a transcoder re
Em Qui, 2018-01-11 às 16:00 -0200, Paulo Zanoni escreveu:
> Hi
>
> This series adds the initial support for ICP. No conflicts with the
> other
> series. Patches 1 and 2 are parts of other series that we've already
> been
> discussing on this mailing list, but I put them here so CI can do the
> rig
== Series Details ==
Series: drm/i915: expose RCS topology to userspace
URL : https://patchwork.freedesktop.org/series/36793/
State : success
== Summary ==
Warning: bzip CI_DRM_3658/shard-glkb6/results22.json.bz2 wasn't in correct JSON
format
Test perf:
Subgroup oa-exponents:
Quoting Paulo Zanoni (2018-01-19 18:10:51)
> Em Sex, 2018-01-19 às 17:30 +, Tvrtko Ursulin escreveu:
> > On 10/01/2018 10:16, Joonas Lahtinen wrote:
> > > If these are in a later patch, should be squashed here.
> >
> > It might be possible in some cases, or it might be quite challenging
> > in
Yes, this applies to CFL also. CFL follows on from KBL and doesn't have any
display changes, so for the workarounds you can translate KBL:All to CFL:All.
There is a note about that.
-Original Message-
From: Vivi, Rodrigo
Sent: Friday, 19 January, 2018 12:08 PM
To: Ville Syrjala
Cc: i
Quoting Michał Winiarski (2018-01-19 13:36:27)
> On Fri, Jan 19, 2018 at 12:49:26PM +, Michal Wajdeczko wrote:
> > It looks that GuC log functionality is not fully functional yet and
> > causes issues when enabled by auto(-1) modparam on debug builds.
> >
> > [ 30.062893] ===
On Fri, 2018-01-19 at 10:17 +0200, Jani Nikula wrote:
> On Thu, 18 Jan 2018, Adam Jackson wrote:
> > On Thu, 2018-01-18 at 17:06 +0200, Jani Nikula wrote:
> > > No more sing-a-ling.
> > >
> > > Reported-by: Adam Jackson
> >
> > Why'd you omit the typos I reported in tools/intel_vbt_decode.c ?
>
Quoting Tvrtko Ursulin (2018-01-19 16:26:16)
> From: Tvrtko Ursulin
>
> Some customers want to know how much of the GPU time are their clients
> using in order to make dynamic load balancing decisions.
>
> With the hooks already in place which track the overall engine busyness,
> we can extend t
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