Re: [Intel-gfx] [PATCH i-g-t 2/3] tests/kms_cursor_legacy: Perform lazy cleanup between tests

2017-12-22 Thread Mika Kahola
On Thu, 2017-12-07 at 14:40 +0100, Maarten Lankhorst wrote: > Instead of assuming each subtest cleans up after itself, assume it > fails and doesn't. Now that igt_kms can clean up stale events, we > can just force each subtest to only clean up its framebuffers, > which isn't harmful if it failed. >

[Intel-gfx] [PATCH i-g-t v4] scripts/trace.pl: Optimize event parsing and processing

2017-12-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin A couple of small optimizations which altogether bring around 30% improvement in my testing. 1. Do less string processing on tracepoints names and push more of the check into the if-ladder. 2. Pull out common db key and ctx processing and cache common values in local

Re: [Intel-gfx] [PATCH i-g-t 3/3] tests/kms_cursor_legacy: Rework the 2x-*-vs-cursor-* tests.

2017-12-22 Thread Mika Kahola
On Thu, 2017-12-07 at 14:40 +0100, Maarten Lankhorst wrote: > Using the fancy new DRM_CAP_CRTC_IN_VBLANK_EVENT cap I can finally > make this test the work I originally intended to. > > For the !modeset case that means performing a pageflip on both > crtc's, > then requeueing as soon as the event i

Re: [Intel-gfx] [PULL] more gvt-next for 4.16

2017-12-22 Thread Zhenyu Wang
On 2017.12.22 09:49:36 +0200, Jani Nikula wrote: > > Yes. We want a minimum of two people looking at each patch. It's pretty > much irrelevant if the committer/maintainer is the author or not. 2*sob > or sob+rb or sob+ack, or more for more complicated things. > > It's unfortunately common that th

Re: [Intel-gfx] [PATCH v2] drm/syncobj: Stop reusing the same struct file for all syncobj -> fd

2017-12-22 Thread Chris Wilson
Quoting Dave Airlie (2017-12-22 03:05:16) > On 21 December 2017 at 19:28, Chris Wilson wrote: > > The vk cts test: > > dEQP-VK.api.external.semaphore.opaque_fd.export_multiple_times_temporary > > > > triggers a lot of > > VFS: Close: file count is 0 > > > > Dave pointed out that clearing the synco

Re: [Intel-gfx] [RFC 0/4] GPU/CPU timestamps correlation for relating OA samples with system events

2017-12-22 Thread Sagar Arun Kamble
On 12/21/2017 6:29 PM, Lionel Landwerlin wrote: Some more findings I made while playing with this series & GPUTop. Turns out the 2ms drift per second is due to timecounter. Adding the delta this way : https://github.com/djdeath/linux/commit/7b002cb360483e331053aec0f98433a5bd5c5c3f#diff-9b74b

[Intel-gfx] ✓ Fi.CI.BAT: success for scripts/trace.pl: Optimize event parsing and processing (rev5)

2017-12-22 Thread Patchwork
== Series Details == Series: scripts/trace.pl: Optimize event parsing and processing (rev5) URL : https://patchwork.freedesktop.org/series/35569/ State : success == Summary == IGT patchset tested on top of latest successful build beb26d89ff5c5621c1e6b6ac2a45439507af86b7 meson: Install .testlis

Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc : GEM_BUG_ON for GuC reset

2017-12-22 Thread Sagar Arun Kamble
On 12/21/2017 6:37 AM, Sujaritha Sundaresan wrote: Including GEM_BUG_ON for GuC reset function in intel_uncore. Can be reframed - "Instead of returning -EINVAL, GEM_BUG_ON when GuC reset is invoked for platforms not supporting as we don't expect to invoke it" Subject can be - "GEM_BUG_ON on i

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add GuC support for engine busy stats

2017-12-22 Thread Tvrtko Ursulin
Hi guys, Anyone has the bandwidth to review the below tiny patch, or suggest some else as potential reviewer? Truth be told I only tested it lightly, but it passed the perf_pmu unit tests. Goal is to bring engine busyness PMU reporting accuracy to the same level as execlists. Regards, Tv

[Intel-gfx] [PULL] drm-intel-fixes

2017-12-22 Thread Jani Nikula
Hi Dave, just flushing my queue of a couple of late arrivals before xmas. Pull and send on at your leisure. Happy holidays, Jani. The following changes since commit a4ffdc2b6726958c07d535318400124e3a3bc19b: drm/i915: Protect DDI port to DPLL map from theoretical race. (2017-12-19 14:59:53 +0

Re: [Intel-gfx] [RFC 0/4] GPU/CPU timestamps correlation for relating OA samples with system events

2017-12-22 Thread Lionel Landwerlin
On 22/12/17 09:30, Sagar Arun Kamble wrote: On 12/21/2017 6:29 PM, Lionel Landwerlin wrote: Some more findings I made while playing with this series & GPUTop. Turns out the 2ms drift per second is due to timecounter. Adding the delta this way : https://github.com/djdeath/linux/commit/7b002

[Intel-gfx] ✓ Fi.CI.IGT: success for scripts/trace.pl: Optimize event parsing and processing (rev5)

2017-12-22 Thread Patchwork
== Series Details == Series: scripts/trace.pl: Optimize event parsing and processing (rev5) URL : https://patchwork.freedesktop.org/series/35569/ State : success == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-hsw) fdo#10421

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add GuC support for engine busy stats

2017-12-22 Thread Sagar Arun Kamble
On 11/29/2017 6:03 PM, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Wire up the engine busy stats accounting to the GuC submission backend. Since there is not no context out interrupt we need to place the accounting callbacks per-request in order to correctly pair with user interrupts. v2

[Intel-gfx] [PATCH igt 1/5] igt/perf_pmu: Tighten busy measurement

2017-12-22 Thread Chris Wilson
Sleep for a known duration. In particular, CI once saw a measurement for busyness greater than the intended batch_duration! v2: Go back to starting pmu sampling outside of spinner; the GPU should be idle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104241 Signed-off-by: Chris Wilson C

[Intel-gfx] [PATCH igt 2/5] igt/perf_pmu: Tighten measurements for most-busy

2017-12-22 Thread Chris Wilson
Create all the spinners before starting the sampler and then measure how long we sleep. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104160 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 45 + 1 file changed, 25 insert

[Intel-gfx] [PATCH igt 3/5] igt/perf_pmu: Measure the reference batch for busy-check-all

2017-12-22 Thread Chris Wilson
Don't rely on the timer being precise when we can sleep for a known duration. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index 96091b853..b3b289656 100644

[Intel-gfx] [PATCH igt 5/5] igt/perf_pmu: Speed up frequency measurement

2017-12-22 Thread Chris Wilson
Use the normal batch_duration_ns and display the sampled frequency: Frequency: min=100, max=750, boost=750 MHz Min frequency: requested 100.0, actual 100.0 Max frequency: requested 755.6, actual 755.6 v2: Remove the early spin_batch_end and assert the measured frequencies

Re: [Intel-gfx] [PATCH] drm/i915: Do not enable movntdqa optimization in hypervisor guest

2017-12-22 Thread Chris Wilson
Quoting changbin...@intel.com (2017-12-22 06:31:49) > From: Changbin Du > > Our QA reported a problem caused by movntdqa instructions. Currently, > the KVM hypervisor doesn't support VEX-prefix instructions emulation. > If users passthrough a GPU to guest with vfio option 'x-no-mmap=on', > then a

[Intel-gfx] [PATCH igt 4/5] igt/perf_pmu: Measure the reference batch for all-busy-check-all

2017-12-22 Thread Chris Wilson
Don't rely on the timer being precise when we can sleep for a known duration. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 38 ++ 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c inde

[Intel-gfx] [PATCH 2/2] drm/i915: Expose idle-delays to Kconfig

2017-12-22 Thread Chris Wilson
We want to expose the parameters for controlling how long it takes for us to notice and park the GPU after a stream of requests in order to try and tune the optimal power-efficiency vs latency of a mostly idle system. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/Kcon

[Intel-gfx] [PATCH 1/2] drm/i915: Expose the busyspin durations for i915_wait_request

2017-12-22 Thread Chris Wilson
An interesting discussion regarding "hybrid interrupt polling" for NVMe came to the conclusion that the ideal busyspin before sleeping was half of the expected request latency (and better if it was already halfway through that request). This suggested that we too should look again at our tradeoff b

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add GuC support for engine busy stats

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 10:50, Sagar Arun Kamble wrote: On 11/29/2017 6:03 PM, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Wire up the engine busy stats accounting to the GuC submission backend. Since there is not no Yeah. :)   context out interrupt we need to place the accounting callbacks per-re

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Expose idle-delays to Kconfig

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 11:33, Chris Wilson wrote: We want to expose the parameters for controlling how long it takes for us to notice and park the GPU after a stream of requests in order to try and tune the optimal power-efficiency vs latency of a mostly idle system. Extra space. Signed-off-by: Ch

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Expose idle-delays to Kconfig

2017-12-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2017-12-22 11:52:28) > > On 22/12/2017 11:33, Chris Wilson wrote: > > +static inline long retire_delay(void) > > +{ > > + const long delay = msecs_to_jiffies(CONFIG_DRM_I915_GEM_RETIRE_DELAY); > > + > > + if (CONFIG_DRM_I915_GEM_RETIRE_DELAY >= 1000) > > +

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Expose the busyspin durations for i915_wait_request

2017-12-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Expose the busyspin durations for i915_wait_request URL : https://patchwork.freedesktop.org/series/35716/ State : failure == Summary == Series 35716v1 series starting with [1/2] drm/i915: Expose the busyspin durations for i915

[Intel-gfx] [PATCH 0/5] drm/i915: promote fixed16_16

2017-12-22 Thread Michal Wajdeczko
The ultimate goal of this series is to promote our definition of fixed16.16 type to include/linux. However, before doing so we need to do some preparations/cleanups locally. Note that some helper functions may require additional renames. Any suggestions are welcomed. Suggested-by: Chris Wilson C

[Intel-gfx] [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t

2017-12-22 Thread Michal Wajdeczko
Rename uint_fixed_16_16_t to fixed16_16_t to match header name. Also switch into kernel integer types. Suggested-by: Chris Wilson Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/fixed16_16.h | 91 ++---

[Intel-gfx] [PATCH 3/5] drm/i915: Add common fixed16_16 values

2017-12-22 Thread Michal Wajdeczko
Zero and One are additional commonly used values that can have its own definitions. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/fixed16_16.h | 15 --- drivers/gpu/drm/i915/intel_pm.c | 22 +++---

[Intel-gfx] [PATCH 4/5] drm/i915: Fix overflows in fixed16_16

2017-12-22 Thread Michal Wajdeczko
If someone provides too large number for fixed16 type we will WARN but we will not correctly clamp values and that may lead to fully wrong calculations. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/fixed16_16.h | 13 +--

[Intel-gfx] [PATCH 5/5] drm/i915: Tidy up fixed16_16

2017-12-22 Thread Michal Wajdeczko
Tidy up fixed16_16 code before promoting it to the include/linux. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/fixed16_16.h | 96 ++- 1 file changed, 43 insertions(+), 53 deletions(-) diff -

[Intel-gfx] [PATCH 1/5] drm/i915: Move uint_fixed_16_16_t to its own header

2017-12-22 Thread Michal Wajdeczko
Our uint_fixed_16_16_t type definition and related helper functions deserve dedicated header. While here cleanup indent. v2: avoid too generic filename (Chris) Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen Acked-by: Rodrigo Vivi --- drivers/gpu/drm/i9

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Misc i915_drv.h cleanups (rev2)

2017-12-22 Thread Chris Wilson
Quoting Patchwork (2017-12-21 21:36:17) > == Series Details == > > Series: Misc i915_drv.h cleanups (rev2) > URL : https://patchwork.freedesktop.org/series/35637/ > State : failure > > == Summary == > > Test gem_tiled_swapping: > Subgroup non-threaded: > incomplete -> P

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] igt/perf_pmu: Tighten busy measurement

2017-12-22 Thread Patchwork
== Series Details == Series: series starting with [1/5] igt/perf_pmu: Tighten busy measurement URL : https://patchwork.freedesktop.org/series/35715/ State : success == Summary == IGT patchset tested on top of latest successful build 865a47ca2b93b208ba016f3c4fc00831ec7bfec6 overlay: parse trace

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Add common fixed16_16 values

2017-12-22 Thread Chris Wilson
Quoting Michal Wajdeczko (2017-12-22 12:25:54) > Zero and One are additional commonly used values that > can have its own definitions. > > Signed-off-by: Michal Wajdeczko > Cc: Chris Wilson > Cc: Rodrigo Vivi > Cc: Joonas Lahtinen > --- > drivers/gpu/drm/i915/fixed16_16.h | 15 ---

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Fix overflows in fixed16_16

2017-12-22 Thread Chris Wilson
Quoting Michal Wajdeczko (2017-12-22 12:25:55) > If someone provides too large number for fixed16 type > we will WARN but we will not correctly clamp values > and that may lead to fully wrong calculations. > > Signed-off-by: Michal Wajdeczko > Cc: Chris Wilson > Cc: Rodrigo Vivi > Cc: Joonas La

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Tidy up fixed16_16

2017-12-22 Thread Chris Wilson
Quoting Michal Wajdeczko (2017-12-22 12:25:56) > Tidy up fixed16_16 code before promoting it to the include/linux. > > Signed-off-by: Michal Wajdeczko > Cc: Chris Wilson > Cc: Rodrigo Vivi > Cc: Joonas Lahtinen > --- > drivers/gpu/drm/i915/fixed16_16.h | 96 > ++--

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: promote fixed16_16

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: promote fixed16_16 URL : https://patchwork.freedesktop.org/series/35717/ State : success == Summary == Series 35717v1 drm/i915: promote fixed16_16 https://patchwork.freedesktop.org/api/1.0/series/35717/revisions/1/mbox/ Test debugfs_test: Subgrou

Re: [Intel-gfx] [PATCH i-g-t 2/3] tests/kms_cursor_legacy: Perform lazy cleanup between tests

2017-12-22 Thread Mika Kahola
On Thu, 2017-12-07 at 14:40 +0100, Maarten Lankhorst wrote: > Instead of assuming each subtest cleans up after itself, assume it > fails and doesn't. Now that igt_kms can clean up stale events, we > can just force each subtest to only clean up its framebuffers, > which isn't harmful if it failed. >

[Intel-gfx] [PATCH i-g-t 2/2] tests/perf_pmu: Simplify interrupt testing

2017-12-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Rather than calibrate and emit nop batches, use a manually signalled chain of spinners to generate the desired interrupts. v2: Two flavours of interrupt generation. (Chris Wilson) Signed-off-by: Tvrtko Ursulin Cc: Chris Wilson --- tests/perf_pmu.c | 141 +

[Intel-gfx] [PATCH i-g-t 1/2] lib/dummyload: Support returning output fence

2017-12-22 Thread Tvrtko Ursulin
From: Tvrtko Ursulin Support creating spin batches which return an output fence using new __igt_spin_batch_new_fence / igt_spin_batch_new_fence API. This will be used fromthe perf_pmu@interrupts test to ensure user interrupt generation from a batch with controlled duration. v2: Support out fenc

Re: [Intel-gfx] [PATCH igt 1/5] igt/perf_pmu: Tighten busy measurement

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 11:03, Chris Wilson wrote: Sleep for a known duration. In particular, CI once saw a measurement for busyness greater than the intended batch_duration! v2: Go back to starting pmu sampling outside of spinner; the GPU should be idle. Bugzilla: https://bugs.freedesktop.org/show_bug.

Re: [Intel-gfx] [PATCH igt 2/5] igt/perf_pmu: Tighten measurements for most-busy

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 11:03, Chris Wilson wrote: Create all the spinners before starting the sampler and then measure how long we sleep. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104160 Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 45 +--

Re: [Intel-gfx] [PATCH igt 3/5] igt/perf_pmu: Measure the reference batch for busy-check-all

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 11:03, Chris Wilson wrote: Don't rely on the timer being precise when we can sleep for a known duration. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tests/perf_pmu.c b/tests

Re: [Intel-gfx] [PATCH igt 4/5] igt/perf_pmu: Measure the reference batch for all-busy-check-all

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 11:03, Chris Wilson wrote: Don't rely on the timer being precise when we can sleep for a known duration. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin --- tests/perf_pmu.c | 38 ++ 1 file changed, 26 insertions(+), 12 deletions(-) diff --

Re: [Intel-gfx] [PATCH igt 5/5] igt/perf_pmu: Speed up frequency measurement

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 11:03, Chris Wilson wrote: Use the normal batch_duration_ns and display the sampled frequency: Frequency: min=100, max=750, boost=750 MHz Min frequency: requested 100.0, actual 100.0 Max frequency: requested 755.6, actual 755.6 v2: Remove the early spin_ba

[Intel-gfx] [PATCH] drm/i915/execlists: Show preemption progress in GEM_TRACE

2017-12-22 Thread Chris Wilson
We already emit a GEM_TRACE for when we start preemption, but we lack one to show when the preemption is completed and we return to the regular queue. This is to continue the investigation into the mysertious <0>[ 197.854177] -0 1..s1 197837017us : execlists_submission_tasklet: rcs0 cs-i

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] lib/dummyload: Support returning output fence

2017-12-22 Thread Patchwork
== Series Details == Series: series starting with [1/2] lib/dummyload: Support returning output fence URL : https://patchwork.freedesktop.org/series/35718/ State : failure == Summary == IGT patchset tested on top of latest successful build 865a47ca2b93b208ba016f3c4fc00831ec7bfec6 overlay: pars

Re: [Intel-gfx] [PATCH i-g-t 1/2] lib/dummyload: Support returning output fence

2017-12-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2017-12-22 13:13:47) > From: Tvrtko Ursulin > > Support creating spin batches which return an output fence using new > __igt_spin_batch_new_fence / igt_spin_batch_new_fence API. > > This will be used fromthe perf_pmu@interrupts test to ensure user > interrupt generation f

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Show preemption progress in GEM_TRACE

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 13:27, Chris Wilson wrote: We already emit a GEM_TRACE for when we start preemption, but we lack one to show when the preemption is completed and we return to the regular queue. This is to continue the investigation into the mysertious Un-permute mysterious :) <0>[ 197.854177]

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] igt/perf_pmu: Tighten busy measurement

2017-12-22 Thread Patchwork
== Series Details == Series: series starting with [1/5] igt/perf_pmu: Tighten busy measurement URL : https://patchwork.freedesktop.org/series/35715/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: fail -> P

Re: [Intel-gfx] [PATCH i-g-t 2/2] tests/perf_pmu: Simplify interrupt testing

2017-12-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2017-12-22 13:13:48) > From: Tvrtko Ursulin > > Rather than calibrate and emit nop batches, use a manually signalled chain > of spinners to generate the desired interrupts. > > v2: Two flavours of interrupt generation. (Chris Wilson) > > Signed-off-by: Tvrtko Ursulin >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Show preemption progress in GEM_TRACE

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Show preemption progress in GEM_TRACE URL : https://patchwork.freedesktop.org/series/35719/ State : success == Summary == Series 35719v1 drm/i915/execlists: Show preemption progress in GEM_TRACE https://patchwork.freedesktop.org/api/1.0/series/3

[Intel-gfx] [PATCH] drm/i915: Assert that the request is on the execution queue before being removed

2017-12-22 Thread Chris Wilson
We should only attempt to remove requests from the execution queue that are on the execution queue. These are the requests that have been assigned a global_seqno, so we can assert that we only attempt to remove requests with a nonzero global_seqno. Afterwards we assert that we remove them in order,

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: promote fixed16_16

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: promote fixed16_16 URL : https://patchwork.freedesktop.org/series/35717/ State : failure == Summary == Test perf: Subgroup blocking: fail -> PASS (shard-hsw) fdo#102252 Test gem_tiled_swapping: Subgroup non-thre

[Intel-gfx] [PATCH] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Chris Wilson
Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck ff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled over the HWSP. So include the HWSP in the engin

[Intel-gfx] [PATCH] drm/i915: Fix Limited Range Color Handling

2017-12-22 Thread Uma Shankar
From: Johnson Lin Some panels support limited range output (16-235) compared to full range RGB values (0-255). Also userspace can control the RGB range using "Broadcast RGB" property. Currently the code to handle full range to limited range is broken. This patch fixes the same by properly scaling

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Assert that the request is on the execution queue before being removed

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Assert that the request is on the execution queue before being removed URL : https://patchwork.freedesktop.org/series/35723/ State : success == Summary == Series 35723v1 drm/i915: Assert that the request is on the execution queue before being removed ht

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Only enumerate available counters in sysfs

2017-12-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2017-12-21 17:13:16) > From: Tvrtko Ursulin > > Switch over to dynamically creating device attributes, which are in turn > used by the perf core to expose available counters in sysfs. > > This way we do not expose counters which are not avaiable on the current > platform,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Show HWSP in intel_engine_dump() URL : https://patchwork.freedesktop.org/series/35724/ State : success == Summary == Series 35724v1 drm/i915: Show HWSP in intel_engine_dump() https://patchwork.freedesktop.org/api/1.0/series/35724/revisions/1/mbox/ Test d

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix Limited Range Color Handling

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Fix Limited Range Color Handling URL : https://patchwork.freedesktop.org/series/35725/ State : success == Summary == Series 35725v1 drm/i915: Fix Limited Range Color Handling https://patchwork.freedesktop.org/api/1.0/series/35725/revisions/1/mbox/ Test g

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Show preemption progress in GEM_TRACE

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915/execlists: Show preemption progress in GEM_TRACE URL : https://patchwork.freedesktop.org/series/35719/ State : failure == Summary == Test gem_mmap_wc: Subgroup set-cache-level: skip -> PASS (shard-snb) Test kms_flip_even

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Add common fixed16_16 values

2017-12-22 Thread Michal Wajdeczko
On Fri, 22 Dec 2017 13:34:58 +0100, Chris Wilson wrote: Quoting Michal Wajdeczko (2017-12-22 12:25:54) Zero and One are additional commonly used values that can have its own definitions. Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/g

Re: [Intel-gfx] [PATCH] drm/i915: Fix Limited Range Color Handling

2017-12-22 Thread Ville Syrjälä
On Fri, Dec 22, 2017 at 08:34:47PM +0530, Uma Shankar wrote: > From: Johnson Lin > > Some panels support limited range output (16-235) compared > to full range RGB values (0-255). Also userspace can control > the RGB range using "Broadcast RGB" property. Currently the > code to handle full range

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Fix overflows in fixed16_16

2017-12-22 Thread Michal Wajdeczko
On Fri, 22 Dec 2017 13:39:11 +0100, Chris Wilson wrote: Quoting Michal Wajdeczko (2017-12-22 12:25:55) If someone provides too large number for fixed16 type we will WARN but we will not correctly clamp values and that may lead to fully wrong calculations. Signed-off-by: Michal Wajdeczko Cc

Re: [Intel-gfx] [PATCH 3/5] drm/i915: Add common fixed16_16 values

2017-12-22 Thread Chris Wilson
Quoting Michal Wajdeczko (2017-12-22 15:51:49) > On Fri, 22 Dec 2017 13:34:58 +0100, Chris Wilson > wrote: > > > Quoting Michal Wajdeczko (2017-12-22 12:25:54) > >> Zero and One are additional commonly used values that > >> can have its own definitions. > >> > >> Signed-off-by: Michal Wajdeczko

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Assert that the request is on the execution queue before being removed

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Assert that the request is on the execution queue before being removed URL : https://patchwork.freedesktop.org/series/35723/ State : failure == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: pass

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t

2017-12-22 Thread Michal Wajdeczko
On Fri, 22 Dec 2017 13:25:53 +0100, Michal Wajdeczko wrote: Rename uint_fixed_16_16_t to fixed16_16_t to match header name. Also switch into kernel integer types. Suggested-by: Chris Wilson Signed-off-by: Michal Wajdeczko Cc: Chris Wilson Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- driver

Re: [Intel-gfx] [PATCH] drm/i915: Fix Limited Range Color Handling

2017-12-22 Thread Ville Syrjälä
On Fri, Dec 22, 2017 at 05:54:31PM +0200, Ville Syrjälä wrote: > On Fri, Dec 22, 2017 at 08:34:47PM +0530, Uma Shankar wrote: > > From: Johnson Lin > > > > Some panels support limited range output (16-235) compared > > to full range RGB values (0-255). Also userspace can control > > the RGB range

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Show HWSP in intel_engine_dump() URL : https://patchwork.freedesktop.org/series/35724/ State : success == Summary == Test pm_rpm: Subgroup system-suspend-execbuf: skip -> PASS (shard-hsw) fdo#103375 Test kms_flip:

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Fix Limited Range Color Handling

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Fix Limited Range Color Handling URL : https://patchwork.freedesktop.org/series/35725/ State : warning == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: pass -> SKIP (shard-snb)

Re: [Intel-gfx] [PATCH igt] igt/gem_exec_await: Flush the WCB before attempting to queue more work

2017-12-22 Thread Tvrtko Ursulin
On 21/12/2017 15:48, Chris Wilson wrote: Ensure that the terminating write into WC-memory is flushed before we might trigger a wait for ring space. Signed-off-by: Chris Wilson --- tests/gem_exec_await.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/gem_exec_await.c b/tests/gem_e

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t

2017-12-22 Thread Chris Wilson
Quoting Michal Wajdeczko (2017-12-22 16:08:51) > On Fri, 22 Dec 2017 13:25:53 +0100, Michal Wajdeczko > wrote: > > > Rename uint_fixed_16_16_t to fixed16_16_t to match header name. > > Also switch into kernel integer types. > > > > Suggested-by: Chris Wilson > > Signed-off-by: Michal Wajdeczko

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Rename uint_fixed_16_16_t to fixed16_16_t

2017-12-22 Thread Chris Wilson
Quoting Chris Wilson (2017-12-22 17:11:00) > Quoting Michal Wajdeczko (2017-12-22 16:08:51) > > On Fri, 22 Dec 2017 13:25:53 +0100, Michal Wajdeczko > > wrote: > > > > > Rename uint_fixed_16_16_t to fixed16_16_t to match header name. > > > Also switch into kernel integer types. > > > > > > Sugg

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Only enumerate available counters in sysfs

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 14:52, Chris Wilson wrote: Quoting Tvrtko Ursulin (2017-12-21 17:13:16) From: Tvrtko Ursulin Switch over to dynamically creating device attributes, which are in turn used by the perf core to expose available counters in sysfs. This way we do not expose counters which are not av

Re: [Intel-gfx] [PATCH] drm/i915: Assert that the request is on the execution queue before being removed

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 14:19, Chris Wilson wrote: We should only attempt to remove requests from the execution queue that are on the execution queue. These are the requests that have been assigned a global_seqno, so we can assert that we only attempt to remove requests with a nonzero global_seqno. Afterw

[Intel-gfx] [PATCH v2] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Chris Wilson
Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck ff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled over the HWSP. So include the HWSP in the engin

Re: [Intel-gfx] [PATCH v2] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 17:28, Chris Wilson wrote: Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck ff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled ove

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Show HWSP in intel_engine_dump() (rev2)

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Show HWSP in intel_engine_dump() (rev2) URL : https://patchwork.freedesktop.org/series/35724/ State : success == Summary == Series 35724v2 drm/i915: Show HWSP in intel_engine_dump() https://patchwork.freedesktop.org/api/1.0/series/35724/revisions/2/mbox/

Re: [Intel-gfx] [PULL] more gvt-next for 4.16

2017-12-22 Thread Rodrigo Vivi
On Fri, Dec 22, 2017 at 08:51:41AM +, Zhenyu Wang wrote: > On 2017.12.22 09:49:36 +0200, Jani Nikula wrote: > > > > Yes. We want a minimum of two people looking at each patch. It's pretty > > much irrelevant if the committer/maintainer is the author or not. 2*sob > > or sob+rb or sob+ack, or m

[Intel-gfx] [PATCH v3] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Chris Wilson
Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck ff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled over the HWSP. So include the HWSP in the engin

[Intel-gfx] [PATCH v4] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Chris Wilson
Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck ff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled over the HWSP. So include the HWSP in the engin

[Intel-gfx] [PATCH 2/3] drm/i915: Reinitialize sink scrambling/TMDS clock ratio on HPD

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä The LG 4k TV I have doesn't deassert HPD when I turn the TV off, but when I turn it back on it will pulse the HPD line. By that time it has forgotten everything we told it about scrambling and the clock ratio. Hence if we want to get a picture out if it again we have to tell i

[Intel-gfx] [PATCH 3/3] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Doing link reatrining from the short pulse handler is problematic since that might introduce deadlocks with MST sideband processing. Currently we don't retrain MST links from this code, but we want to change that. So better to move the entire thing to the hotplug work. We can

[Intel-gfx] [PATCH 1/3] drm/i915: Split encoder->hot_plug() into pre and post variants

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä During hpd processing we may want to do things both before and after the display detection. To that end split the encoder->hot_plug() hooks. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_drv.h | 3 ++- drivers/gpu/drm/i915/intel_hotplug.c | 6 -- drive

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Show HWSP in intel_engine_dump() (rev3)

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Show HWSP in intel_engine_dump() (rev3) URL : https://patchwork.freedesktop.org/series/35724/ State : success == Summary == Series 35724v3 drm/i915: Show HWSP in intel_engine_dump() https://patchwork.freedesktop.org/api/1.0/series/35724/revisions/3/mbox/

Re: [Intel-gfx] [PATCH v4] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Tvrtko Ursulin
On 22/12/2017 18:25, Chris Wilson wrote: Looking at a CI failure with an ominous line of [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck ff6b [6016 ms], inflight 118 with no apparent cause for the seqno to be negative, left me wondering if someone had scribbled ove

Re: [Intel-gfx] [PATCH v4] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Chris Wilson
Quoting Tvrtko Ursulin (2017-12-22 18:52:29) > > On 22/12/2017 18:25, Chris Wilson wrote: > > Looking at a CI failure with an ominous line of > > [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck > > ff6b [6016 ms], inflight 118 > > with no apparent cause for the seqno

Re: [Intel-gfx] [PATCH v4] drm/i915: Show HWSP in intel_engine_dump()

2017-12-22 Thread Chris Wilson
Quoting Chris Wilson (2017-12-22 19:00:24) > Quoting Tvrtko Ursulin (2017-12-22 18:52:29) > > > > On 22/12/2017 18:25, Chris Wilson wrote: > > > Looking at a CI failure with an ominous line of > > > [ 362.550715] hangcheck current seqno ff6b, last ff8c, hangcheck > > > ff6b [6016 ms]

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Show HWSP in intel_engine_dump() (rev2)

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Show HWSP in intel_engine_dump() (rev2) URL : https://patchwork.freedesktop.org/series/35724/ State : warning == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> INCOMPLETE (shard-hsw) fdo#1

[Intel-gfx] [PATCH v2 0/8] drm/i915: Fix up the CCS code

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Here's a rebased series of the remaining CCS patches. Apart from the rebase and some commit message changes nothing has changed. Ville Syrjälä (8): drm/i915: Add a comment exlaining CCS hsub/vsub drm/i915: Nuke a pointless unreachable() drm/i915: Add the missing Y/Yf mo

[Intel-gfx] [PATCH 2/8] drm/i915: Nuke a pointless unreachable()

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä The unreachable() is very much unreachable and the compiler knows that, so there's no point in having it. Cc: Ben Widawsky Cc: Jason Ekstrand Cc: Daniel Stone Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 2 -- 1 file changed, 2 deletions(-) di

[Intel-gfx] [PATCH 4/8] drm/i915: Clean up the sprite modifier checks

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Split the g4x and snb cases into separate functions to match how we deal with all other platforms. Also sort the switch cases to match the format lists we've declared earlier, to ease comparisons. Cc: Ben Widawsky Cc: Jason Ekstrand Cc: Daniel Stone Signed-off-by: Ville Sy

[Intel-gfx] [PATCH 1/8] drm/i915: Add a comment exlaining CCS hsub/vsub

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Let's document why we claim hsub==8,vsub==16 for CCS even though the memory layout would suggest that we use 16x8 instead. Cc: Daniel Vetter Cc: Ben Widawsky Cc: Jason Ekstrand Cc: Daniel Stone Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 7 ++

[Intel-gfx] [PATCH v2 3/8] drm/i915: Add the missing Y/Yf modifiers for SKL+ sprites

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Y/Yf were dropped out from the SKL+ sprite modifier list on account of some watermark issues Daniel Stone was having. My subsequent testing seemed to indicate that things work better now, so add the modifiers back in. v2: Update the commit message with a better explanation C

[Intel-gfx] [PATCH 8/8] drm/i915: Remove the pipe/plane ID checks from skl_check_ccs_aux_surface()

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä The core now checks that the plane supports the fb's format+modifier combination, so we can drop the related checks from skl_check_ccs_aux_surface(). These checks were specific to SKL/KBL/BXT anyway. Cc: Ben Widawsky Cc: Jason Ekstrand Cc: Daniel Stone Signed-off-by: Ville

[Intel-gfx] [PATCH 6/8] drm/i915: Allow up to 32KB stride on SKL+ "sprites"

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä SKL+ "sprites" no longer have 16KB max stride limit that earlier platforms had. Bump up the limit to 32KB. Cc: Ben Widawsky Cc: Jason Ekstrand Cc: Daniel Stone Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_sprite.c | 3 ++- 1 file changed, 2 insertions(+),

[Intel-gfx] [PATCH 5/8] drm/i915: Add CCS capability for sprites

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Allow sprites to scan out compressed framebuffers. Since different platforms have a different set of planes that support CCS let's add a small helper to determine whether a specific plane supports CCS or not. Currently that information is spread around in many places, and not

[Intel-gfx] [PATCH 7/8] drm: Check that the plane supports the request format+modifier combo

2017-12-22 Thread Ville Syrjala
From: Ville Syrjälä Currently we only check that the plane supports the pixel format of the fb we're about to feed to it. Extend it to check also the modifier, and more specifically that the combination of the format and modifier is supported. Cc: dri-de...@lists.freedesktop.org Cc: Ben Widawsky

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Show HWSP in intel_engine_dump() (rev4)

2017-12-22 Thread Patchwork
== Series Details == Series: drm/i915: Show HWSP in intel_engine_dump() (rev4) URL : https://patchwork.freedesktop.org/series/35724/ State : failure == Summary == Applying: drm/i915: Show HWSP in intel_engine_dump() error: Failed to merge in the changes. Using index info to reconstruct a base

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Split encoder->hot_plug() into pre and post variants

2017-12-22 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Split encoder->hot_plug() into pre and post variants URL : https://patchwork.freedesktop.org/series/35732/ State : failure == Summary == Series 35732v1 series starting with [1/3] drm/i915: Split encoder->hot_plug() into pre an

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