== Series Details ==
Series: GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev5)
URL : https://patchwork.freedesktop.org/series/30802/
State : warning
== Summary ==
Series 30802v5 GEM/GuC Suspend/Resume/Reset fixes and restructuring
https://patchwork.freedesktop.org/api/1.0/series/3080
On Wed, 27 Sep 2017, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> If we store the platform as a bitmask, and convert the
> IS_PLATFORM macro to use it, we allow the compiler to
> merge the IS_PLATFORM(a) || IS_PLATFORM(b) || ... checks
> into a single conditional.
>
> As a secondary benefit t
On 9/28/2017 12:41 PM, Patchwork wrote:
== Series Details ==
Series: GEM/GuC Suspend/Resume/Reset fixes and restructuring (rev5)
URL : https://patchwork.freedesktop.org/series/30802/
State : warning
== Summary ==
Series 30802v5 GEM/GuC Suspend/Resume/Reset fixes and restructuring
https://p
This fixes my issue with GLK+MIPI/DSI when running IGT test
kms_frontbuffer_tracking --r basic
Tested-by: Mika Kahola
On Wed, 2017-09-27 at 17:20 -0700, Rodrigo Vivi wrote:
> One of the differences I spotted for GEN8+ platforms when
> compared to older platforms is that spec for BDW+ includes
>
While technically CHV isn't DDI, we do look at the VBT based DDI port
info for HDMI DDC pin and DP AUX channel. (We call these "alternate",
but they're really just something that aren't platform defaults.)
In commit e4ab73a13291 ("drm/i915: Respect alternate_ddc_pin for all DDI
ports") Ville write
Early return on failures. Rename the variable for later merging with
parse_device_mappings().
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 34 --
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.
More VBT parsing fixes and refactoring.
BR,
Jani.
Jani Nikula (8):
drm/i915/bios: parse DDI ports also for CHV for HDMI DDC pin and DP
AUX channel
drm/i915/bios: refactor parse general definitions
drm/i915/bios: don't initialize fields based on vbt version
drm/i915/bios: remove an un
In theory, these might clobber information for older VBT versions.
We might have to store the BDB version for later parsing, but currently
all code accessing these fields will only use them on newer platforms
with new enough BDB versions.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/inte
Prepare for merging parse_device_mapping() into
parse_general_definitions(). No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i91
Hint that you're not supposed to look at VBT in these functions.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index
We parse and store the child devices in
parse_general_definitions(). There is no need to parse the VBT block
again for SDVO device mapping. Do the same as we do in
parse_ddi_ports().
We no longer have access to child device size at this stage, but we also
don't need to worry about reading past the
They're both parsing the same block, and there's no need for them to be
split. The former also benefits from the range checks in the latter.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 48 +--
1 file changed, 16 insertions(+), 32 deletio
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c
b/drivers/gpu/drm/i915/intel_bios.c
index d0fedac0322f..9cfe89eed501 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++
On Wed, Sep 27, 2017 at 03:34:15PM -0300, Gabriel Krisman Bertazi wrote:
> display->n_pipes is zero-indexed, so N returned in
> igt_display_get_n_pipes is already not a valid pipe. This patch
> prevents kms_ccs from going nuts when testing the first unxesting pipe.
On Wed, Sep 27, 2017 at 11:37:33AM -0700, Eric Anholt wrote:
> Signed-off-by: Eric Anholt
For the series:
Reviewed-by: Petri Latvala
> ---
> benchmarks/prime_lookup.c | 2 +-
> tests/gem_exec_reuse.c| 3 ++-
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/benchmarks
On Wed, Sep 27, 2017 at 04:08:27PM -0700, James Ausmus wrote:
> Some distros (such as Gentoo) are removing the include of
> sys/sysmacros.h from sys/types.h. Explicitly include sysmacros.h in
> files where we use the minor() and major() functions.
>
> Signed-off-by: James Ausmus
Reviewed-by: Pet
== Series Details ==
Series: drm/i915/bios: VBT parsing fixes and cleanups
URL : https://patchwork.freedesktop.org/series/31051/
State : success
== Summary ==
Series 31051v1 drm/i915/bios: VBT parsing fixes and cleanups
https://patchwork.freedesktop.org/api/1.0/series/31051/revisions/1/mbox/
Quoting Tvrtko Ursulin (2017-09-28 07:53:56)
>
> On 25/09/2017 21:26, Chris Wilson wrote:
> > Signed-off-by: Chris Wilson
> > ---
> > benchmarks/gem_busy.c | 73
> > ++-
> > 1 file changed, 72 insertions(+), 1 deletion(-)
> >
> > diff --git a/b
Thanks for the review Michal. Will update as suggested.
On 9/21/2017 8:42 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:41:37 +0200, Sagar Arun Kamble
wrote:
Input string parsing used in CRC control parameter parsing is generic
and can be reused for other debugfs interfaces. Hence name
Thank you Radek, Ewelina for the reviews.
On 9/26/2017 1:11 PM, Ewelina Musial wrote:
On Tue, Sep 19, 2017 at 11:11:44PM +0530, Sagar Arun Kamble wrote:
This function gives the status of RC6, whether disabled or if
enabled then which state. intel_enable_rc6 will be used for
enabling RC6 in the
On Wed, Sep 27, 2017 at 04:44:37PM +, Chris Wilson wrote:
> With preemption, we will want to "unsubmit" a request, taking it back
> from the hw and returning it to the priority sorted execution list. In
> order to know where to insert it into that list, we need to remember
> its adjust priority
On 28/09/2017 10:07, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2017-09-28 07:53:56)
On 25/09/2017 21:26, Chris Wilson wrote:
Signed-off-by: Chris Wilson
---
benchmarks/gem_busy.c | 73
++-
1 file changed, 72 insertions(+), 1 deletion(-)
On 9/21/2017 6:22 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:41:51 +0200, Sagar Arun Kamble
wrote:
From: Tom O'Rourke
The SLPC interface is dependent on GuC version.
Only GuC versions known to be compatible are supported here.
SLPC with GuC firmware v9 is supported with this seri
Quoting Chris Wilson (2017-09-12 21:10:25)
> Dump debugfs/i915_error_state to the debug channel if we detect an ERROR
> uevent. This poses a few problems, not least that it is the auxiliary
> process doing the dumping (so the output may be interleaved with the
> test, but considering a hang occurre
On 9/21/2017 6:30 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:41:52 +0200, Sagar Arun Kamble
wrote:
SLPC operates based on parameters setup in shared data between
i915 and GuC SLPC. This is to be created/initialized in intel_slpc_init.
From there onwards i915 can control the SLPC ope
Quoting Michał Winiarski (2017-09-28 10:14:47)
> On Wed, Sep 27, 2017 at 04:44:37PM +, Chris Wilson wrote:
> > With preemption, we will want to "unsubmit" a request, taking it back
> > from the hw and returning it to the priority sorted execution list. In
> > order to know where to insert it in
Quoting Chris Wilson (2017-09-28 10:31:00)
> Quoting Michał Winiarski (2017-09-28 10:14:47)
> > Please, add the same behavior to GuC submission path.
>
> Why?
To expand on this, there is a large negative cost in removing the
dfs optimisation. What benefit does it bring to the execution when there
Stealing the thread for another gem_workarounds conundrum.
After a reset, we lose the RING_FORCE_TO_NONPRIV registers. If they
where in the context image as we presumed, the values would be retained
and they can be read back from before reset, so it's not the case of
write-only register!
So are t
On 9/21/2017 6:44 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:41:54 +0200, Sagar Arun Kamble
wrote:
Communication with SLPC is via Host to GuC interrupt through
shared data and parameters. This patch defines the structure of
shared data, parameters, data structure to be passed as inp
Quoting Tvrtko Ursulin (2017-09-28 10:16:58)
>
> On 28/09/2017 10:07, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2017-09-28 07:53:56)
> >>
> >> On 25/09/2017 21:26, Chris Wilson wrote:
> >>> Signed-off-by: Chris Wilson
> >>> ---
> >>>benchmarks/gem_busy.c | 73
> >>>
== Series Details ==
Series: drm/i915/bios: VBT parsing fixes and cleanups
URL : https://patchwork.freedesktop.org/series/31051/
State : success
== Summary ==
Test perf:
Subgroup blocking:
pass -> FAIL (shard-hsw) fdo#102252
Test kms_cursor_legacy:
S
On 9/21/2017 7:17 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:41:56 +0200, Sagar Arun Kamble
wrote:
SLPC behavior can be changed through set of parameters.
These parameters can be updated and queried from i915 though
Host to GuC SLPC events. This patch adds parameter update
events fo
Only init / reset the display interrupts during power well enabling /
disabling if the i915 interrupts are enabled. So far we did the
init / reset during driver loading / resuming too, where
initialization / enabling of the i915 interrupts happens only at a later
point. This didn't cause a problem
On 9/21/2017 7:36 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:41:57 +0200, Sagar Arun Kamble
wrote:
Send host2guc SLPC reset event to GuC post GuC load.
Post this, i915 can ascertain if SLPC has started running successfully
through shared data. This check is done during intel_init_gt
On Mon, 2017-09-11 at 09:41 +0100, Chris Wilson wrote:
> If an asynchronous wait on a foriegn fence, we print a warning
"foreign"
Reviewed-by: Joonas Lahtinen
Regards, Joonas
> indicating which fence was not signaled. As i915_sw_fences become more
> common, include the debug hint (the symbol-
On Tue, Sep 12, 2017 at 09:10:25PM +0100, Chris Wilson wrote:
> Dump debugfs/i915_error_state to the debug channel if we detect an ERROR
> uevent. This poses a few problems, not least that it is the auxiliary
> process doing the dumping (so the output may be interleaved with the
> test, but conside
On Mon, 2017-09-11 at 09:41 +0100, Chris Wilson wrote:
> If a worker requeues itself, it may switch to a different kworker pool,
> which flush_work() considers as complete. To be strict, we then need to
> keep flushing the work until it is no longer pending.
>
> References: https://bugs.freedeskto
Quoting Imre Deak (2017-09-28 11:06:24)
> Only init / reset the display interrupts during power well enabling /
> disabling if the i915 interrupts are enabled. So far we did the
> init / reset during driver loading / resuming too, where
> initialization / enabling of the i915 interrupts happens onl
On 9/21/2017 8:37 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:42:00 +0200, Sagar Arun Kamble
wrote:
This patch adds two debugfs interfaces:
1. i915_slpc_paramlist: List of all parameters that Host can configure.
Currently listing id and description of each.
2. i915_slpc_param_ctl:
On 9/21/2017 8:43 PM, Michal Wajdeczko wrote:
On Tue, 19 Sep 2017 19:42:02 +0200, Sagar Arun Kamble
wrote:
From: Tom O'Rourke
i915_slpc_info shows the contents of SLPC shared data
parsed into text format.
v1: Reformat slpc info (Radek)
squashed query task state info
in slpc info,
On Mon, 2017-09-11 at 09:41 +0100, Chris Wilson wrote:
> Acquire the fence register for the iomap in i915_vma_pin_iomap() on
> behalf of the caller.
>
> We probably want for the caller to specify whether the fence should be
> pinned for their usage, but at the moment all callers do want the
> asso
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
Changes since v1:
- Remove sp
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
This has been the most involv
== Series Details ==
Series: drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are
enabled
URL : https://patchwork.freedesktop.org/series/31058/
State : warning
== Summary ==
Series 31058v1 drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs
are enabled
https://patc
Hi Dave,
Here's the latest from -misc-fixes. It's been a while since the last one due to
plumbers and XDC. I'll be out of office next week, but will do my best to send
-fixes amongst moving boxes and chaos.
drm-misc-fixes-2017-09-28-1:
Driver Changes:
- qxl: fix primary surface and fb unpinning (G
On Mon, 2017-09-25 at 09:40 +0100, Chris Wilson wrote:
> Quoting Chris Wilson (2017-09-19 13:43:41)
> > Quoting Chris Wilson (2017-09-11 09:41:34)
> > > If the caller says that he doesn't want to evict any other faulting
> > > vma, honour that flag. The logic was used in evict_something, but not
>
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev4)
URL : https://patchwork.freedesktop.org/series/30903/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule:
On Thu, Sep 28, 2017 at 04:20:29AM +, Rodrigo Vivi wrote:
> On Wed, Sep 27, 2017 at 5:14 AM David Weinehall <
> david.weineh...@linux.intel.com> wrote:
>
> > On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote:
> > > a long time ago I had agreed with Daniel that we would only add new
In the future I want to allow tests to commit more properties,
but for this to work I have to fix all properties to work better
with atomic commit. Instead of special casing each
property make a bitmask for all property changed flags, and try to
commit all properties.
Changes since v1:
- Remove sp
Quoting Chris Wilson (2017-09-27 17:44:37)
> With preemption, we will want to "unsubmit" a request, taking it back
> from the hw and returning it to the priority sorted execution list. In
> order to know where to insert it into that list, we need to remember
> its adjust priority (which may change
Using vgem as our cork for building the request queue limits us to 10s
of setup (or else the fence autoexpires and we start executing too
early). Add timeouts to the setup loops and SKIP if we cannot establish
the workload within 10s, the machine and driver is too slow to evaluate
the expected resu
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev5)
URL : https://patchwork.freedesktop.org/series/30903/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule:
On Wed, 2017-09-27 at 17:20 -0700, Rodrigo Vivi wrote:
> One of the differences I spotted for GEN8+ platforms when
> compared to older platforms is that spec for BDW+ includes
> this sentence:
>
> "The first CRC done indication after CRC is first enabled is
> from only a partial frame, so it will
Quoting Sagar Arun Kamble (2017-09-27 10:30:31)
> These changes are preparation to handle GuC suspend/resume. Prepared
> helper i915_gem_runtime_resume to reinitialize suspended gem setup.
> Returning status from i915_gem_runtime_suspend and i915_gem_resume.
> This will be placeholder for handling
Quoting Sagar Arun Kamble (2017-09-27 10:30:32)
> @@ -4607,13 +4611,14 @@ int i915_gem_resume(struct drm_i915_private *dev_priv)
>
> mutex_lock(&dev->struct_mutex);
> i915_gem_restore_gtt_mappings(dev_priv);
> + i915_gem_restore_fences(dev_priv);
Seconded Michal's suggestio
== Series Details ==
Series: drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are
enabled
URL : https://patchwork.freedesktop.org/series/31058/
State : warning
== Summary ==
Series 31058v1 drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs
are enabled
https://patc
Quoting Sagar Arun Kamble (2017-09-27 10:30:33)
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 174a7c5..f79646b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1698,6 +1698,16 @@ static int i915_drm_resume(struct
Quoting Sagar Arun Kamble (2017-09-27 10:30:36)
> We should check dependent state setup by enable path to run disable path
> and not depend on the user parameters. i915_guc_submission_disable now
> checks if execbuf client is setup and then goes ahead with disabling.
>
> Suggested-by: Chris Wilson
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev4)
URL : https://patchwork.freedesktop.org/series/30903/
State : failure
== Summary ==
Test gem_close_race:
Subgroup basic-process:
skip -> PASS (shard-hsw)
Test kms_fro
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> In the future, we will want to unwind requests following a preemption
> point. This requires the same steps as for unwinding upon a reset, so
> extract the existing code to a separate function for later use.
>
> Signed-off-by: Chris Wilson
On 27/09/2017 18:07, Patchwork wrote:
== Series Details ==
Series: drm/i915: Allow optimized platform checks
URL : https://patchwork.freedesktop.org/series/30982/
State : success
== Summary ==
Series 30982v1 drm/i915: Allow optimized platform checks
https://patchwork.freedesktop.org/api/1.0
Quoting Sagar Arun Kamble (2017-09-27 10:30:39)
> -void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
> +void intel_uc_cleanup(struct drm_i915_private *dev_priv)
> {
> guc_free_load_err_log(&dev_priv->guc);
>
> if (!i915_modparams.enable_guc_loading)
> retur
On 9/28/2017 5:15 PM, Chris Wilson wrote:
Quoting Sagar Arun Kamble (2017-09-27 10:30:33)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 174a7c5..f79646b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1698,6 +1698,16
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> From: Michał Winiarski
>
> Avoid the repeated rbtree lookup for each request as we unwind them by
> tracking the last priolist.
>
> v2: Fix up my unhelpful suggestion of using default_priolist.
>
> Signed-off-by: Michał Winiarski
> Signe
On Thu, Sep 28, 2017 at 11:18:27AM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2017-09-28 11:06:24)
> > Only init / reset the display interrupts during power well enabling /
> > disabling if the i915 interrupts are enabled. So far we did the
> > init / reset during driver loading / resuming too
Quoting Imre Deak (2017-09-28 12:59:16)
> On Thu, Sep 28, 2017 at 11:18:27AM +0100, Chris Wilson wrote:
> > Quoting Imre Deak (2017-09-28 11:06:24)
> > > Only init / reset the display interrupts during power well enabling /
> > > disabling if the i915 interrupts are enabled. So far we did the
> > >
== Series Details ==
Series: igt/gem_exec_schedule: Detect too slow setup in deep-*
URL : https://patchwork.freedesktop.org/series/31061/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule: Ignore
Quoting Joonas Lahtinen (2017-09-28 12:59:01)
> On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> > From: Michał Winiarski
> >
> > Avoid the repeated rbtree lookup for each request as we unwind them by
> > tracking the last priolist.
> >
> > v2: Fix up my unhelpful suggestion of using def
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> From: Jeff McGee
>
> The WA applies to all production Gen9 and requires both enabling and
> whitelisting of the per-context preemption control register.
>
> Signed-off-by: Jeff McGee
> Signed-off-by: Michał Winiarski
> Signed-off-by: Chr
On Thu, Sep 28, 2017 at 01:01:34PM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2017-09-28 12:59:16)
> > On Thu, Sep 28, 2017 at 11:18:27AM +0100, Chris Wilson wrote:
> > > Quoting Imre Deak (2017-09-28 11:06:24)
> > > > Only init / reset the display interrupts during power well enabling /
> > >
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> From: Michał Winiarski
>
> Supporting fine-granularity preemption levels may require changes in
> userspace batch buffer programming. Therefore, we need to fallback to
> safe default values, rather that use hardware defaults. Userspace is
>
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> Let the listener know that the context we just scheduled out was not
> complete, and will be scheduled back in at a later point.
>
> v2: Handle CONTEXT_STATUS_PREEMPTED in gvt by aliasing it to
> CONTEXT_STATUS_OUT for the moment, gvt can ex
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> Add another perma-pinned context for using for preemption at any time.
> We cannot just reuse the existing kernel context, as first and foremost
> we need to ensure that we can preempt the kernel context itself, so
> require a distinct contex
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev5)
URL : https://patchwork.freedesktop.org/series/30903/
State : failure
== Summary ==
Test gem_exec_schedule:
Subgroup pi-ringfull-blt:
pass -> SKIP (shard-hsw)
Quoting Joonas Lahtinen (2017-09-28 13:32:09)
> On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> > Add another perma-pinned context for using for preemption at any time.
> > We cannot just reuse the existing kernel context, as first and foremost
> > we need to ensure that we can preempt the
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> Move the re-enabling of MI arbitration from a per-bb w/a buffer to the
> emission of the batch buffer itself.
>
> Signed-off-by: Chris Wilson
There's something about 64b addressing mode requiring disabling ARB
during the BB_START on pre-BD
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> With preemption, we will want to "unsubmit" a request, taking it back
> from the hw and returning it to the priority sorted execution list. In
> order to know where to insert it into that list, we need to remember
> its adjust priority (which
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev4)
URL : https://patchwork.freedesktop.org/series/30903/
State : failure
== Summary ==
Test kms_cursor_legacy:
Subgroup cursorA-vs-flipA-atomic-transitions:
fail -> PASS
== Series Details ==
Series: lib/igt_kms: Convert properties to be more atomic-like. (rev5)
URL : https://patchwork.freedesktop.org/series/30903/
State : failure
== Summary ==
Test gem_eio:
Subgroup in-flight-contexts:
dmesg-warn -> PASS (shard-hsw) fdo#102886 +1
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> In the next few patches, we wish to enable different features for the
> scheduler, some which may subtlety change ABI (e.g. allow requests to be
> reordered under different circumstances). So we need to make sure
> userspace is cognizant of t
Quoting Joonas Lahtinen (2017-09-28 14:07:35)
> On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> > In the next few patches, we wish to enable different features for the
> > scheduler, some which may subtlety change ABI (e.g. allow requests to be
> > reordered under different circumstances).
On 9/28/2017 5:25 PM, Chris Wilson wrote:
Quoting Sagar Arun Kamble (2017-09-27 10:30:39)
-void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
+void intel_uc_cleanup(struct drm_i915_private *dev_priv)
{
guc_free_load_err_log(&dev_priv->guc);
if (!i915_modparams.enab
On 9/28/2017 5:17 PM, Chris Wilson wrote:
Quoting Sagar Arun Kamble (2017-09-27 10:30:36)
We should check dependent state setup by enable path to run disable path
and not depend on the user parameters. i915_guc_submission_disable now
checks if execbuf client is setup and then goes ahead with d
On 9/28/2017 5:10 PM, Chris Wilson wrote:
Quoting Sagar Arun Kamble (2017-09-27 10:30:32)
@@ -4607,13 +4611,14 @@ int i915_gem_resume(struct drm_i915_private *dev_priv)
mutex_lock(&dev->struct_mutex);
i915_gem_restore_gtt_mappings(dev_priv);
+ i915_gem_restore_fence
== Series Details ==
Series: igt/gem_exec_schedule: Detect too slow setup in deep-*
URL : https://patchwork.freedesktop.org/series/31061/
State : success
== Summary ==
Test gem_eio:
Subgroup in-flight:
pass -> DMESG-WARN (shard-hsw) fdo#102886 +2
Test gem_exec_rel
On Thu, Sep 28, 2017 at 11:09:14AM +, Chris Wilson wrote:
> Quoting Chris Wilson (2017-09-27 17:44:37)
> > With preemption, we will want to "unsubmit" a request, taking it back
> > from the hw and returning it to the priority sorted execution list. In
> > order to know where to insert it into t
On 9/28/2017 5:07 PM, Chris Wilson wrote:
Quoting Sagar Arun Kamble (2017-09-27 10:30:31)
These changes are preparation to handle GuC suspend/resume. Prepared
helper i915_gem_runtime_resume to reinitialize suspended gem setup.
Returning status from i915_gem_runtime_suspend and i915_gem_resume.
We have no means to check write only registers as
this would need access through context image. For now we
know that cnl has a one such register, 0xe5f0 which is used
to set WaForceContextSaveRestoreNonCoherent:cnl. By inspecting
the context image without and with workaround applied:
0xa840: 0
Quoting Mika Kuoppala (2017-09-28 14:45:06)
> We have no means to check write only registers as
> this would need access through context image. For now we
> know that cnl has a one such register, 0xe5f0 which is used
> to set WaForceContextSaveRestoreNonCoherent:cnl. By inspecting
> the context ima
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> When we write to ELSP, it triggers a context preemption at the earliest
> arbitration point (3DPRIMITIVE, some PIPECONTROLs, a few other
> operations and the explicit MI_ARB_CHECK). If this is to the same
> context, it triggers a LITE_RESTORE
On Thu, Sep 28, 2017 at 04:45:06PM +0300, Mika Kuoppala wrote:
> We have no means to check write only registers as
> this would need access through context image. For now we
> know that cnl has a one such register, 0xe5f0 which is used
> to set WaForceContextSaveRestoreNonCoherent:cnl. By inspectin
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> Use a priority stored in the context as the initial value when
> submitting a request. This allows us to change the default priority on a
> per-context basis, allowing different contexts to be favoured with GPU
> time at the expense of lower
On Thu, 2017-09-28 at 10:09 +0800, Xiaolin Zhang wrote:
> if vgpu active, the page table entry should be initialized after
> allocation and then the hypersivor can ping pages succesuffly,
> otherwise hypervisor will ping pages failed and the host will print
> a lot of annoying errors such as “ERROR
== Series Details ==
Series: tests/gem_workarounds: Skip write only registers
URL : https://patchwork.freedesktop.org/series/31073/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
2885b10f99b4beeb046e75af8b8488c229f629d3 igt/gem_exec_schedule: Ignore
set-pr
On Wed, 2017-09-27 at 19:47 +0100, Chris Wilson wrote:
> Michal wants to limit machines that can do preemption, which means that
> we no longer can assume that if we have a scheduler for execbuf, that
> implies we have preemption.
>
> v2: Try a capability mask instead
> v3: Pretty print the caps.
I recently tried to update the gen9 feature matrix and to my unpleasant
surprise found that Kabylake still acted like Broadwell and didn't
enable the feature. This is because kbl/cfl are inheriting their
defaults from Broadwell and not Skylake.
Signed-off-by: Chris Wilson
Cc: Rodrigo Vivi
Cc: Pa
We have no means to check write only registers as
this would need access through context image. For now we
know that cnl has a one such register, 0xe5f0 which is used
to set WaForceContextSaveRestoreNonCoherent:cnl. By inspecting
the context image without and with workaround applied:
0xa840: 0
On Thu, Sep 28, 2017 at 06:00:03PM +0300, Mika Kuoppala wrote:
> We have no means to check write only registers as
> this would need access through context image. For now we
> know that cnl has a one such register, 0xe5f0 which is used
> to set WaForceContextSaveRestoreNonCoherent:cnl. By inspectin
Signed-off-by: Petri Latvala
---
tests/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/meson.build b/tests/meson.build
index 1c619179..53d02d13 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -152,6 +152,7 @@ test_progs = [
'kms_3d',
'kms_addfb_basi
On Thu, Sep 28, 2017 at 06:10:48PM +0300, Petri Latvala wrote:
> Signed-off-by: Petri Latvala
> ---
> tests/meson.build | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/meson.build b/tests/meson.build
> index 1c619179..53d02d13 100644
> --- a/tests/meson.build
> +++ b/tests/meson.b
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