== Series Details ==
Series: tests/tools_test: Make sure l3_parity is supported
URL : https://patchwork.freedesktop.org/series/29926/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
4a1c8daff2005e2cbfe980d63bc0a0fb09cb017d igt/gem_ringfill: Prime execbuf bef
== Series Details ==
Series: tests/tools_test: Make sure l3_parity is supported
URL : https://patchwork.freedesktop.org/series/29926/
State : failure
== Summary ==
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-hsw) fdo#99912
Test kms_flip:
Su
On Wed, 06 Sep 2017, "Vivi, Rodrigo" wrote:
> On Wed, 2017-09-06 at 20:57 +0100, Chris Wilson wrote:
>> Quoting Rodrigo Vivi (2017-09-06 20:51:37)
>> > Instead of limiting the range with this unusual GEN_RANGE
>> > let's assume following platforms would use same scheme
>> > unless stated otherwise
On 07/09/2017 01:37, Anusha Srivatsa wrote:
Calculate the time that GuC takes to load.
This information could be very useful in
determining if GuC is taking unreasonably long time
to load in a certain platforms.
Do we need this in debugfs or a DRM_NOTE or something would be
sufficient if the
== Series Details ==
Series: series starting with [1/5] lib/scatterlist: Fix offset type in
sg_alloc_table_from_pages (rev6)
URL : https://patchwork.freedesktop.org/series/28151/
State : success
== Summary ==
Series 28151v6 series starting with [1/5] lib/scatterlist: Fix offset type in
sg_al
Oscar Mateo writes:
> Hey Mika,
>
> Regarding this patch: is there a consensus on where is the most
> appropriate place to apply workarounds? My understanding is that
> per-context workarounds (WAS_SET_BIT, etc...) go in
> xxx_init_workarounds, while those that are needed only during
> initia
If the user bypasses i915 and accesses mmio directly, that easily
confuses our automatic mmio debugging (any error we then detect is
likely to be as a result of the user). Since we expect userspace to open
debugfs/i915_forcewake_user if i915.ko is loaded and they want mmio
access, that makes the op
On Mon, Sep 04, 2017 at 12:48:33PM +0200, Maarten Lankhorst wrote:
> The next commit removes the wait for flip_done in in
> drm_atomic_helper_commit_cleanup_done, but we need it for the tests
> to pass. Instead of using complicated vblank tracking which ends
> up being ignored anyway, call the corr
On Mon, Sep 04, 2017 at 12:48:36PM +0200, Maarten Lankhorst wrote:
> This will allow code to do x->commit = drm_crtc_commit_get(commit),
> making it clearer where references are used.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_atomic_helper.c |
This is follow up series based on reviews for
https://patchwork.freedesktop.org/series/28104/
Major change is assignment of samples at the time of request submission
onto HW instead of assigning at user submission time. Restructured
patches to make some of the earlier code-heavy patches little lig
From: Sourab Gupta
This patch adds a new ctx getparam ioctl parameter, which can be used to
retrieve ctx unique id by userspace.
This can be used by userspace to map the OA reports received in the
i915 perf samples with their associated ctx's (The OA reports have the
hw ctx ID information embedd
From: Sourab Gupta
This patch introduces a framework to capture OA counter reports associated
with Render command stream. We can then associate the reports captured
through this mechanism with their corresponding context id's. This can be
further extended to associate any other metadata informati
From: Sourab Gupta
This patch exposes a new sample source field to userspace. This field can
be populated to specify the origin of the OA report.
Currently, the OA samples are being generated only periodically, and hence
there's only source flag enum definition right now, but there are other
mean
To allow opening CS perf streams for other engines, this patch
associates exclusive stream with each engine and correspondingly
updates the required fields per stream.
Signed-off-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/i915_drv.h | 26 +++--
drivers/gpu/drm/i915/i915_perf.c
From: Sourab Gupta
When there are no pending CS OA samples, flush the periodic OA samples
collected so far.
We can safely forward the periodic OA samples in the case we
have no pending CS samples, but we can't do so in the case we have
pending CS samples, since we don't know what the ordering be
From: Sourab Gupta
This patch enables userspace to specify tags (per workload), provided via
execbuffer ioctl, which could be added to OA reports, to help associate
reports with the corresponding workloads.
There may be multiple stages within a single context, from a userspace
perspective. An ab
From: Sourab Gupta
This patch introduces flags and adds support for having pid output with
the OA reports generated through the RCS commands.
When the stream is opened with pid sample type, the pid information is also
captured through the command stream samples and forwarded along with the
OA re
This patch enables to sample CTX ID corresponding to requests
being submitted on the engines through perf stream. OA report
already embed this information from Gen8+. For previous Gens
we can leverage value sampled from request->ctx->hw_id to
associate with OA reports.
v2: Updated stream->last_ctx
From: Sourab Gupta
With this patch, for RCS, timestamps and OA reports can be collected
together, and provided to userspace in separate sample fields. For other
engines, the capabilility to collect timestamps is added.
The thing to note is that, still only a single stream instance can be
opened
From: Sourab Gupta
The OA reports contain the least significant 32 bits of the gpu timestamp.
This patch enables retrieval of the timestamp field from OA reports, to
forward as 64 bit raw gpu timestamps in the perf samples.
Signed-off-by: Sourab Gupta
Signed-off-by: Sagar Arun Kamble
---
driv
From: Sourab Gupta
Considering how we don't currently give userspace control over the
OA buffer size and always configure a large 16MB buffer,
then a buffer overflow does anyway likely indicate that something
has gone quite badly wrong.
Here we set a status flag to detect overflow and inform use
From: Sourab Gupta
This adds support for populating the ctx id for the periodic OA reports
when requested through the corresponding property.
For Gen8, the OA reports itself have the ctx ID and it is the one
programmed into HW while submitting workloads. Thus it's retrieved from
reports itself.
From: Sourab Gupta
This patch ensures hrtimer is rescheduled immediately during cb by
doing async call to check for streams data availability.
Signed-off-by: Sourab Gupta
Signed-off-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/i915_perf.c | 15 +++
1 file changed, 11 insertions(
From: Sourab Gupta
This patch adds support for capturing MMIO register values through
i915 perf interface.
The userspace can request upto 8 MMIO register values to be dumped.
The addresses of these registers can be passed through the corresponding
property 'value' field while opening the stream.
Signed-off-by: Sagar Arun Kamble
---
tests/intel_perf_dapc.c | 76 +
1 file changed, 76 insertions(+)
diff --git a/tests/intel_perf_dapc.c b/tests/intel_perf_dapc.c
index 82cb8e6..afd49f4 100644
--- a/tests/intel_perf_dapc.c
+++ b/tests/intel_perf_
This tests different performance metrics being streamed by i915 driver.
This feature in i915 also referred as Driver Assisted Performance
Capture (DAPC) provides userspace an ability to sample the OA reports
at execbuf boundaries and associate other metadata like CTX ID, PID, TAG
with each sample.
This series implements set of testcases for verifying data sampled
through i915 perf/DAPC feature. It tests validity of association of
OA with correct engine/stream, ctx id, pid, tag, timestamps, mmio
samples w.r.t execbuf begin and end. It also adds a testcase to
verify concurrent operation of two
Signed-off-by: Sagar Arun Kamble
---
tests/intel_perf_dapc.c | 134
1 file changed, 134 insertions(+)
diff --git a/tests/intel_perf_dapc.c b/tests/intel_perf_dapc.c
index afd49f4..a9903fb 100644
--- a/tests/intel_perf_dapc.c
+++ b/tests/intel_perf
Signed-off-by: Sagar Arun Kamble
---
tests/intel_perf_dapc.c | 291
1 file changed, 291 insertions(+)
diff --git a/tests/intel_perf_dapc.c b/tests/intel_perf_dapc.c
index 1831a81..ac6f3d1 100644
--- a/tests/intel_perf_dapc.c
+++ b/tests/intel_perf
This subtest verifies that the CS perf samples contains
proper HW context ID as captured through CONTEXT_PARAM_HW_ID.
Signed-off-by: Sagar Arun Kamble
---
lib/ioctl_wrappers.h| 1 +
tests/intel_perf_dapc.c | 102 +++-
2 files changed, 101 inserti
Signed-off-by: Sagar Arun Kamble
---
tests/intel_perf_dapc.c | 211
1 file changed, 211 insertions(+)
diff --git a/tests/intel_perf_dapc.c b/tests/intel_perf_dapc.c
index ac6f3d1..356ec1f 100644
--- a/tests/intel_perf_dapc.c
+++ b/tests/intel_perf
Signed-off-by: Sagar Arun Kamble
---
tests/intel_perf_dapc.c | 75 +
1 file changed, 75 insertions(+)
diff --git a/tests/intel_perf_dapc.c b/tests/intel_perf_dapc.c
index a9903fb..1831a81 100644
--- a/tests/intel_perf_dapc.c
+++ b/tests/intel_perf_
On Mon, Sep 04, 2017 at 12:48:37PM +0200, Maarten Lankhorst wrote:
> Currently we neatly track the crtc state, but forget to look at
> plane/connector state.
>
> When doing a nonblocking modeset, immediately followed by a setprop
> before the modeset completes, the setprop will see the modesets ne
On Thu, Sep 07, 2017 at 09:49:02AM +0100, Tvrtko Ursulin wrote:
>
> On 07/09/2017 01:37, Anusha Srivatsa wrote:
> > Calculate the time that GuC takes to load.
> > This information could be very useful in
> > determining if GuC is taking unreasonably long time
> > to load in a certain platforms.
>
On 9/5/2017 8:24 PM, Michał Winiarski wrote:
On Fri, Sep 01, 2017 at 11:02:11AM +0530, Sagar Arun Kamble wrote:
Teardown of GuC HW/SW state was not properly done in unload path.
During unload, we can rely on intel_guc_reset_prepare being done
as part of i915_gem_suspend for disabling GuC inter
== Series Details ==
Series: drm/i915: Disable mmio debugging during user access
URL : https://patchwork.freedesktop.org/series/29935/
State : success
== Summary ==
Series 29935v1 drm/i915: Disable mmio debugging during user access
https://patchwork.freedesktop.org/api/1.0/series/29935/revisio
== Series Details ==
Series: series starting with [1/5] lib/scatterlist: Fix offset type in
sg_alloc_table_from_pages (rev6)
URL : https://patchwork.freedesktop.org/series/28151/
State : failure
== Summary ==
Test kms_flip:
Subgroup dpms-vs-vblank-race:
pass -> F
== Series Details ==
Series: i915 perf support for command stream based OA, GPU and workload metrics
capture (rev3)
URL : https://patchwork.freedesktop.org/series/28104/
State : success
== Summary ==
Series 28104v3 i915 perf support for command stream based OA, GPU and workload
metrics captu
On Wed, Sep 06, 2017 at 05:15:49PM -0700, Oscar Mateo wrote:
> Afaict, GEN9_GAMT_ECO_REG_RW_IA does not live in the context, so writing
> it on every context creation is overkill (and wrong).
>
> v2: Missing end parenthesis
Though there was a discussion whether this belongs in init_workarounds, o
Op 07-09-17 om 12:05 schreef Daniel Vetter:
> On Mon, Sep 04, 2017 at 12:48:37PM +0200, Maarten Lankhorst wrote:
>> Currently we neatly track the crtc state, but forget to look at
>> plane/connector state.
>>
>> When doing a nonblocking modeset, immediately followed by a setprop
>> before the modes
Op 05-09-17 om 15:35 schreef Mika Kahola:
> It appears that we cannot trust scanline counters when MIPI/DSI display is
> connected. In CI system this appears as flickering errors that randomly
> appear in test cases. To avoid this flickering, let's just silence atomic
> update failure in case with
On Thu, 2017-09-07 at 13:29 +0200, Maarten Lankhorst wrote:
> Op 05-09-17 om 15:35 schreef Mika Kahola:
> >
> > It appears that we cannot trust scanline counters when MIPI/DSI
> > display is
> > connected. In CI system this appears as flickering errors that
> > randomly
> > appear in test cases. T
On Thu, Sep 07, 2017 at 01:29:22PM +0200, Maarten Lankhorst wrote:
> Op 05-09-17 om 15:35 schreef Mika Kahola:
> > It appears that we cannot trust scanline counters when MIPI/DSI display is
> > connected. In CI system this appears as flickering errors that randomly
> > appear in test cases. To avoi
On Wed, Sep 06, 2017 at 02:51:10PM -0700, Oscar Mateo wrote:
>
>
> On 09/06/2017 02:43 PM, Chris Wilson wrote:
> > Quoting Oscar Mateo (2017-09-06 22:27:47)
> >>
> >> On 09/06/2017 02:19 PM, Chris Wilson wrote:
> >>> Quoting Oscar Mateo (2017-09-06 22:12:11)
> Afaict, GEN9_GAMT_ECO_REG_RW_IA
On Thu, Sep 07, 2017 at 01:29:22PM +0200, Maarten Lankhorst wrote:
> Op 05-09-17 om 15:35 schreef Mika Kahola:
> > It appears that we cannot trust scanline counters when MIPI/DSI display is
> > connected. In CI system this appears as flickering errors that randomly
> > appear in test cases. To avoi
Hi all,
Getting started with v4.15 features:
- Cannonlake workarounds (Rodrigo, Oscar)
- Infoframe refactoring and fixes to enable infoframes for DP (Ville)
- VBT definition updates (Jani)
- Sparse warning fixes (Ville, Chris)
- Crtc state usage fixes and cleanups (Ville)
- DP vswing, pre-emph a
== Series Details ==
Series: IGT Testcases for i915 DAPC feature
URL : https://patchwork.freedesktop.org/series/29940/
State : failure
== Summary ==
IGT patchset build failed on latest successful build
4a1c8daff2005e2cbfe980d63bc0a0fb09cb017d igt/gem_ringfill: Prime execbuf before
measuring r
Added comments in tricky places for better feature understanding.
Added IGT_TEST_DESCRIPTION and short description for non-obvious
subtests.
Changed name of 'magic' checkit() function to something meaningfull.
Changed junk struct and stuff array names.
Made some minor coding style changes.
Cc: Vin
On Tue, Sep 05, 2017 at 08:36:54AM +0100, Daniel Stone wrote:
> Hi Ville,
>
> On 4 September 2017 at 17:37, Ville Syrjälä
> wrote:
> > On Thu, Aug 31, 2017 at 04:52:15PM -0300, Gabriel Krisman Bertazi wrote:
> >> With this patch the new testcase igt@kms_ccs@pipe-X-invalid-ccs-offset
> >> succeeds
On Fri, Sep 01, 2017 at 11:02:09AM +0530, Sagar Arun Kamble wrote:
> Removed unnecessary intel_uc.h includes as it is present in i915_drv.h.
> Created intel_guc.c and intel_guc.h for placing GuC specific code.
> Created intel_huc.h to refer to HuC specific functions.
>
> v2: Prepared intel_uc_comm
On Thu, 2017-09-07 at 14:15 +0200, Katarzyna Dec wrote:
> Added comments in tricky places for better feature understanding.
> Added IGT_TEST_DESCRIPTION and short description for non-obvious
> subtests.
> Changed name of 'magic' checkit() function to something meaningfull.
> Changed junk struct and
On Tue, Sep 05, 2017 at 05:04:35PM -0700, Belgaumkar, Vinay wrote:
>
>
> On 9/1/2017 4:55 AM, Arkadiusz Hiler wrote:
> > On Thu, Aug 31, 2017 at 02:33:23PM -0700, Vinay Belgaumkar wrote:
> > > Added the missing IGT_TEST_DESCRIPTION and some subtest
> > > descriptions. Trying to establish a method
== Series Details ==
Series: pm_rps: [RFC] RPS tests documentation update
URL : https://patchwork.freedesktop.org/series/29947/
State : failure
== Summary ==
IGT patchset tested on top of latest successful build
4a1c8daff2005e2cbfe980d63bc0a0fb09cb017d igt/gem_ringfill: Prime execbuf before
m
Op 08-08-17 om 14:51 schreef Mahesh Kumar:
> Hi,
>> +
>> +struct {
>> +uint16_t plane;
> should this also be named as plane_wm, because it's again wm with SR.
> just a nitpick but not a stopper.
Ack, will change (and for the other patches in this series too).
>
>> @@ -591,6 +600,9 @@
== Series Details ==
Series: pm_rps: [RFC] RPS tests documentation update
URL : https://patchwork.freedesktop.org/series/29947/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
4a1c8daff2005e2cbfe980d63bc0a0fb09cb017d igt/gem_ringfill: Prime execbuf before
m
Chris Wilson writes:
> If the user bypasses i915 and accesses mmio directly, that easily
> confuses our automatic mmio debugging (any error we then detect is
> likely to be as a result of the user). Since we expect userspace to open
> debugfs/i915_forcewake_user if i915.ko is loaded and they want
== Series Details ==
Series: drm/i915: Disable mmio debugging during user access
URL : https://patchwork.freedesktop.org/series/29935/
State : success
== Summary ==
Test kms_atomic_transition:
Subgroup plane-use-after-nonblocking-unbind:
incomplete -> FAIL (shard-
Quoting Mika Kuoppala (2017-09-07 14:22:21)
> Chris Wilson writes:
>
> > If the user bypasses i915 and accesses mmio directly, that easily
> > confuses our automatic mmio debugging (any error we then detect is
> > likely to be as a result of the user). Since we expect userspace to open
> > debugf
On Thu, Sep 07, 2017 at 02:15:14PM +0200, Katarzyna Dec wrote:
> Added comments in tricky places for better feature understanding.
> Added IGT_TEST_DESCRIPTION and short description for non-obvious
> subtests.
> Changed name of 'magic' checkit() function to something meaningfull.
> Changed junk str
If the user bypasses i915 and accesses mmio directly, that easily
confuses our automatic mmio debugging (any error we then detect is
likely to be as a result of the user). Since we expect userspace to open
debugfs/i915_forcewake_user if i915.ko is loaded and they want mmio
access, that makes the op
== Series Details ==
Series: drm/i915: Disable mmio debugging during user access (rev2)
URL : https://patchwork.freedesktop.org/series/29935/
State : success
== Summary ==
Series 29935v2 drm/i915: Disable mmio debugging during user access
https://patchwork.freedesktop.org/api/1.0/series/29935/
== Series Details ==
Series: i915 perf support for command stream based OA, GPU and workload metrics
capture (rev3)
URL : https://patchwork.freedesktop.org/series/28104/
State : failure
== Summary ==
Test perf:
Subgroup short-reads:
pass -> FAIL (shard-hsw)
We don't expect every machine to be able to pass the WC/GTT coherency
check, see
kernel commit 3b5724d702ef24ee41ca008a1fab1cf94f3d31b5
Author: Chris Wilson
Date: Thu Aug 18 17:16:49 2016 +0100
drm/i915: Wait for writes through the GTT to land before reading back
If we quickly switch
We also see the delayed GTT write issue on i915g/i915gm, so let's
presume that it is a universal problem for all llc machines, and that we
just haven't yet noticed on g33, gen4 and gen5 machines.
Testcase: igt/gem_mmap_gtt/coherency # i915gm
References: https://bugs.freedesktop.org/show_bug.cgi?id
From: Ville Syrjälä
drm_pci_alloc() refuses to cooperate if the passed alignment exceeds the
object size. So round up the obj size to the next power of two as well
to make this actually work.
Obviously things work just fine as long as the size was a power of two
to begin with. However kms_cursor
Quoting ville.syrj...@linux.intel.com (2017-09-07 15:32:03)
> From: Ville Syrjälä
>
> drm_pci_alloc() refuses to cooperate if the passed alignment exceeds the
> object size. So round up the obj size to the next power of two as well
> to make this actually work.
'Tis true.
> to begin with. Howev
== Series Details ==
Series: drm/i915: Apply the GTT write flush for all !llc machines
URL : https://patchwork.freedesktop.org/series/29953/
State : warning
== Summary ==
Series 29953v1 drm/i915: Apply the GTT write flush for all !llc machines
https://patchwork.freedesktop.org/api/1.0/series/2
On Thu, Sep 07, 2017 at 03:43:26PM +0100, Chris Wilson wrote:
> Quoting ville.syrj...@linux.intel.com (2017-09-07 15:32:03)
> > From: Ville Syrjälä
> >
> > drm_pci_alloc() refuses to cooperate if the passed alignment exceeds the
> > object size. So round up the obj size to the next power of two a
== Series Details ==
Series: i915: Fix obj size vs. alignment for drm_pci_alloc()
URL : https://patchwork.freedesktop.org/series/29954/
State : success
== Summary ==
Series 29954v1 i915: Fix obj size vs. alignment for drm_pci_alloc()
https://patchwork.freedesktop.org/api/1.0/series/29954/revis
On Thu, Sep 07, 2017 at 03:20:19PM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 07/09/2017 15:13, Katarzyna Dec wrote:
> > On Mon, Sep 04, 2017 at 03:27:26PM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 07/08/2017 16:53, Daniel Vetter wrote:
> > > > On Fri, Aug 04, 2017 at 09:43:41AM +0100, Tvrtko
== Series Details ==
Series: pm_rps: [RFC] RPS tests documentation update
URL : https://patchwork.freedesktop.org/series/29947/
State : success
== Summary ==
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252
Test pm_lpsp:
Subgroup scre
Op 17-08-17 om 17:16 schreef Mahesh Kumar:
> Hi,
>
> My bad, I forgot to modify cover-letter before sending series to intel-gfx.
>
> yes this is for upstream consideration.
Thanks, applied. I changed the enableddisabled in the debugfs patch to yesno,
so if you want
to write to it you can use yes
== Series Details ==
Series: igt/prime_vgem: Split out the fine-grain coherency check
URL : https://patchwork.freedesktop.org/series/29952/
State : success
== Summary ==
IGT patchset tested on top of latest successful build
4a1c8daff2005e2cbfe980d63bc0a0fb09cb017d igt/gem_ringfill: Prime execb
FF_SLICE_CS_CHICKEN2 does not belong to the context image.
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Oscar Mateo
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/g
GAMT_CHKN_BIT_REG does not live in the context image.
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Oscar Mateo
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/d
Afaict, GEN9_GAMT_ECO_REG_RW_IA does not live in the context, so writing
it on every context creation is overkill (and wrong).
v2: Missing end parenthesis
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Oscar Mateo
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/in
So do it correctly.
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Oscar Mateo
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gp
GAMT_CHKN_BIT_REG does not live in the context.
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Oscar Mateo
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/intel_engine_cs.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i
GEN7_UCGCTL4 does not live in the context.
v2: Missing parenthesis
Cc: Chris Wilson
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Oscar Mateo
Reviewed-by: Michał Winiarski
---
drivers/gpu/drm/i915/intel_engine_cs.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --g
On 09/07/2017 04:03 AM, Michał Winiarski wrote:
On Wed, Sep 06, 2017 at 05:15:49PM -0700, Oscar Mateo wrote:
Afaict, GEN9_GAMT_ECO_REG_RW_IA does not live in the context, so writing
it on every context creation is overkill (and wrong).
v2: Missing end parenthesis
Though there was a discussio
On 09/07/2017 02:30 AM, Mika Kuoppala wrote:
Oscar Mateo writes:
Hey Mika,
Regarding this patch: is there a consensus on where is the most
appropriate place to apply workarounds? My understanding is that
per-context workarounds (WAS_SET_BIT, etc...) go in
xxx_init_workarounds, while those t
== Series Details ==
Series: pm_rps: [RFC] RPS tests documentation update
URL : https://patchwork.freedesktop.org/series/29947/
State : success
== Summary ==
Test perf:
Subgroup polling:
pass -> FAIL (shard-hsw) fdo#102252
Test kms_atomic_transition:
On Thu, Sep 07, 2017 at 02:44:41PM +0100, Chris Wilson wrote:
> If the user bypasses i915 and accesses mmio directly, that easily
> confuses our automatic mmio debugging (any error we then detect is
> likely to be as a result of the user). Since we expect userspace to open
> debugfs/i915_forcewake_
== Series Details ==
Series: series starting with [1/6] drm/i915: Transform
WaInPlaceDecompressionHang into a simple reg write
URL : https://patchwork.freedesktop.org/series/29957/
State : success
== Summary ==
Series 29957v1 series starting with [1/6] drm/i915: Transform
WaInPlaceDecompress
Ping.
-Original Message-
From: Wang, Zhi A
Sent: Tuesday, September 5, 2017 10:58 PM
To: intel-gfx@lists.freedesktop.org; intel-gvt-...@lists.freedesktop.org
Cc: joonas.lahti...@linux.intel.com; ch...@chris-wilson.co.uk;
zhen...@linux.intel.com; Wang, Zhi A ; Widawsky, Benjamin
; Vivi,
Quoting Michal Wajdeczko (2017-09-07 16:55:39)
> On Thu, Sep 07, 2017 at 02:44:41PM +0100, Chris Wilson wrote:
> > If the user bypasses i915 and accesses mmio directly, that easily
> > confuses our automatic mmio debugging (any error we then detect is
> > likely to be as a result of the user). Sinc
From: Ville Syrjälä
gem_spin_batch.c:51:13: warning: format ‘%d’ expects argument of type ‘int’,
but argument 4 has type ‘long unsigned int’ [-Wformat=]
intel_opregion_decode.c:313:9: warning: format ‘%lx’ expects argument of type
‘long unsigned int’, but argument 2 has type ‘uint64_t {aka cons
From: Ville Syrjälä
If the system doesn't have the plane the test wants, let's skip the
test rather than fail it.
Signed-off-by: Ville Syrjälä
---
lib/igt_kms.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 14e2701c3afd..72fde792b
From: Ville Syrjälä
The invalid props test forgot to check for atomic. Add the required
check.
Signed-off-by: Ville Syrjälä
---
tests/kms_properties.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/kms_properties.c b/tests/kms_properties.c
index 544a80097c54..a63b69b4decf 100644
From: Ville Syrjälä
We depend on kmstest_connector_type_str() matching the kernel.
Fix up the cases where we differ currently. Also add the missing
DPI "connector" type.
Signed-off-by: Ville Syrjälä
---
lib/igt_aux.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
tests/kms_draw_crc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
index 906d89f9b77d..260950c76e00 100644
--- a/tests/kms_draw_crc.c
+++ b/tests/kms_draw_crc.c
@@ -161,6 +161,8 @@ static vo
On 9/7/2017 5:54 PM, Michał Winiarski wrote:
On Fri, Sep 01, 2017 at 11:02:09AM +0530, Sagar Arun Kamble wrote:
Removed unnecessary intel_uc.h includes as it is present in i915_drv.h.
Created intel_guc.c and intel_guc.h for placing GuC specific code.
Created intel_huc.h to refer to HuC specifi
Quoting ville.syrj...@linux.intel.com (2017-09-07 17:11:20)
> From: Ville Syrjälä
>
> The invalid props test forgot to check for atomic. Add the required
> check.
>
> Signed-off-by: Ville Syrjälä
Series is
Reviewed-by: Chris Wilson
-Chris
___
Intel-g
== Series Details ==
Series: series starting with [1/5] Fix compiler warnings about printf()
arguments
URL : https://patchwork.freedesktop.org/series/29961/
State : warning
== Summary ==
IGT patchset tested on top of latest successful build
4a1c8daff2005e2cbfe980d63bc0a0fb09cb017d igt/gem_rin
== Series Details ==
Series: drm/i915: Disable mmio debugging during user access (rev2)
URL : https://patchwork.freedesktop.org/series/29935/
State : success
== Summary ==
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-hsw) fdo#99912
Test perf:
Quoting Patchwork (2017-09-07 17:52:37)
> == Series Details ==
>
> Series: drm/i915: Disable mmio debugging during user access (rev2)
> URL : https://patchwork.freedesktop.org/series/29935/
> State : success
>
> == Summary ==
>
> Test kms_setmode:
> Subgroup basic:
> fa
>-Original Message-
>From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
>Sent: Thursday, September 7, 2017 1:49 AM
>To: Srivatsa, Anusha ; intel-
>g...@lists.freedesktop.org
>Cc: Sundaresan, Sujaritha
>Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add GuC Load time to debu
>-Original Message-
>From: Wajdeczko, Michal
>Sent: Thursday, September 7, 2017 3:23 AM
>To: Tvrtko Ursulin
>Cc: Srivatsa, Anusha ; intel-
>g...@lists.freedesktop.org; Sundaresan, Sujaritha
>
>Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add GuC Load time to debugfs
>
>On Thu, Sep
On Fri, Sep 01, 2017 at 11:02:09AM +0530, Sagar Arun Kamble wrote:
> Removed unnecessary intel_uc.h includes as it is present in i915_drv.h.
> Created intel_guc.c and intel_guc.h for placing GuC specific code.
> Created intel_huc.h to refer to HuC specific functions.
>
> v2: Prepared intel_uc_comm
On Fri, Sep 01, 2017 at 11:02:10AM +0530, Sagar Arun Kamble wrote:
> Tearing down of guc_ggtt_invalidate/guc_interrupts/guc_communication
> setup should happen towards end of reset/suspend as these are
> setup back again during recovery/resume.
>
> Prepared helpers intel_guc_pause and intel_guc_un
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