[Intel-gfx] [PATCH v4] drm/i915: Enable guest i915 full ppgtt functionality

2017-06-05 Thread Tina Zhang
Enable the guest i915 full ppgtt functionality when host can provide this capability. vgt_caps is introduced to guest i915 driver to get the vgpu capabilities from the device model. VGT_CPAS_FULL_PPGTT is one of the capabilities type to let guest i915 dirver know that the guest i915 full ppgtt is s

Re: [Intel-gfx] [PATCH v6 4/6] vfio: Define vfio based vgpu's dma-buf operations

2017-06-05 Thread Kirti Wankhede
On 6/2/2017 2:08 PM, Gerd Hoffmann wrote: > >> struct vfio_vgpu_surface_info { >> __u64 start; >> __u32 width; >> __u32 height; >> __u32 stride; >> __u32 size; >> __u32 x_pos; >> __u32 y_pos; >> __u32 padding; >> /* Only use

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable guest i915 full ppgtt functionality (rev2)

2017-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Enable guest i915 full ppgtt functionality (rev2) URL : https://patchwork.freedesktop.org/series/24774/ State : success == Summary == Series 24774v2 drm/i915: Enable guest i915 full ppgtt functionality https://patchwork.freedesktop.org/api/1.0/series/2477

Re: [Intel-gfx] i915 memory allocation failure..

2017-06-05 Thread Chris Wilson
Quoting Linus Torvalds (2017-06-05 05:26:06) > So there's something wrong with the memory allocation changes since > 4.11, which seem to be mostly credited to Chris Wilson. > > In particular, I got this earlier today: > > Xorg: page allocation failure: order:0, > mode:0x14210d2(GFP_HIGHUSER|__G

Re: [Intel-gfx] [RFC i-g-t 1/1] tests/gem_bad_address: Fix and update gem_bad_address

2017-06-05 Thread Petri Latvala
If this ends up having further revisions, please split it into two (three?) separate changes: 1) Introduction of tests_hw directory 2) Moving (and changing) gem_bad_address to tests_hw [3) Changing gem_bad_address] First target of bikeshedding is the directory name. I kind of like hw_tests mo

Re: [Intel-gfx] i915 memory allocation failure..

2017-06-05 Thread Michal Hocko
On Mon 05-06-17 10:04:35, Chris Wilson wrote: > Quoting Linus Torvalds (2017-06-05 05:26:06) [...] > > Maybe we want some middle ground between "retry forever" and "don't > > try at all". In people trying to fight the "retry forever", we seem to > > have gone too far in the "don't even bother, just

[Intel-gfx] [PATCH] drm: Restore GNOME monitors.xml support

2017-06-05 Thread H.J. Lu
Please CC me since I am not on this mailing list. H.J. --- My ~/.config/monitors.xml swaps primary/secondary displays as well as their horizontal positions. It works fine until: commit 91eefc05f0ac71902906b2058360e61bd25137fe Author: Daniel Vetter Date: Wed Dec 14 00:08:10 2016 +0100 drm

[Intel-gfx] GPU drivers in Linux fedora23 - EDID redundant polling when TV is in standby

2017-06-05 Thread Shmuel Weiss
Hi All, I need your help to investigate an issue I have with some TV monitor, it seems like the DRM or i915 is polling the TV EDID at high frequency even if the TV is in standby. I need your guidance to diagnose this problem, and to point me to the code part which is responsible to read the EDID

[Intel-gfx] Fwd: GPU drivers in Linux fedora23 - EDID redundant polling when TV is in standby

2017-06-05 Thread Shmuel Weiss
Hi All, I need your help to investigate an issue I have with some TV monitor, it seems like the DRM or i915 is polling the TV EDID at high frequency even if the TV is in standby. I need your guidance to diagnose this problem, and to point me to the code part which is responsible to read the EDID

[Intel-gfx] [PATCH 1/4] drm/i915: Check signaled state after enabling signaling

2017-06-05 Thread Chris Wilson
Settting up the irq to signal the request completion takes a finite amount of time, during which it is possible that the request already completed. Check afterwards, just in case, so that we can respond immediately. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin --- drivers

[Intel-gfx] [PATCH 3/4] drm/i915: Skip adding the request to the signal tree is complete

2017-06-05 Thread Chris Wilson
Enabling the interrupt for the signaler takes a finite amount of time (a few microseconds) during which it is possible for the request to complete. Check afterwards and skip adding the request to the signal rbtree if it complete. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin

[Intel-gfx] [PATCH 2/4] drm/i915: Report back whether the irq was armed when adding the waiter

2017-06-05 Thread Chris Wilson
The important condition that we need to check after enabling the interrupt for signaling is whether the request completed in the process (and so we missed that interrupt). A large cost in enabling the signaling (rather than waiters) is in waking up the auxiliary signaling thread, but we only need t

[Intel-gfx] [PATCH 4/4] drm/i915: Remove the spin-request during execbuf await_request

2017-06-05 Thread Chris Wilson
Originally we would enable and disable the breadcrumb interrupt immediately on demand. This was slow enough to have a large impact (>30%) on tasks that hopped between engines. However, by using a shadow to keep the irq alive for an extra interrupt (see commit 67b807a89230 ("drm/i915: Delay disablin

[Intel-gfx] [PATCH v2] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-05 Thread Chris Wilson
I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It struggles with handling reclaim via kswapd (through inconsistency within throttle_direct_reclaim() and even then the race between multiple allocators makes the two step of reclaim then allocate fragile), and as our buffers are

Re: [Intel-gfx] [PATCH v2] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-05 Thread Daniel Stone
Hi, On 5 June 2017 at 11:35, Chris Wilson wrote: > I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It > struggles with handling reclaim via kswapd (through inconsistency within > throttle_direct_reclaim() and even then the race between multiple > allocators makes the two ste

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Check signaled state after enabling signaling

2017-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Check signaled state after enabling signaling URL : https://patchwork.freedesktop.org/series/25283/ State : success == Summary == Series 25283v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/25283

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Check signaled state after enabling signaling

2017-06-05 Thread Mika Kuoppala
Chris Wilson writes: > Settting up the irq to signal the request completion takes a finite ^-t Reviewed-by: Mika Kuoppala > amount of time, during which it is possible that the request already > completed. Check afterwards, just in case, so that we can respond > immediately. > > Signed-o

[Intel-gfx] [PATCH igt] lib: Force global reset + uevents for hang detector

2017-06-05 Thread Chris Wilson
The hang detector relies on a uevent for notification and aborting the test. As proposed, fine-grained resets may not produce a global uevent and so this hang detection becomes void. As we don't expect any hang, we can just reduce the reset to only a global + uevent and so maintain functionality, a

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Allow kswapd to pause the device whilst reaping (rev2)

2017-06-05 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Allow kswapd to pause the device whilst reaping (rev2) URL : https://patchwork.freedesktop.org/series/25164/ State : success == Summary == Series 25164v2 Series without cover letter https://patchwork.freedesktop.org/api/1.0/ser

Re: [Intel-gfx] [PATCH igt] lib: Force global reset + uevents for hang detector

2017-06-05 Thread Mika Kuoppala
Chris Wilson writes: > The hang detector relies on a uevent for notification and aborting the > test. As proposed, fine-grained resets may not produce a global uevent > and so this hang detection becomes void. As we don't expect any hang, we > can just reduce the reset to only a global + uevent a

Re: [Intel-gfx] [PATCH v2] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-05 Thread Chris Wilson
Quoting Daniel Stone (2017-06-05 11:47:44) > Hi, > > On 5 June 2017 at 11:35, Chris Wilson wrote: > > I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It > > struggles with handling reclaim via kswapd (through inconsistency within > > throttle_direct_reclaim() and even then t

Re: [Intel-gfx] [PATCH igt] lib: Force global reset + uevents for hang detector

2017-06-05 Thread Chris Wilson
Quoting Mika Kuoppala (2017-06-05 12:15:15) > Chris Wilson writes: > > > The hang detector relies on a uevent for notification and aborting the > > test. As proposed, fine-grained resets may not produce a global uevent > > and so this hang detection becomes void. As we don't expect any hang, we >

[Intel-gfx] [PATCH igt v2] lib: Force global reset + uevents for hang detector

2017-06-05 Thread Chris Wilson
The hang detector relies on a uevent for notification and aborting the test. As proposed, fine-grained resets may not produce a global uevent and so this hang detection becomes void. As we don't expect any hang, we can just reduce the reset to only a global + uevent and so maintain functionality, a

Re: [Intel-gfx] [PATCH igt] lib: Force global reset + uevents for hang detector

2017-06-05 Thread Chris Wilson
Quoting Mika Kuoppala (2017-06-05 12:15:15) > Chris Wilson writes: > > + /* > > + * Disable per-engine reset to force an error uevent. We don't > > + * expect to get any hangs whilst the detector is enabled (if we do > > + * they are a test failure!) and so the loss of per-engin

Re: [Intel-gfx] [PATCH v2] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-05 Thread Chris Wilson
Quoting Michal Hocko (2017-06-05 13:26:30) > On Mon 05-06-17 11:35:12, Chris Wilson wrote: > > I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It > > struggles with handling reclaim via kswapd (through inconsistency within > > throttle_direct_reclaim() and even then the race b

Re: [Intel-gfx] [PATCH 29/67] drm/i915/cnl: Implement .set_cdclk() for CNL

2017-06-05 Thread Imre Deak
On Thu, Apr 06, 2017 at 12:15:25PM -0700, Rodrigo Vivi wrote: > From: Ville Syrjälä > > Add support for changing the cdclk frequency on CNL. Again, quite > similar to BXT, but there are some annoying differences which means > trying to share more code might not be feasible: > * PLL ratio now live

Re: [Intel-gfx] [PATCH v2] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-05 Thread Chris Wilson
Quoting Michal Hocko (2017-06-05 14:08:10) > On Mon 05-06-17 13:49:38, Chris Wilson wrote: > > Quoting Michal Hocko (2017-06-05 13:26:30) > > > On Mon 05-06-17 11:35:12, Chris Wilson wrote: > > > > I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It > > > > struggles with handl

Re: [Intel-gfx] [PATCH] drm/i915: Fix GVT-g PVINFO version compatibility check

2017-06-05 Thread Joonas Lahtinen
On ma, 2017-06-05 at 11:00 +0800, Zhenyu Wang wrote: > Current it's strictly checked if PVINFO version matches 1.0 > for GVT-g i915 guest which doesn't help for compatibility at > all and forces GVT-g host can't extend PVINFO easily with version > bump for real compatibility check. > > This fixes

[Intel-gfx] [PATCH 4/4] lib/igt_debugfs: Only use valid values in igt_crc_to_str()

2017-06-05 Thread Liviu Dudau
From: Brian Starkey Not all elements in the crc array may be valid, so only use the valid ones to generate the string. Signed-off-by: Brian Starkey --- lib/igt_debugfs.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index f5ed3

[Intel-gfx] [PATCH 3/4] lib/igt_debugfs: Remove igt_debugfs_t

2017-06-05 Thread Liviu Dudau
From: Brian Starkey It's not used anymore, so remove it. Signed-off-by: Brian Starkey --- lib/igt_debugfs.c | 5 - 1 file changed, 5 deletions(-) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index 7584be5f..f5ed3daf 100644 --- a/lib/igt_debugfs.c +++ b/lib/igt_debugfs.c @@ -84,11 +8

[Intel-gfx] [PATCH 1/4] lib/igt_kms: Fix erroneous assert

2017-06-05 Thread Liviu Dudau
From: Brian Starkey In trying to fix igt_display_init() for devices without cursors, I actually made matters worse. Fix the assert. Fixes: 545aa3398223 lib/igt_kms: Remove redundant cursor code Signed-off-by: Brian Starkey --- lib/igt_kms.c | 10 +- 1 file changed, 5 insertions(+), 5 d

[Intel-gfx] [PATCH 0/4] Cleanups and fixes

2017-06-05 Thread Liviu Dudau
From: Liviu Dudau Hello, I believe Brian has sent these patches before, but he did not had any luck getting them accepted, so it is now my turn :) These fixes were found while developing code for memory writeback testing and general use of igt with Mali DP KMS driver, which does not have a curs

[Intel-gfx] [PATCH 2/4] lib/igt_kms: Fix override_mode handling

2017-06-05 Thread Liviu Dudau
From: Brian Starkey igt_display_commit isn't refreshing all outputs anymore, which means that an override mode may never get picked up. Instead of forcing a reprobe to handle copying the override_mode into default_mode, just change igt_output_get_mode() to return the override_mode if it's been s

Re: [Intel-gfx] [PATCH RESEND] drm: i915: Don't try detecting sinks on ports already in use

2017-06-05 Thread Ville Syrjälä
On Sun, May 28, 2017 at 09:53:19PM -0300, Gabriel Krisman Bertazi wrote: > Chris Wilson writes: > > > The key problem here is say a race between DP unplug and HDMI plug, and > > users are evil enough (or common enough) for it to happen. > > > > I thought the idea was reasonable though, and perhap

[Intel-gfx] [PATCH v16 01/17] drm/i915: expose _SLICE_MASK GETPARM

2017-06-05 Thread Lionel Landwerlin
From: Robert Bragg Enables userspace to determine the maximum number of slices that can be enabled on the device and also know what specific slices can be enabled. This information is required, for example, to be able to analyse some OA counter reports where the counter configuration depends on t

[Intel-gfx] [PATCH v16 02/17] drm/i915: expose _SUBSLICE_MASK GETPARM

2017-06-05 Thread Lionel Landwerlin
From: Robert Bragg Assuming a uniform mask across all slices, this enables userspace to determine the specific sub slices can be enabled. This information is required, for example, to be able to analyse some OA counter reports where the counter configuration depends on the HW sub slice configurat

[Intel-gfx] [PATCH v16 00/17] Enable OA unit for Gen 8 and 9 in i915 perf

2017-06-05 Thread Lionel Landwerlin
Hi, Here is another update on this series. There has been some discussion about handling the dynamic slice/subslice shutdown cases. In most cases this isn't actually interesting. Indeed most 3D workloads will want all of the slices/subslices turned on. In that case it's unfortunate to have to relo

[Intel-gfx] [PATCH v16 07/17] drm/i915/perf: Add 'render basic' Gen8+ OA unit configs

2017-06-05 Thread Lionel Landwerlin
From: Robert Bragg Adds a static OA unit, MUX, B Counter + Flex EU configurations for basic render metrics on Broadwell, Cherryview, Skylake and Broxton. These are auto generated from an XML description of metric sets, currently maintained in gputop, ref: https://github.com/rib/gputop > gputop

[Intel-gfx] [PATCH v16 06/17] drm/i915/perf: rework mux configurations queries

2017-06-05 Thread Lionel Landwerlin
Gen8+ might have mux configurations per slices/subslices. Depending on whether slices/subslices have been fused off, only part of the configuration needs to be applied. This change reworks the mux configurations query mechanism to allow more than one set of registers to be programmed. v2: s/n_mux_

[Intel-gfx] [PATCH v16 05/17] drm/i915: Record the sseu configuration per-context & engine

2017-06-05 Thread Lionel Landwerlin
From: Chris Wilson We want to expose the ability to reconfigure the slices, subslice and eu per context and per engine. To facilitate that, store the current configuration on the context for each engine, which is initially set to the device default upon creation. v2: record sseu configuration pe

[Intel-gfx] [PATCH v16 03/17] drm/i915: Record both min/max eu_per_subslice in sseu_dev_info

2017-06-05 Thread Lionel Landwerlin
From: Chris Wilson When we query the available eu on each subslice, we currently only report the max. It would also be useful to report the minimum found as well. When we set RPCS (power gating over the EU), we can also specify both the min and max number of eu to configure on each slice; curren

[Intel-gfx] [PATCH v16 04/17] drm/i915: Program RPCS for Broadwell

2017-06-05 Thread Lionel Landwerlin
From: Chris Wilson Currently we only configure the power gating for Skylake and above, but the configuration should equally apply to Broadwell and Braswell. Even though, there is not as much variation as for later generations, we want to expose control over the configuration to userspace and may

[Intel-gfx] [PATCH v16 08/17] drm/i915/perf: Add OA unit support for Gen 8+

2017-06-05 Thread Lionel Landwerlin
From: Robert Bragg Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all share (more-or-less) the same OA unit design. Of particular note in comparison to Haswell: some OA unit HW config state has become per-context state and as a consequence it is somewhat more complicated to ma

[Intel-gfx] [PATCH v16 10/17] drm/i915/perf: per-gen timebase for checking sample freq

2017-06-05 Thread Lionel Landwerlin
From: Robert Bragg An oa_exponent_to_ns() utility and per-gen timebase constants where recently removed when updating the tail pointer race condition WA, and this restores those so we can update the _PROP_OA_EXPONENT validation done in read_properties_unlocked() to not assume we have a 12.5MHz ti

[Intel-gfx] [PATCH v16 11/17] drm/i915/perf: remove perf.hook_lock

2017-06-05 Thread Lionel Landwerlin
From: Robert Bragg In earlier iterations of the i915-perf driver we had a number of callbacks/hooks from other parts of the i915 driver to e.g. notify us when a legacy context was pinned and these could run asynchronously with respect to the stream file operations and might also run in atomic con

[Intel-gfx] [PATCH v16 12/17] drm/i915: add KBL GT2/GT3 check macros

2017-06-05 Thread Lionel Landwerlin
Add macros to detect GT2/GT3 skus so we can apply the proper OA configuration later. Signed-off-by: Lionel Landwerlin Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_drv.h | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915

[Intel-gfx] [PATCH v16 14/17] drm/i915/perf: add GLK support

2017-06-05 Thread Lionel Landwerlin
Add OA support for Geminilake (pretty much identical to Broxton), and also add the associated OA configurations. Signed-off-by: Lionel Landwerlin Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/Makefile |3 +- drivers/gpu/drm/i915/i915_oa_glk.c | 2602 +++

[Intel-gfx] [PATCH v16 16/17] drm/i915/perf: notify sseu configuration changes

2017-06-05 Thread Lionel Landwerlin
This adds the ability for userspace to request that the kernel track & record sseu configuration changes. These changes are inserted into the perf stream so that userspace can interpret the OA reports using the configuration applied at the time the OA reports where generated. v2: Handle timestamps

[Intel-gfx] [PATCH v16 17/17] drm/i915/perf: follow coding style for block comments

2017-06-05 Thread Lionel Landwerlin
Following Chris' recommendation, follow coding style for all block comments. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_perf.c | 96 ++-- include/uapi/drm/i915_drm.h | 2 +- 2 files changed, 65 insertions(+), 33 deletions(-) diff --g

[Intel-gfx] [PATCH v16 15/17] drm/i915/perf: allow NOA muxes reprogramming before workloads

2017-06-05 Thread Lionel Landwerlin
Dynamic slices/subslices shutdown will effectivelly loose the NOA configuration uploaded in the slices/subslices. Here we introduce a new parameter to configure the i915 perf driver when userspace wants to monitor parts of the GPU within slices/subslices and it knows that some of the workloads run

Re: [Intel-gfx] [PATCH v2] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-05 Thread Chris Wilson
Quoting Michal Hocko (2017-06-05 14:08:10) > On Mon 05-06-17 13:49:38, Chris Wilson wrote: > > Quoting Michal Hocko (2017-06-05 13:26:30) > > > On Mon 05-06-17 11:35:12, Chris Wilson wrote: > > > > I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It > > > > struggles with handl

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable OA unit for Gen 8 and 9 in i915 perf (rev12)

2017-06-05 Thread Patchwork
== Series Details == Series: Enable OA unit for Gen 8 and 9 in i915 perf (rev12) URL : https://patchwork.freedesktop.org/series/20084/ State : success == Summary == Series 20084v12 Enable OA unit for Gen 8 and 9 in i915 perf https://patchwork.freedesktop.org/api/1.0/series/20084/revisions/12/m

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Implement CNL display init/unit sequence

2017-06-05 Thread Imre Deak
On Thu, Apr 13, 2017 at 09:13:02AM -0700, Rodrigo Vivi wrote: > From: Ville Syrjälä > > Implement the CNL display init/uninit sequence as outlined in Bspec. > > Quite similar to SKL/BXT. The main complicaiton is probably the extra > procmon setup we must do based on the process/voltage informati

Re: [Intel-gfx] [PATCH 31/67] drm/i915/cnl: Allow dynamic cdclk changes on CNL

2017-06-05 Thread Imre Deak
On Thu, Apr 06, 2017 at 12:15:27PM -0700, Rodrigo Vivi wrote: > All the low level cdclk bits are present, so let's add the required > hooks to reconfigure cdclk on the fly. > > v2: Rebase due to cnl_sanitize_cdclk() > v3: Rebased by Rodrigo on top of Ville's cdclk rework. > v4: Rebase moving cnl_c

Re: [Intel-gfx] [PATCH] drm/i915/guc: Clear enable_guc_loading in case of init failure

2017-06-05 Thread Daniele Ceraolo Spurio
You'll also need to change the order of operations in intel_uc_fini_hw to make sure guc_free_load_err_log is called before the i915.enable_guc_loading check, because that log exists exactly when GuC loading failed. Thanks, Daniele On 02/06/17 16:46, Michel Thierry wrote: And prevent calling

Re: [Intel-gfx] [PATCH 26/67] drm/i915/cnl: Add power wells for CNL

2017-06-05 Thread Imre Deak
On Thu, Apr 06, 2017 at 12:15:22PM -0700, Rodrigo Vivi wrote: > From: Ville Syrjälä > > CNL power wells are very similar to SKL, with the exception that the > misc IO well has been split into separate AUX IO wells. > > Not sure if DMC is supposed to manage the AUX wells for us or not. > Let's as

Re: [Intel-gfx] [PATCH 27/67] drm/i915/cnl: Also need power well sanitize.

2017-06-05 Thread Imre Deak
On Thu, Apr 06, 2017 at 12:15:23PM -0700, Rodrigo Vivi wrote: > The workaround added in > commit c6782b76d31a ("drm/i915/gen9: Reset secondary power well > equests left on by DMC/KVMR") > needs to be applied on Cannonlake as well. > > So let's assume any platform using this power well setup > will

Re: [Intel-gfx] [PATCH v2 1/5] acpi, nfit: Switch to use new generic UUID API

2017-06-05 Thread Christoph Hellwig
> for (i = 0; i < NFIT_UUID_MAX; i++) > - if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0) > + if (!guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid)) > return i; I think this should be guid_equal without the "!" _

Re: [Intel-gfx] [PATCH v2 2/5] ACPI / APEI: Switch to use new generic UUID API

2017-06-05 Thread Christoph Hellwig
> - if (!uuid_le_cmp(*(uuid_le *)gdata->section_type, > - CPER_SEC_PLATFORM_MEM)) { > + if (!guid_equal(sec_type, &CPER_SEC_PLATFORM_MEM)) { The "!" here seems incorrect. > #ifdef CONFIG_ACPI_APEI_PCIEAER > - else if (!uuid_le_cmp(

Re: [Intel-gfx] [PATCH v2 3/5] ACPI / bus: Switch to use new generic UUID API

2017-06-05 Thread Christoph Hellwig
> + in_params[0].buffer.pointer = (u8 *)&guid; Any idea why the pointer is defined as a u8 * in union acpi_object instead of a void? ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-g

Re: [Intel-gfx] [PATCH v2 4/5] ACPI / extlog: Switch to use new generic UUID API

2017-06-05 Thread Christoph Hellwig
> @@ -165,11 +165,11 @@ static int extlog_print(struct notifier_block *nb, > unsigned long val, > err_seq++; > gdata = (struct acpi_hest_generic_data *)(tmp + 1); > if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID) > - fru_id = (uuid_le *)gdata->fru_id; > +

Re: [Intel-gfx] [PATCH v2 1/5] acpi, nfit: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
On Mon, 2017-06-05 at 18:01 +0200, Christoph Hellwig wrote: > >   for (i = 0; i < NFIT_UUID_MAX; i++) > > - if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == > > 0) > > + if (!guid_equal(to_nfit_uuid(i), (guid_t *)&spa- > > >range_guid)) > >   return i; >

Re: [Intel-gfx] [PATCH v2 2/5] ACPI / APEI: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
On Mon, 2017-06-05 at 18:01 +0200, Christoph Hellwig wrote: > > - if (!uuid_le_cmp(*(uuid_le *)gdata->section_type, > > -  CPER_SEC_PLATFORM_MEM)) { > > + if (!guid_equal(sec_type, &CPER_SEC_PLATFORM_MEM)) > > { > > The "!" here seems incorrect. > > >

Re: [Intel-gfx] [PATCH v2 3/5] ACPI / bus: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
On Mon, 2017-06-05 at 18:03 +0200, Christoph Hellwig wrote: > > + in_params[0].buffer.pointer = (u8 *)&guid; > > Any idea why the pointer is defined as a u8 * in union acpi_object > instead of a void? I guess this question to Rafael. -- Andy Shevchenko Intel Finland Oy __

Re: [Intel-gfx] [PATCH v2 2/5] ACPI / APEI: Switch to use new generic UUID API

2017-06-05 Thread Christoph Hellwig
On Mon, Jun 05, 2017 at 07:19:43PM +0300, Andy Shevchenko wrote: > Thanks! > Are you going to fixup when applying or better me to send an updated > version? I'd prefer a resend so that all the maintainers can carefully re-review the patches. ___ Intel-gf

Re: [Intel-gfx] [PATCH v2 4/5] ACPI / extlog: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
On Mon, 2017-06-05 at 18:06 +0200, Christoph Hellwig wrote: > > @@ -165,11 +165,11 @@ static int extlog_print(struct notifier_block > > *nb, unsigned long val, > >   err_seq++; > >   gdata = (struct acpi_hest_generic_data *)(tmp + 1); > >   if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID)

Re: [Intel-gfx] [PATCH v2 2/5] ACPI / APEI: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
On Mon, 2017-06-05 at 18:22 +0200, Christoph Hellwig wrote: > On Mon, Jun 05, 2017 at 07:19:43PM +0300, Andy Shevchenko wrote: > > Thanks! > > Are you going to fixup when applying or better me to send an updated > > version? > > I'd prefer a resend so that all the maintainers can carefully re- > r

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Implement CNL display init/unit sequence

2017-06-05 Thread Vivi, Rodrigo
On Mon, 2017-06-05 at 18:07 +0300, Imre Deak wrote: > On Thu, Apr 13, 2017 at 09:13:02AM -0700, Rodrigo Vivi wrote: > > From: Ville Syrjälä > > > > Implement the CNL display init/uninit sequence as outlined in Bspec. > > > > Quite similar to SKL/BXT. The main complicaiton is probably the extra >

[Intel-gfx] [PATCH v3 1/5] acpi, nfit: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
There are new types and helpers that are supposed to be used in new code. As a preparation to get rid of legacy types and API functions do the conversion here. Reviewed-by: Dan Williams Signed-off-by: Andy Shevchenko --- drivers/acpi/nfit/core.c | 54 ---

[Intel-gfx] [PATCH v3 0/5] ACPI et al: convert to use new UUID API

2017-06-05 Thread Andy Shevchenko
This series converts ACPI and users of acpi_evaluate_dsm() to new UUID API which includes new types and methods. Patches are based on uuid tree [1] from Christoph Hellwig and supposed to go through it. (Christoph, I think it would be nice to attach them to your stuff) [1]: git://git.infradead.or

[Intel-gfx] [PATCH v3 2/5] ACPI / APEI: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
There are new types and helpers that are supposed to be used in new code. As a preparation to get rid of legacy types and API functions do the conversion here. Cc: Borislav Petkov Signed-off-by: Andy Shevchenko --- drivers/acpi/apei/ghes.c | 8 1 file changed, 4 insertions(+), 4 delet

[Intel-gfx] [PATCH v3 4/5] ACPI / extlog: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
There are new types and helpers that are supposed to be used in new code. As a preparation to get rid of legacy types and API functions do the conversion here. Cc: Borislav Petkov Signed-off-by: Andy Shevchenko --- drivers/acpi/acpi_extlog.c | 20 ++-- 1 file changed, 10 insert

Re: [Intel-gfx] [PATCH 31/67] drm/i915/cnl: Allow dynamic cdclk changes on CNL

2017-06-05 Thread Vivi, Rodrigo
On Mon, 2017-06-05 at 18:22 +0300, Imre Deak wrote: > On Thu, Apr 06, 2017 at 12:15:27PM -0700, Rodrigo Vivi wrote: > > All the low level cdclk bits are present, so let's add the required > > hooks to reconfigure cdclk on the fly. > > > > v2: Rebase due to cnl_sanitize_cdclk() > > v3: Rebased by R

[Intel-gfx] [PATCH v3 3/5] ACPI / bus: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
There are new types and helpers that are supposed to be used in new code. As a preparation to get rid of legacy types and API functions do the conversion here. Acked-by: Rafael J. Wysocki Signed-off-by: Andy Shevchenko --- drivers/acpi/bus.c | 6 +++--- 1 file changed, 3 insertions(+), 3 delet

[Intel-gfx] [PATCH v3 5/5] ACPI: Switch to use generic guid_t in acpi_evaluate_dsm()

2017-06-05 Thread Andy Shevchenko
acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16 bytes. Instead we convert them to use guid_t type. At the same time we convert current users. acpi_str_to_uuid() becomes useless after the conversion and it's safe to get rid of it. Acked-by: Rafael J. Wysocki Cc: Borislav Petk

Re: [Intel-gfx] [PATCH 26/67] drm/i915/cnl: Add power wells for CNL

2017-06-05 Thread Vivi, Rodrigo
On Mon, 2017-06-05 at 18:55 +0300, Imre Deak wrote: > On Thu, Apr 06, 2017 at 12:15:22PM -0700, Rodrigo Vivi wrote: > > From: Ville Syrjälä > > > > CNL power wells are very similar to SKL, with the exception that the > > misc IO well has been split into separate AUX IO wells. > > > > Not sure if

[Intel-gfx] ✗ Fi.CI.BAT: failure for ACPI et al: convert to use new UUID API (rev2)

2017-06-05 Thread Patchwork
== Series Details == Series: ACPI et al: convert to use new UUID API (rev2) URL : https://patchwork.freedesktop.org/series/25121/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CH

Re: [Intel-gfx] [PATCH v3 1/5] acpi, nfit: Switch to use new generic UUID API

2017-06-05 Thread Dan Williams
On Mon, Jun 5, 2017 at 9:40 AM, Andy Shevchenko wrote: > There are new types and helpers that are supposed to be used in new code. > > As a preparation to get rid of legacy types and API functions do > the conversion here. > > Reviewed-by: Dan Williams > Signed-off-by: Andy Shevchenko > --- > d

Re: [Intel-gfx] [PATCH 31/67] drm/i915/cnl: Allow dynamic cdclk changes on CNL

2017-06-05 Thread Ville Syrjälä
On Mon, Jun 05, 2017 at 04:41:07PM +, Vivi, Rodrigo wrote: > On Mon, 2017-06-05 at 18:22 +0300, Imre Deak wrote: > > On Thu, Apr 06, 2017 at 12:15:27PM -0700, Rodrigo Vivi wrote: > > > All the low level cdclk bits are present, so let's add the required > > > hooks to reconfigure cdclk on the fl

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Implement CNL display init/unit sequence

2017-06-05 Thread Imre Deak
On Mon, Jun 05, 2017 at 07:38:45PM +0300, Vivi, Rodrigo wrote: > On Mon, 2017-06-05 at 18:07 +0300, Imre Deak wrote: > > On Thu, Apr 13, 2017 at 09:13:02AM -0700, Rodrigo Vivi wrote: > > > From: Ville Syrjälä > > > > > > Implement the CNL display init/uninit sequence as outlined in Bspec. > > >

Re: [Intel-gfx] [PATCH 31/67] drm/i915/cnl: Allow dynamic cdclk changes on CNL

2017-06-05 Thread Pandiyan, Dhinakaran
On Mon, 2017-06-05 at 19:55 +0300, Ville Syrjälä wrote: > On Mon, Jun 05, 2017 at 04:41:07PM +, Vivi, Rodrigo wrote: > > On Mon, 2017-06-05 at 18:22 +0300, Imre Deak wrote: > > > On Thu, Apr 06, 2017 at 12:15:27PM -0700, Rodrigo Vivi wrote: > > > > All the low level cdclk bits are present, so l

Re: [Intel-gfx] [PATCH 23/67] drm/i915/gen10: Set value of Indirect Context Offset for gen10

2017-06-05 Thread Vivi, Rodrigo
On Fri, 2017-06-02 at 10:50 +0100, Tvrtko Ursulin wrote: > On 06/04/2017 20:15, Rodrigo Vivi wrote: > > From: Michel Thierry > > > > Some commit message needed just to satisfy the form. What about: Indirect Context Offset Pointer has changed for Cannonlake. INDIRECT_CTX_OFFSET[15:6] valid val

Re: [Intel-gfx] [PATCH v3 1/5] acpi, nfit: Switch to use new generic UUID API

2017-06-05 Thread Andy Shevchenko
On Mon, 2017-06-05 at 09:49 -0700, Dan Williams wrote: > On Mon, Jun 5, 2017 at 9:40 AM, Andy Shevchenko > wrote: > > There are new types and helpers that are supposed to be used in new > > code. > > > > As a preparation to get rid of legacy types and API functions do > > the conversion here. I

[Intel-gfx] [PATCH v2] drm/i915/guc: Clear enable_guc_loading in case of init failure

2017-06-05 Thread Michel Thierry
And prevent calling i915_ggtt_disable_guc twice (the first when GuC init failed, and the second time during driver unload / intel_uc_fini_hw), and hitting the GEM_BUG_ON. v2: Clear enable_guc_loading unconditionally (Michal) Make sure guc_free_load_err_log is still called (Daniele) Don't s

Re: [Intel-gfx] [PATCH 22/67] drm/i915/cnl: Add RT cache flush pipe control w/a

2017-06-05 Thread Vivi, Rodrigo
On Fri, 2017-06-02 at 11:01 +0100, Tvrtko Ursulin wrote: > On 06/04/2017 20:15, Rodrigo Vivi wrote: > > From: Ben Widawsky > > Some commit message is needed, maybe just copy&paste the comment from below. > > > > Signed-off-by: Ben Widawsky > > Signed-off-by: Rodrigo Vivi > > --- > > driver

Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Clear enable_guc_loading in case of init failure

2017-06-05 Thread Michal Wajdeczko
On Mon, Jun 05, 2017 at 10:12:51AM -0700, Michel Thierry wrote: > And prevent calling i915_ggtt_disable_guc twice (the first when GuC init > failed, and the second time during driver unload / intel_uc_fini_hw), > and hitting the GEM_BUG_ON. > > v2: Clear enable_guc_loading unconditionally (Michal)

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Clear enable_guc_loading in case of init failure (rev2)

2017-06-05 Thread Patchwork
== Series Details == Series: drm/i915/guc: Clear enable_guc_loading in case of init failure (rev2) URL : https://patchwork.freedesktop.org/series/25228/ State : success == Summary == Series 25228v2 drm/i915/guc: Clear enable_guc_loading in case of init failure https://patchwork.freedesktop.org

[Intel-gfx] [PATCH] drm/i915: Unify GT* and GT3 definitions

2017-06-05 Thread Rodrigo Vivi
This patch clean up a bit the platform definition block in a way to avoid duplications and to let clear that GT3 for the current platform only have the extra Media engine. Cc: Anusha Srivatsa Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_pci.c | 66 --

Re: [Intel-gfx] [PATCH 28/67] drm/i915/cnl: Implement .get_display_clock_speed() for CNL

2017-06-05 Thread Vivi, Rodrigo
On Fri, 2017-06-02 at 21:06 +0300, Imre Deak wrote: > On Thu, Apr 06, 2017 at 12:15:24PM -0700, Rodrigo Vivi wrote: > > From: Ville Syrjälä > > > > Add support for reading out the cdclk frequency from the hardware on > > CNL. Very similar to BXT, with a few new twists and turns: > > * the PLL is

Re: [Intel-gfx] [PATCH 28/67] drm/i915/cnl: Implement .get_display_clock_speed() for CNL

2017-06-05 Thread Ville Syrjälä
On Mon, Jun 05, 2017 at 05:59:02PM +, Vivi, Rodrigo wrote: > On Fri, 2017-06-02 at 21:06 +0300, Imre Deak wrote: > > On Thu, Apr 06, 2017 at 12:15:24PM -0700, Rodrigo Vivi wrote: > > > From: Ville Syrjälä > > > > > > Add support for reading out the cdclk frequency from the hardware on > > > C

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Unify GT* and GT3 definitions

2017-06-05 Thread Patchwork
== Series Details == Series: drm/i915: Unify GT* and GT3 definitions URL : https://patchwork.freedesktop.org/series/25299/ State : warning == Summary == Series 25299v1 drm/i915: Unify GT* and GT3 definitions https://patchwork.freedesktop.org/api/1.0/series/25299/revisions/1/mbox/ Test kms_bus

Re: [Intel-gfx] [PATCH 28/67] drm/i915/cnl: Implement .get_display_clock_speed() for CNL

2017-06-05 Thread Imre Deak
On Mon, Jun 05, 2017 at 09:04:26PM +0300, Ville Syrjälä wrote: > On Mon, Jun 05, 2017 at 05:59:02PM +, Vivi, Rodrigo wrote: > > On Fri, 2017-06-02 at 21:06 +0300, Imre Deak wrote: > > > > [...] > > > > +static void cnl_cdclk_pll_update(struct drm_i915_private *dev_priv, > > > > +

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Validate the compliance test link parameters

2017-06-05 Thread Manasi Navare
On Fri, Jun 02, 2017 at 11:27:40AM +0300, Jani Nikula wrote: > On Fri, 02 Jun 2017, Manasi Navare wrote: > > Validate the compliance test link parameters when the compliance > > test dpcd registers are read. Also validate them in compute_config > > before using them since the max values might have

Re: [Intel-gfx] [PATCH 28/67] drm/i915/cnl: Implement .get_display_clock_speed() for CNL

2017-06-05 Thread Vivi, Rodrigo
On Mon, 2017-06-05 at 21:21 +0300, Imre Deak wrote: > On Mon, Jun 05, 2017 at 09:04:26PM +0300, Ville Syrjälä wrote: > > On Mon, Jun 05, 2017 at 05:59:02PM +, Vivi, Rodrigo wrote: > > > On Fri, 2017-06-02 at 21:06 +0300, Imre Deak wrote: > > > > > [...] > > > > > +static void cnl_cdclk_pll_upda

Re: [Intel-gfx] [PATCH 2/2] drm/i915/dp: Validate the compliance test link parameters

2017-06-05 Thread Manasi Navare
On Fri, Jun 02, 2017 at 01:34:10PM +0300, Ville Syrjälä wrote: > On Thu, Jun 01, 2017 at 05:51:27PM -0700, Manasi Navare wrote: > > Validate the compliance test link parameters when the compliance > > test dpcd registers are read. Also validate them in compute_config > > before using them since the

Re: [Intel-gfx] [PATCH 36/67] drm/i915: Add MMIO helper for 6 ports with different offsets.

2017-06-05 Thread Manasi Navare
Rodrigo, Any thoughts on the ocmment here regarding defining a new macro _PORT6? I am facing a similar issue with ICL - whether to define a new macro or use the existing one _PORT3? Manasi On Wed, May 17, 2017 at 12:20:34PM -0700, Manasi Navare wrote: > On Thu, Apr 06, 2017 at 12:15:32PM -0700,

Re: [Intel-gfx] [PATCH 37/67] drm/i915/cnl: Add registers related to voltage swing sequences.

2017-06-05 Thread Manasi Navare
On Wed, May 17, 2017 at 05:59:02PM -0700, Manasi Navare wrote: > On Thu, Apr 06, 2017 at 12:15:33PM -0700, Rodrigo Vivi wrote: > > This are the registers and bits needed for the voltage swing > > sequence on Cannonlake. > > > > v2: Remove CL_DW5 that was wrongly defined. > > v3: Use (1 << 1) inste

[Intel-gfx] [PATCH i-g-t] tests/kms_setmode: Dynamic crtc/connector combinations

2017-06-05 Thread Harry Wentland
Create crtc/connector combinations based on actual adapter information obtained from drmModeRes. Also set MAX_CRTCs to 6 for AMD GPUs. Signed-off-by: Harry Wentland --- tests/kms_setmode.c | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/tests/kms_se

Re: [Intel-gfx] [PATCH v11 3/3] drm/i915: Add option to support dynamic backlight via DPCD

2017-06-05 Thread Pandiyan, Dhinakaran
On Fri, 2017-06-02 at 19:04 -0700, Puthikorn Voravootivat wrote: > This patch adds option to enable dynamic backlight for eDP > panel that supports this feature via DPCD register and > set minimum / maximum brightness to 0% and 100% of the > normal brightness. > > Change-Id: I52f04b814bb4cd9df570a

Re: [Intel-gfx] [PATCH v11 3/3] drm/i915: Add option to support dynamic backlight via DPCD

2017-06-05 Thread Puthikorn Voravootivat
Sorry forgot to remove Gerrit Change-ID before sending the email. Do you want me to send the same patches again with your reviewed-by tag and the Gerrit change-Id removed? On Mon, Jun 5, 2017 at 11:49 AM, Pandiyan, Dhinakaran < dhinakaran.pandi...@intel.com> wrote: > On Fri, 2017-06-02 at 19:04

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