[Intel-gfx] [PATCH 1/3] x86-32: Teach copy_from_user to unroll .size=6/8

2017-06-01 Thread Chris Wilson
Two exception handling register moves are faster to inline than a call to __copy_user_ll(). We already apply the conversion for a get_user() call, so for symmetry we should also apply the optimisation to copy_from_user. Signed-off-by: Chris Wilson Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Pet

[Intel-gfx] [PATCH 2/3] x86-32: Expand static copy_to_user()

2017-06-01 Thread Chris Wilson
For known compile-time fixed sizes, teach x86-32 copy_to_user() to convert them to the simpler put_user and inline it similar to the optimisation applied to copy_from_user() and already used by x86-64. Signed-off-by: Chris Wilson Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" --- ar

[Intel-gfx] [PATCH 3/3] x86-64: Inline 6/12 byte copy_user

2017-06-01 Thread Chris Wilson
Extend the list of replacements for compile-time known sizes to include 6/12 byte copies. These expand to two movs (along with their exception table) and are cheaper to inline than the function call (similar to the 10 byte copy already handled). Signed-off-by: Chris Wilson Cc: Thomas Gleixner Cc

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] x86-32: Teach copy_from_user to unroll .size=6/8

2017-06-01 Thread Patchwork
== Series Details == Series: series starting with [1/3] x86-32: Teach copy_from_user to unroll .size=6/8 URL : https://patchwork.freedesktop.org/series/25148/ State : success == Summary == Series 25148v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/25148/revisi

Re: [Intel-gfx] [PATCH 3/3] drm/i915/skl+: consider max supported plane pixel rate while scaling

2017-06-01 Thread Maarten Lankhorst
Op 26-05-17 om 17:15 schreef Mahesh Kumar: > A display resolution is only supported if it meets all the restrictions > below for Maximum Pipe Pixel Rate. > > The display resolution must fit within the maximum pixel rate output > from the pipe. Make sure that the display pipe is able to feed pixels

Re: [Intel-gfx] [PATCH] drm/i915: Guard against i915_ggtt_disable_guc() being invoked unconditionally

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 06:01:10PM -0700, Michel Thierry wrote: > On 5/31/2017 12:05 PM, Chris Wilson wrote: > >Commit 7c3f86b6dc51 ("drm/i915: Invalidate the guc ggtt TLB upon > >insertion") added the restoration of the invalidation routine after the > >GuC was disabled, but missed that the GuC wa

[Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Chris Wilson
When we enable the GuC, we enable an alternative mechanism for doing post-GGTT update invalidation. Likewise, when we disable the GuC, we restore the previous method. Assert that we change between known endpoints, so that we can catch if we accidentally clobber some other gen and if we change the i

Re: [Intel-gfx] [PATCH v6 5/6] drm/i915/gvt: Dmabuf support for GVT-g

2017-06-01 Thread Chris Wilson
On Sat, May 27, 2017 at 04:38:51PM +0800, Xiaoguang Chen wrote: > dmabuf for GVT-g can be exported to users who can use the dmabuf to show > the desktop of vm which use intel vgpu. > > Currently we provide query and create new dmabuf operations. > > Users of dmabuf can cache some created dmabufs

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Patchwork
== Series Details == Series: drm/i915/guc: Assert that we switch between known ggtt->invalidate functions URL : https://patchwork.freedesktop.org/series/25150/ State : success == Summary == Series 25150v1 drm/i915/guc: Assert that we switch between known ggtt->invalidate functions https://pa

Re: [Intel-gfx] [PATCH 18/37] drm/exynos: Drop drm_vblank_cleanup

2017-06-01 Thread Daniel Vetter
On Thu, Jun 01, 2017 at 03:15:13PM +0900, Inki Dae wrote: > > > 2017년 05월 31일 17:45에 Daniel Vetter 이(가) 쓴 글: > > On Tue, May 30, 2017 at 09:03:34AM +0900, Inki Dae wrote: > >> Hi Daniel, > >> > >> 2017년 05월 24일 23:51에 Daniel Vetter 이(가) 쓴 글: > >>> Only in the load failure path, where the hardware

Re: [Intel-gfx] [PATCH 04/15] drm/i915: introduce gem object page_sizes

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 07:51:59PM +0100, Matthew Auld wrote: > + max_page_size = BIT(fls64(obj->mm.page_sizes.sg)-1); > + > + /* If were are actually dealing with a single page-size, mark it so */ > + if (IS_ALIGNED(obj->mm.page_sizes.phys, max_page_size)) > + obj->mm.page_

Re: [Intel-gfx] [PATCH v2 2/5] ACPI / APEI: Switch to use new generic UUID API

2017-06-01 Thread Andy Shevchenko
On Thu, Jun 1, 2017 at 2:56 AM, kbuild test robot wrote: > Hi Andy, > > [auto build test ERROR on pm/linux-next] > [also build test ERROR on v4.12-rc3 next-20170531] > [if your patch is applied to the wrong git tree, please drop us a note to > help improve the system] Dropped ahead. As cover let

Re: [Intel-gfx] [PATCH 06/15] drm/i915: align 64K objects to 2M

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 07:52:01PM +0100, Matthew Auld wrote: > We can't mix 64K and 4K pte's in the same page-table, so for now we > align 64K objects to 2M to avoid any potential mixing. This is > potentially wasteful but in reality shouldn't be too bad since this only > applies to the virtual ad

Re: [Intel-gfx] [PATCH 09/15] drm/i915: disable GTT cache for 2M/1G pages

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 07:52:04PM +0100, Matthew Auld wrote: > When SW enables the use of 2M/1G pages, it must disable the GTT cache. > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > --- > drivers/gpu/drm/i915/intel_pm.c | 12 ++-- > 1 file changed, 6 insertions(+), 6 deletions(

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Michal Wajdeczko
On Thu, Jun 01, 2017 at 10:04:46AM +0100, Chris Wilson wrote: > When we enable the GuC, we enable an alternative mechanism for doing > post-GGTT update invalidation. Likewise, when we disable the GuC, we > restore the previous method. Assert that we change between known > endpoints, so that we can

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 12:03:18PM +0200, Michal Wajdeczko wrote: > On Thu, Jun 01, 2017 at 10:04:46AM +0100, Chris Wilson wrote: > > When we enable the GuC, we enable an alternative mechanism for doing > > post-GGTT update invalidation. Likewise, when we disable the GuC, we > > restore the previou

Re: [Intel-gfx] [PATCH] drm/i915: Guard against i915_ggtt_disable_guc() being invoked unconditionally

2017-06-01 Thread Joonas Lahtinen
On ke, 2017-05-31 at 20:05 +0100, Chris Wilson wrote: > Commit 7c3f86b6dc51 ("drm/i915: Invalidate the guc ggtt TLB upon > insertion") added the restoration of the invalidation routine after the > GuC was disabled, but missed that the GuC was unconditionally disabled > when not used. This then over

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Joonas Lahtinen
On to, 2017-06-01 at 12:03 +0200, Michal Wajdeczko wrote: > On Thu, Jun 01, 2017 at 10:04:46AM +0100, Chris Wilson wrote: > >   > >  void i915_ggtt_disable_guc(struct drm_i915_private *i915) > >  { > > - if (i915->ggtt.invalidate == guc_ggtt_invalidate) > > - i915->ggtt.invalidate = gen

Re: [Intel-gfx] [PATCH 02/15] drm/i915: enable THP for gemfs

2017-06-01 Thread Joonas Lahtinen
On ke, 2017-05-31 at 19:51 +0100, Matthew Auld wrote: > Enable transparent-huge-pages through gemfs by mounting with > huge=within_size. > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > Cc: Chris Wilson > @@ -41,6 +42,28 @@ struct vfsmount *i915_gemfs_create(void) >   >   gemfs_mn

[Intel-gfx] [PATCH] drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate

2017-06-01 Thread Maarten Lankhorst
Seems that GLK has a dotclock that's twice the display clock. skl_max_scale checks for IS_GEMINILAKE, so perform the same check here. While at it, change the DRM_ERROR to DEBUG_KMS. Fixes: 73b0ca8ec76d ("drm/i915/skl+: consider max supported plane pixel rate while scaling") Cc: Mahesh Kumar Sign

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Joonas Lahtinen
On to, 2017-06-01 at 10:04 +0100, Chris Wilson wrote: > When we enable the GuC, we enable an alternative mechanism for doing > post-GGTT update invalidation. Likewise, when we disable the GuC, we > restore the previous method. Assert that we change between known > endpoints, so that we can catch if

Re: [Intel-gfx] [PATCH] drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate

2017-06-01 Thread Mahesh Kumar
hmm... didn't considered 2 pixels per clock. thanks. Reviewed-by: Mahesh Kumar On Thursday 01 June 2017 04:04 PM, Maarten Lankhorst wrote: Seems that GLK has a dotclock that's twice the display clock. skl_max_scale checks for IS_GEMINILAKE, so perform the same check here. While at it, chang

Re: [Intel-gfx] [PATCH 01/15] drm/i915: really simple gemfs

2017-06-01 Thread Joonas Lahtinen
On ke, 2017-05-31 at 19:51 +0100, Matthew Auld wrote: > Not a fully blown gemfs, just our very own tmpfs kernel mount. Doing so > moves us away from the shmemfs shm_mnt, and gives us the much needed > flexibility to do things like set our own mount options, namely huge= > which should allow us to e

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate

2017-06-01 Thread Patchwork
== Series Details == Series: drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate URL : https://patchwork.freedesktop.org/series/25155/ State : success == Summary == Series 25155v1 drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate https://patchwork.fre

Re: [Intel-gfx] [PATCH] drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate

2017-06-01 Thread Maarten Lankhorst
Op 01-06-17 om 12:52 schreef Mahesh Kumar: > > hmm... didn't considered 2 pixels per clock. > > thanks. > > Reviewed-by: Mahesh Kumar > Thanks, fix pushed. :) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailma

Re: [Intel-gfx] [PATCH 03/15] drm/i915: introduce page_size_mask to dev_info

2017-06-01 Thread Joonas Lahtinen
On ke, 2017-05-31 at 19:51 +0100, Matthew Auld wrote: > In preparation for huge gtt pages expose a page_size_mask as part of the > device info, to indicate the page sizes supported by the HW.  Currently > only 4K is supported. > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > Cc: Mika Kuop

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 01:44:07PM +0300, Joonas Lahtinen wrote: > On to, 2017-06-01 at 10:04 +0100, Chris Wilson wrote: > > When we enable the GuC, we enable an alternative mechanism for doing > > post-GGTT update invalidation. Likewise, when we disable the GuC, we > > restore the previous method.

Re: [Intel-gfx] [PATCH 2/3] pwm: lpss: Add intel-gfx as consumer device in lookup table

2017-06-01 Thread Kumar, Shobhit
On Wednesday 31 May 2017 10:16 PM, kbuild test robot wrote: Hi Shobhit, [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.12-rc3 next-20170531] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] Guess this needs to

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 01:24:55PM +0300, Joonas Lahtinen wrote: > On to, 2017-06-01 at 12:03 +0200, Michal Wajdeczko wrote: > > On Thu, Jun 01, 2017 at 10:04:46AM +0100, Chris Wilson wrote: > > >   > > >  void i915_ggtt_disable_guc(struct drm_i915_private *i915) > > >  { > > > - if (i915->ggtt.inv

[Intel-gfx] [PATCH] i915: fix build on gcc7

2017-06-01 Thread Aleksa Sarai
With gcc7, the conditional usage of (port == PORT_A ? PORT_C : PORT_A) triggers -Werror=int-in-bool-context which breaks the build. Instead, use a temporary port_other variable that avoids hitting this error. % gcc --version gcc (SUSE Linux) 7.1.1 20170517 [gcc-7-branch revision 248152] Copy

Re: [Intel-gfx] [PATCH] drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Joonas Lahtinen
On to, 2017-06-01 at 12:01 +0100, Chris Wilson wrote: > On Thu, Jun 01, 2017 at 01:44:07PM +0300, Joonas Lahtinen wrote: > > > > On to, 2017-06-01 at 10:04 +0100, Chris Wilson wrote: > > > > > > When we enable the GuC, we enable an alternative mechanism for doing > > > post-GGTT update invalidati

Re: [Intel-gfx] [PATCH v15 06/14] drm/i915/perf: Add OA unit support for Gen 8+

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 01:33:47PM +0100, Lionel Landwerlin wrote: > u32 gen7_latched_oastatus1; > + u32 ctx_oactxctrl_offset; > + u32 ctx_flexeu0_offset; > + > + /* The RPT_ID/reason field for Gen8+ includes a bit >

Re: [Intel-gfx] [PATCH v15 14/14] drm/i915/perf: notify sseu configuration changes

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 01:33:55PM +0100, Lionel Landwerlin wrote: > @@ -2493,6 +2499,44 @@ struct drm_i915_private { > const struct i915_oa_format *oa_formats; > int n_builtin_sets; > } oa; > + > + struct { > +

Re: [Intel-gfx] [PATCH] i915: fix build on gcc7

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, Aleksa Sarai wrote: > With gcc7, the conditional usage of (port == PORT_A ? PORT_C : PORT_A) > triggers -Werror=int-in-bool-context which breaks the build. Instead, > use a temporary port_other variable that avoids hitting this error. > > % gcc --version > gcc (SUSE Linux)

Re: [Intel-gfx] [PATCH v15 14/14] drm/i915/perf: notify sseu configuration changes

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 01:33:55PM +0100, Lionel Landwerlin wrote: > static void > -free_oa_buffer(struct drm_i915_private *i915) > +free_sseu_buffer(struct drm_i915_private *i915) > { > - mutex_lock(&i915->drm.struct_mutex); > + i915_gem_object_unpin_map(i915->perf.sseu_buffer.vma->obj);

[Intel-gfx] ✓ Fi.CI.BAT: success for i915: fix build on gcc7

2017-06-01 Thread Patchwork
== Series Details == Series: i915: fix build on gcc7 URL : https://patchwork.freedesktop.org/series/25158/ State : success == Summary == Series 25158v1 i915: fix build on gcc7 https://patchwork.freedesktop.org/api/1.0/series/25158/revisions/1/mbox/ Test gem_exec_flush: Subgroup basic-

Re: [Intel-gfx] [PATCH 03/15] drm/i915: introduce page_size_mask to dev_info

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, Joonas Lahtinen wrote: > On ke, 2017-05-31 at 19:51 +0100, Matthew Auld wrote: >> In preparation for huge gtt pages expose a page_size_mask as part of the >> device info, to indicate the page sizes supported by the HW.  Currently >> only 4K is supported. >> >> Signed-off-by:

Re: [Intel-gfx] [PATCH] i915: fix build on gcc7

2017-06-01 Thread Aleksa Sarai
This is probably already fixed in drm-next by commit 0ad4dc887d4168448e8c801aa4edd8fe1e0bd534 Author: Hans de Goede Date: Thu May 18 13:06:44 2017 +0200 drm/i915: Fix new -Wint-in-bool-context gcc compiler warning > which I also think is a more sensible fix than this one. Ah, I didn'

Re: [Intel-gfx] Implementing Miracast

2017-06-01 Thread Martin Peres
On 01/06/17 09:02, Daniel Kasak wrote: Any news? Seems every TV I bump into these days has Miracast support ... Sorry, it must be frustrating. Some code needs to be re-implemented because it was GPL-based and we need it as MIT. Until I have some time to do this, this will probably not move fo

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ddi: Avoid long delays during system suspend / eDP disabling

2017-06-01 Thread Imre Deak
On Wed, May 31, 2017 at 05:34:42PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/ddi: Avoid long delays during system suspend / eDP disabling > URL : https://patchwork.freedesktop.org/series/25116/ > State : success > > == Summary == > > Series 25116v1 drm/i915/ddi: Avoid

Re: [Intel-gfx] [PATCH 01/15] drm/i915: really simple gemfs

2017-06-01 Thread Matthew Auld
On 1 June 2017 at 11:49, Joonas Lahtinen wrote: > On ke, 2017-05-31 at 19:51 +0100, Matthew Auld wrote: >> Not a fully blown gemfs, just our very own tmpfs kernel mount. Doing so >> moves us away from the shmemfs shm_mnt, and gives us the much needed >> flexibility to do things like set our own mo

Re: [Intel-gfx] [PATCH] drm/i915/ddi: Avoid long delays during system suspend / eDP disabling

2017-06-01 Thread Jani Nikula
On Wed, 31 May 2017, Ville Syrjälä wrote: > On Wed, May 31, 2017 at 08:05:35PM +0300, Imre Deak wrote: >> Atm disabling either DP or eDP outputs can generate a spurious short >> pulse interrupt. The reason is that after disabling the port the source >> will stop sending a valid stream data, while

Re: [Intel-gfx] [PATCH] drm/i915/dvo: fix debug logging on unknown DID

2017-06-01 Thread Jani Nikula
On Wed, 31 May 2017, Clint Taylor wrote: > On 05/31/2017 03:16 AM, Jani Nikula wrote: >> Print DID not VID on the DID error path. Looks like a copy-paste error >> from the VID error path. Clarify and clean up error logging, making them >> distinguishable from each other, while at it. > > Reviewed-

Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Assert that we switch between known ggtt->invalidate functions

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 09:36:58AM -, Patchwork wrote: > == Series Details == > > Series: drm/i915/guc: Assert that we switch between known ggtt->invalidate > functions > URL : https://patchwork.freedesktop.org/series/25150/ > State : success > > == Summary == > > Series 25150v1 drm/i915/

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Check the ring is empty when declaring the engines are idle

2017-06-01 Thread Chris Wilson
On Wed, May 31, 2017 at 05:01:53PM +0300, Mika Kuoppala wrote: > Chris Wilson writes: > > > On Tue, May 30, 2017 at 03:33:41PM +0300, Mika Kuoppala wrote: > >> Chris Wilson writes: > >> > >> > As another precaution when testing whether the CS engine is actually > >> > idle, also inspect the rin

Re: [Intel-gfx] [PATCH] drm/i915: Fix logical inversion for gen4 quirking

2017-06-01 Thread Chris Wilson
On Mon, May 22, 2017 at 08:55:09AM +0300, Joonas Lahtinen wrote: > On su, 2017-05-21 at 13:40 +0100, Chris Wilson wrote: > > The assertion that we want to make before disabling the pin of the pages > > for the unknown swizzling quirk is that the quirk is indeed active. > > > > Fixes: 2c3a3f44dc13

[Intel-gfx] [PATCH 3/3] drm/i915: Remove __GFP_NORETRY from our buffer allocator

2017-06-01 Thread Chris Wilson
I tried __GFP_NORETRY in the belief that __GFP_RECLAIM was effective. It struggles with handling reclaim via kswapd (through inconsistency within throttle_direct_reclaim() and even then the race between multiple allocators makes the two step of reclaim then allocate fragile), and as our buffers are

[Intel-gfx] [PATCH 2/3] drm/i915: Encourage our shrinker more when our shmemfs allocations fails

2017-06-01 Thread Chris Wilson
Commit 24f8e00a8a2e ("drm/i915: Prefer to report ENOMEM rather than incur the oom for gfx allocations") made the bold decision to try and avoid the oomkiller by reporting -ENOMEM to userspace if our allocation failed after attempting to free enough buffer objects. In short, it appears we were givin

[Intel-gfx] [PATCH 1/3] drm/i915: Allow kswapd to pause the device whilst reaping

2017-06-01 Thread Chris Wilson
In commit 5763ff04dc4e ("drm/i915: Avoid GPU stalls from kswapd") we stopped direct reclaim and kswapd from triggering GPU/client stalls whilst running (by restricting the objects they could reap to be idle). However with abusive GPU usage, it becomes quite easy to starve kswapd of memory and prev

Re: [Intel-gfx] [PATCH] drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 12:34:13PM +0200, Maarten Lankhorst wrote: > Seems that GLK has a dotclock that's twice the display clock. > skl_max_scale checks for IS_GEMINILAKE, so perform the same check here. > > While at it, change the DRM_ERROR to DEBUG_KMS. > > Fixes: 73b0ca8ec76d ("drm/i915/skl+:

Re: [Intel-gfx] [PATCH 4/6] drm/i915/cnp: Backlight support for CNP.

2017-06-01 Thread Jani Nikula
On Wed, 31 May 2017, Rodrigo Vivi wrote: > Split out BXT and CNP's setup_backlight(),enable_backlight(), > disable_backlight() and hz_to_pwm() into > two separate functions instead of reusing BXT function. > > Reuse set_backlight() and get_backlight() since they have > no reference to the utility

Re: [Intel-gfx] [PATCH] drm/i915/ddi: Avoid long delays during system suspend / eDP disabling

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 03:55:13PM +0300, Jani Nikula wrote: > On Wed, 31 May 2017, Ville Syrjälä wrote: > > On Wed, May 31, 2017 at 08:05:35PM +0300, Imre Deak wrote: > >> Atm disabling either DP or eDP outputs can generate a spurious short > >> pulse interrupt. The reason is that after disabling

Re: [Intel-gfx] [PATCH v2 5/5] ACPI: Switch to use generic guid_t in acpi_evaluate_dsm()

2017-06-01 Thread Jarkko Sakkinen
On Wed, May 31, 2017 at 10:41:52PM +0300, Andy Shevchenko wrote: > acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16 > bytes. Instead we convert them to use guid_t type. At the same time we > convert current users. > > acpi_str_to_uuid() becomes useless after the conversion and

Re: [Intel-gfx] [PATCH] drm/i915/ddi: Avoid long delays during system suspend / eDP disabling

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, Ville Syrjälä wrote: > On Thu, Jun 01, 2017 at 03:55:13PM +0300, Jani Nikula wrote: >> On Wed, 31 May 2017, Ville Syrjälä wrote: >> > On Wed, May 31, 2017 at 08:05:35PM +0300, Imre Deak wrote: >> >> Atm disabling either DP or eDP outputs can generate a spurious short >> >> pu

Re: [Intel-gfx] [PATCH] drm/i915/ddi: Avoid long delays during system suspend / eDP disabling

2017-06-01 Thread Imre Deak
On Thu, Jun 01, 2017 at 04:58:50PM +0300, Ville Syrjälä wrote: > On Thu, Jun 01, 2017 at 03:55:13PM +0300, Jani Nikula wrote: > > On Wed, 31 May 2017, Ville Syrjälä wrote: > > > On Wed, May 31, 2017 at 08:05:35PM +0300, Imre Deak wrote: > > >> Atm disabling either DP or eDP outputs can generate a

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Allow kswapd to pause the device whilst reaping

2017-06-01 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Allow kswapd to pause the device whilst reaping URL : https://patchwork.freedesktop.org/series/25164/ State : success == Summary == Series 25164v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/251

Re: [Intel-gfx] [PATCH v2 5/5] ACPI: Switch to use generic guid_t in acpi_evaluate_dsm()

2017-06-01 Thread Dan Williams
On Wed, May 31, 2017 at 12:41 PM, Andy Shevchenko wrote: > acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16 > bytes. Instead we convert them to use guid_t type. At the same time we > convert current users. > > acpi_str_to_uuid() becomes useless after the conversion and it's saf

Re: [Intel-gfx] [PATCH v2 1/5] acpi, nfit: Switch to use new generic UUID API

2017-06-01 Thread Dan Williams
On Wed, May 31, 2017 at 12:41 PM, Andy Shevchenko wrote: > There are new types and helpers that are supposed to be used in new code. > > As a preparation to get rid of legacy types and API functions do > the conversion here. > > Cc: Dan Williams > Signed-off-by: Andy Shevchenko > --- > drivers/

[Intel-gfx] [PATCH 0/7] drm/i915: Pipe A quirk rework

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä This series eliminates the problematic load detect abuse for the pipe A quirk. My main motivations were to isolate these quirks more from atomic to avoid regressions, and to save a bit of extra power. I believe I cooked this up a few years ago but never posted it. In the meant

[Intel-gfx] [PATCH 2/7] drm/i915: Plumb the correct acquire ctx into intel_crtc_disable_noatomic()

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä If intel_crtc_disable_noatomic() were to ever get called during resume e'd end up deadlocking since resume has its own acqcuire_ctx but intel_crtc_disable_noatomic() still tries to use the mode_config.acquire_ctx. Pass down the correct acquire ctx from the top. Cc: sta...@vge

[Intel-gfx] [PATCH 3/7] drm/i915: Use a loop for the "three times for luck" DPLL procedure

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä The magic "enable the DPLL three times" sequence feels like it deserves a loop. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 15 ++- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b

[Intel-gfx] [PATCH 4/7] drm/i915: Add i830 "pipes power well"

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä 830 more or less requires both pipes and DPLLs to remain on as long as either pipe is needed. However, when neither pipe is actually needed, we can save a bit of power by turning everything off. To do that we add a new "power well" that turns both pipes and DPLLs on and off in

[Intel-gfx] [PATCH 1/7] drm/i915: Fix deadlock witha the pipe A quirk during resume

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä Pass down the correct acquire context to the pipe A quirk load detect hack during display resume. Avoids deadlocking the entire thing. Cc: sta...@vger.kernel.org Cc: Maarten Lankhorst Fixes: e2c8b8701e2d ("drm/i915: Use atomic helpers for suspend, v2.") Signed-off-by: Ville

[Intel-gfx] [PATCH 5/7] drm/i915: Drop pipe A quirk for Toshiba Protege R205-S209

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä The pipe A force quirk shouldn't needed except on 830. So let's nuke it for the Toshiba Protege R-205/S-209 945 machines. This quirk pre-dates KMS so it's usefulness is doubtful at best now. Unfortunately the original bug report [1] isn't very helpful since it doesn't describ

[Intel-gfx] [PATCH 7/7] drm/i915: Remove pipe A quirk remnants

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä With 830 the only thing needing pipe quirks, we can just drop the quirk defines and replace the checks with IS_I830() checks. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 2 - drivers/gpu/drm/i915/intel_display.c | 92

[Intel-gfx] [PATCH 6/7] drm/i915: Drop pipe A quirk for Thinkapd T60

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä The pipe A force quirk shouldn't needed except on 830. So let's nuke it for the IBM Thinkpad T60 945 machines. This quirk pre-dates KMS so it's usefulness is doubtful at best now. The original bug report [1] describes the symptoms as "system hang on closing T60 panel lid", an

Re: [Intel-gfx] [PATCH] drm/i915/ddi: Avoid long delays during system suspend / eDP disabling

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, Imre Deak wrote: > On Thu, Jun 01, 2017 at 04:58:50PM +0300, Ville Syrjälä wrote: >> On Thu, Jun 01, 2017 at 03:55:13PM +0300, Jani Nikula wrote: >> > On Wed, 31 May 2017, Ville Syrjälä wrote: >> > > On Wed, May 31, 2017 at 08:05:35PM +0300, Imre Deak wrote: >> > >> Atm disab

Re: [Intel-gfx] [PATCH 0/7] drm/i915: Pipe A quirk rework

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 05:36:12PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Note that I'm entirely removing the few remaining pipe A quirks > for non-830 platforms as they predate KMS and the hardware > really shouldn't need them. > drm/i915: Drop pipe A quirk for

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Plumb the correct acquire ctx into intel_crtc_disable_noatomic()

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > If intel_crtc_disable_noatomic() were to ever get called during resume > e'd end up deadlocking since resume has its own acqcuire_ctx but > intel_crtc_disable_noatomic() still tries to use the > mode_config.acquire

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Fix deadlock witha the pipe A quirk during resume

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Pass down the correct acquire context to the pipe A quirk load detect > hack during display resume. Avoids deadlocking the entire thing. Have we seen this in the wild? References? BR, Jani. > > Cc: sta...@vger.k

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Use a loop for the "three times for luck" DPLL procedure

2017-06-01 Thread Jani Nikula
On Thu, 01 Jun 2017, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > The magic "enable the DPLL three times" sequence feels like it > deserves a loop. I think the copy-paste unrolled loop is more fun. ;) Reviewed-by: Jani Nikula > Signed-off-by: Ville Syrjälä > --- > drivers/

Re: [Intel-gfx] [PATCH 4/7] drm/i915: Add i830 "pipes power well"

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 05:36:16PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > 830 more or less requires both pipes and DPLLs to remain on as long > as either pipe is needed. However, when neither pipe is actually needed, > we can save a bit of power by turning everythin

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Use a loop for the "three times for luck" DPLL procedure

2017-06-01 Thread Chris Wilson
On Thu, Jun 01, 2017 at 05:36:15PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > The magic "enable the DPLL three times" sequence feels like it > deserves a loop. Hmm, I thought once upon a time we figured out what the magic was about. Or was that another loop? Reviewed

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Pipe A quirk rework

2017-06-01 Thread Patchwork
== Series Details == Series: drm/i915: Pipe A quirk rework URL : https://patchwork.freedesktop.org/series/25169/ State : success == Summary == Series 25169v1 drm/i915: Pipe A quirk rework https://patchwork.freedesktop.org/api/1.0/series/25169/revisions/1/mbox/ fi-bdw-5557u total:278 pass

[Intel-gfx] [PATCH RESEND] drm: i915: Preserve old FBC status for update without new planes

2017-06-01 Thread Gabriel Krisman Bertazi
If the atomic commit doesn't include any new plane, there is no need to choose a new CRTC for FBC, and the intel_fbc_choose_crtc() will bail out early. Although, if the FBC setup failed in the previous commit, if the current commit doesn't include new plane update, it tries to overwrite no_fbc_rea

Re: [Intel-gfx] [PATCH 30/37] drm/sti: Drop drm_vblank_cleanup

2017-06-01 Thread Vincent ABRIOU
On 05/24/2017 04:52 PM, Daniel Vetter wrote: > Seems entirely cargo-culted. > > Cc: Benjamin Gaignard > Cc: Vincent Abriou > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/sti/sti_drv.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/sti/sti_drv.c b/drivers/g

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: i915: Preserve old FBC status for update without new planes (rev2)

2017-06-01 Thread Patchwork
== Series Details == Series: drm: i915: Preserve old FBC status for update without new planes (rev2) URL : https://patchwork.freedesktop.org/series/24635/ State : success == Summary == Series 24635v2 drm: i915: Preserve old FBC status for update without new planes https://patchwork.freedesktop

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Fix deadlock witha the pipe A quirk during resume

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 05:47:45PM +0300, Jani Nikula wrote: > On Thu, 01 Jun 2017, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Pass down the correct acquire context to the pipe A quirk load detect > > hack during display resume. Avoids deadlocking the entire thing. > > H

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Plumb the correct acquire ctx into intel_crtc_disable_noatomic()

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 05:48:16PM +0300, Jani Nikula wrote: > On Thu, 01 Jun 2017, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > If intel_crtc_disable_noatomic() were to ever get called during resume > > e'd end up deadlocking since resume has its own acqcuire_ctx but > > i

Re: [Intel-gfx] [PATCH i-g-t] tests/kms_setmode: increase MAX_CRTCS to 6

2017-06-01 Thread Harry Wentland
Please ignore what I wrote. Looks like I was a bit hasty in my judgement. The code just doesn't read easily but seems correct, other than the array size. Harry On 2017-05-31 04:17 PM, Harry Wentland wrote: On 2017-05-31 09:32 AM, Harry Wentland wrote: On 2017-05-31 05:37 AM, Daniel Vetter wr

Re: [Intel-gfx] [PATCH 3/7] drm/i915: Use a loop for the "three times for luck" DPLL procedure

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 03:48:51PM +0100, Chris Wilson wrote: > On Thu, Jun 01, 2017 at 05:36:15PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > The magic "enable the DPLL three times" sequence feels like it > > deserves a loop. > > Hmm, I thought once upon a time

Re: [Intel-gfx] [PATCH 4/7] drm/i915: Add i830 "pipes power well"

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 03:46:43PM +0100, Chris Wilson wrote: > On Thu, Jun 01, 2017 at 05:36:16PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > 830 more or less requires both pipes and DPLLs to remain on as long > > as either pipe is needed. However, when neither pi

Re: [Intel-gfx] [PATCH 04/13] drm/i915/cnp: Backlight support for CNP.

2017-06-01 Thread Vivi, Rodrigo
On Thu, 2017-06-01 at 02:15 +, Pandiyan, Dhinakaran wrote: > On Tue, 2017-05-30 at 15:42 -0700, Rodrigo Vivi wrote: > > Split out BXT and CNP's setup_backlight(),enable_backlight(), > > disable_backlight() and hz_to_pwm() into > > two separate functions instead of reusing BXT function. > > > >

Re: [Intel-gfx] [PATCH v6 4/6] vfio: Define vfio based vgpu's dma-buf operations

2017-06-01 Thread Alex Williamson
On Thu, 1 Jun 2017 03:01:28 + "Chen, Xiaoguang" wrote: > Hi Kirti, > > >-Original Message- > >From: Kirti Wankhede [mailto:kwankh...@nvidia.com] > >Sent: Thursday, June 01, 2017 1:23 AM > >To: Chen, Xiaoguang ; Gerd Hoffmann > >; alex.william...@redhat.com; ch...@chris-wilson.co.uk;

[Intel-gfx] [PATCH 2/2] drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty

2017-06-01 Thread Chris Wilson
For ease of use (i.e. avoiding a few checks and function calls), store the object's cache coherency next to the cache is dirty bit. Signed-off-by: Chris Wilson Cc: Dongwon Kim Cc: Matt Roper Tested-by: Dongwon Kim --- drivers/gpu/drm/i915/i915_gem.c | 14 +++--- drive

[Intel-gfx] [PATCH 1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes

2017-06-01 Thread Chris Wilson
Currently, we only mark the CPU cache as dirty if we skip a clflush. This leads to some confusion where we have to ask if the object is in the write domain or missed a clflush. If we always mark the cache as dirty, this becomes a much simply question to answer. The goal remains to do as few clflus

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Plumb the correct acquire ctx into intel_crtc_disable_noatomic()

2017-06-01 Thread Ville Syrjälä
On Thu, Jun 01, 2017 at 07:05:41PM +0300, Ville Syrjälä wrote: > On Thu, Jun 01, 2017 at 05:48:16PM +0300, Jani Nikula wrote: > > On Thu, 01 Jun 2017, ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > > > If intel_crtc_disable_noatomic() were to ever get called during resume >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes

2017-06-01 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Mark CPU cache as dirty on every transition for CPU writes URL : https://patchwork.freedesktop.org/series/25173/ State : success == Summary == Series 25173v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0

Re: [Intel-gfx] [PATCH] drm/i915/glk: Fix dotclock calculation in skl_check_pipe_max_pixel_rate

2017-06-01 Thread Maarten Lankhorst
Op 01-06-17 om 15:52 schreef Ville Syrjälä: > On Thu, Jun 01, 2017 at 12:34:13PM +0200, Maarten Lankhorst wrote: >> Seems that GLK has a dotclock that's twice the display clock. >> skl_max_scale checks for IS_GEMINILAKE, so perform the same check here. >> >> While at it, change the DRM_ERROR to DEB

Re: [Intel-gfx] [PATCH 04/13] drm/i915/cnp: Backlight support for CNP.

2017-06-01 Thread Pandiyan, Dhinakaran
Based on your clarification the second option feels like the right choice, with a relevant comment in code. Like you said, we get to retain BXT register definitions and clarify that the register is on a PCH for CNP. -DK -Original Message- From: Vivi, Rodrigo Sent: Thursday, June 1, 20

[Intel-gfx] [PATCH] drm/i915: Implement fbc_status "Compressing" info for all platforms

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä The number of compressed segments has been available ever since FBC2 was introduced in g4x, it just moved from the STATUS register into STATUS2 on IVB. For FBC1 if we really wanted the number of compressed segments we'd have to trawl through the tags, but in this case since t

Re: [Intel-gfx] [PATCH v6 6/6] drm/i915/gvt: Adding interface so user space can get the dma-buf

2017-06-01 Thread Alex Williamson
On Sat, 27 May 2017 16:38:52 +0800 Xiaoguang Chen wrote: > User space should create the management fd for the dma-buf operation first. > Then user can query the plane information and create dma-buf if necessary > using the management fd. > > Signed-off-by: Xiaoguang Chen > --- > drivers/gpu/dr

[Intel-gfx] [PATCH] drm/i915: Remove dead code from runtime resume handler

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä Remove the SNB PCH refclock init call from the runtime resume handler. I don't think it was actually needed even when we had SNB runtime PM, and if definitely isn't needed ever since SNB runtime PM was nuked in commit d4c5636e7447 ("drm/i915: Remove runtime PM for SNB"). Cc:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Implement fbc_status "Compressing" info for all platforms

2017-06-01 Thread Patchwork
== Series Details == Series: drm/i915: Implement fbc_status "Compressing" info for all platforms URL : https://patchwork.freedesktop.org/series/25176/ State : success == Summary == Series 25176v1 drm/i915: Implement fbc_status "Compressing" info for all platforms https://patchwork.freedesktop

Re: [Intel-gfx] [PATCH v6 4/6] vfio: Define vfio based vgpu's dma-buf operations

2017-06-01 Thread Kirti Wankhede
On 6/1/2017 10:08 PM, Alex Williamson wrote: > On Thu, 1 Jun 2017 03:01:28 + > "Chen, Xiaoguang" wrote: > >> Hi Kirti, >> >>> -Original Message- >>> From: Kirti Wankhede [mailto:kwankh...@nvidia.com] >>> Sent: Thursday, June 01, 2017 1:23 AM >>> To: Chen, Xiaoguang ; Gerd Hoffmann >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove dead code from runtime resume handler

2017-06-01 Thread Patchwork
== Series Details == Series: drm/i915: Remove dead code from runtime resume handler URL : https://patchwork.freedesktop.org/series/25182/ State : success == Summary == Series 25182v1 drm/i915: Remove dead code from runtime resume handler https://patchwork.freedesktop.org/api/1.0/series/25182/r

[Intel-gfx] [PATCH i-g-t] tests/kms_cursor_crc: Test non-square cursors on IVB+

2017-06-01 Thread ville . syrjala
From: Ville Syrjälä IVB+ have the cursor "FBC" feature, meaning they support a somewhat limited form of non-square cursors. Let's test that. Signed-off-by: Ville Syrjälä --- tests/kms_cursor_crc.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tests/kms_cursor_crc.c

Re: [Intel-gfx] [PATCH v2 01/11] drm: Add HDMI 2.0 VIC support for AVI info-frames

2017-06-01 Thread Ville Syrjälä
On Wed, May 31, 2017 at 09:06:12PM +0530, Sharma, Shashank wrote: > Regards > > Shashank > > > On 5/31/2017 6:11 PM, Ville Syrjälä wrote: > > On Tue, May 30, 2017 at 10:00:12PM +0530, Sharma, Shashank wrote: > >> Regards > >> > >> Shashank > >> > >> > >> On 5/30/2017 9:43 PM, Ville Syrjälä wrote

[Intel-gfx] [PATCH 2/6] drm-tip: 2017y-06m-01d-13h-29m-05s UTC integration manifest

2017-06-01 Thread Rodrigo Vivi
From: Chris Wilson --- integration-manifest | 26 ++ 1 file changed, 26 insertions(+) create mode 100644 integration-manifest diff --git a/integration-manifest b/integration-manifest new file mode 100644 index 000..bb20fc4 --- /dev/null +++ b/integration-manifest @@

[Intel-gfx] [PATCH 1/6] drm/i915: Fix logical inversion for gen4 quirking

2017-06-01 Thread Rodrigo Vivi
From: Chris Wilson The assertion that we want to make before disabling the pin of the pages for the unknown swizzling quirk is that the quirk is indeed active, and that the quirk is disabled before we do apply it to the pages. Fixes: 2c3a3f44dc13 ("drm/i915: Fix pages pin counting around swizzle

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