On 2016.11.10 15:54:51 +0300, Dan Carpenter wrote:
> Hello Zhi Wang,
>
> The patch 04d348ae3f0a: "drm/i915/gvt: vGPU display virtualization"
> from Apr 25, 2016, leads to the following static checker warning:
>
> drivers/gpu/drm/i915/gvt/edid.c:506 intel_gvt_i2c_handle_aux_ch_write()
>
On Fri, Nov 11, 2016 at 04:08:58PM +0800, Zhenyu Wang wrote:
>
> On 2016.11.10 15:54:51 +0300, Dan Carpenter wrote:
> > Hello Zhi Wang,
> >
> > The patch 04d348ae3f0a: "drm/i915/gvt: vGPU display virtualization"
> > from Apr 25, 2016, leads to the following static checker warning:
> >
> > dr
On Fri, 11 Nov 2016, Rodrigo Vivi wrote:
> According to Bspec we need to
> "Poll for PORT_REF_DW3_A grc_done == 1b"
> only on ports B and C initialization sequence when
> copying rcomp from port A.
>
> So let's follow the spec and only poll for that case
> and not on every port A initialization.
>
On Fri, 11 Nov 2016, "Yang, Libin" wrote:
> Hi Jani,
>
>> -Original Message-
>> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>> Sent: Thursday, November 10, 2016 6:37 PM
>> To: Yang, Libin ; intel-gfx@lists.freedesktop.org;
>> ville.syrj...@linux.intel.com; Vetter, Daniel ;
>> ti
On 2016.11.11 08:28:28 +, Chris Wilson wrote:
> On Fri, Nov 11, 2016 at 04:08:58PM +0800, Zhenyu Wang wrote:
> >
> > On 2016.11.10 15:54:51 +0300, Dan Carpenter wrote:
> > > Hello Zhi Wang,
> > >
> > > The patch 04d348ae3f0a: "drm/i915/gvt: vGPU display virtualization"
> > > from Apr 25, 2016
Amdgpu dal implementation will do a test link training at end of detection to
verify we can achieve the capability reported in DPCD. We then report mode
base on result of test training.
AMD hardware (at least the generations supported by amdgpu) is able to link
train without timing being setup
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Friday, November 11, 2016 4:41 PM
> To: Yang, Libin ; intel-gfx@lists.freedesktop.org;
> ville.syrj...@linux.intel.com; Vetter, Daniel ;
> ti...@suse.de
> Subject: RE: [PATCH v2] drm/i915/audio: fix hdmi
From: Tvrtko Ursulin
Scatterlist entries have an unsigned int for the offset so
correct the sg_alloc_table_from_pages function accordingly.
Since these are offsets withing a page, unsigned int is
wide enough.
Also converts callers which were using unsigned long locally
with the lower_32_bits an
From: Tvrtko Ursulin
Since the scatterlist length field is an unsigned int, make
sure that sg_alloc_table_from_pages does not overflow it while
coallescing pages to a single entry.
v2: Drop reference to future use. Use UINT_MAX.
Signed-off-by: Tvrtko Ursulin
Cc: Masahiro Yamada
Cc: linux-ker.
From: Tvrtko Ursulin
Drivers like i915 benefit from being able to control the maxium
size of the sg coallesced segment while building the scatter-
gather list.
Introduce and export the __sg_alloc_table_from_pages function
which will allow it that control.
Signed-off-by: Tvrtko Ursulin
Cc: Masa
From: Tvrtko Ursulin
With the addition of __sg_alloc_table_from_pages we can control
the maximum coallescing size and eliminate a separate path for
allocating backing store here.
Similar to 871dfbd67d4e ("drm/i915: Allow compaction upto
SWIOTLB max segment size") this enables more compact sg lis
From: Tvrtko Ursulin
Userptr backing store with SWIOTBL active is currently allocated in the same
inefficient manner, with one sg entry per object page, as what the commit
871dfbd67d4e ("drm/i915: Allow compaction upto SWIOTLB max segment size") fixed
for regular GEM objects.
We can fix that by
From: Libin Yang
Some monitors will have noise or even no sound after
applying the patch 6014ac12.
In patch 6014ac12, it will reset the cts value to 0 for HDMI.
However, we need to disable Enable CTS or M Prog bit. This is
the initial setting after HW reset.
Fixes: 6014ac122ed0 ("drm/i915/audio
Hi,
I was implementing this suggestion today and I think that will confuse
users and also devs maintaining that code. Out of the following reason:
compress_color_range can be true or false, it does not reference a mode,
but an additional setting that only influences color clamping / scaling.
What
From: Tvrtko Ursulin
With the addition of __sg_alloc_table_from_pages we can control
the maximum coallescing size and eliminate a separate path for
allocating backing store here.
Similar to 871dfbd67d4e ("drm/i915: Allow compaction upto
SWIOTLB max segment size") this enables more compact sg lis
== Series Details ==
Series: drm/i915/audio: fix hdmi audio noise issue (rev3)
URL : https://patchwork.freedesktop.org/series/15012/
State : warning
== Summary ==
Series 15012v3 drm/i915/audio: fix hdmi audio noise issue
https://patchwork.freedesktop.org/api/1.0/series/15012/revisions/3/mbox/
On Wed, Nov 09, 2016 at 04:59:31PM +, Eric Engestrom wrote:
> On Wednesday, 2016-11-09 14:13:40 +0100, Daniel Vetter wrote:
> > On Wed, Nov 9, 2016 at 12:42 PM, Eric Engestrom
> > wrote:
> > >> Well, had to drop it again since it didn't compile:
> > >>
> > >>
> > >> CC [M] drivers/gpu/drm/d
On Thu, 10 Nov 2016, Daniel Vetter wrote:
> On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
>> @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct intel_dp
>> *intel_dp,
>> return false;
>> }
>>
>> +static void intel_dp_modeset_retry_work_fn(struct work_struc
On Fri, 11 Nov 2016, libin.y...@intel.com wrote:
> From: Libin Yang
>
> Some monitors will have noise or even no sound after
> applying the patch 6014ac12.
>
> In patch 6014ac12, it will reset the cts value to 0 for HDMI.
> However, we need to disable Enable CTS or M Prog bit. This is
> the initia
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Abdiel Janulgue
---
tests/gem_wait.c | 125 ---
1 file changed, 7 insertions(+), 118 deletions(-)
diff --git a/tests/gem_wait.c b/tests/gem_wait.c
index b4127de..785bb14 100644
--- a/tests/gem
v5: Add kms_busy to satisfy rule of 3.
- Abdiel
[PATCH 1/4] lib: add igt_dummyload
[PATCH 2/4] igt/gem_wait: Use new igt_spin_batch
[PATCH 3/4] igt/kms_flip: Use new igt_spin_batch
[PATCH 4/4] igt/kms_busy.c: Use new igt_spin_batch
___
Intel-gfx mailing
A lot of igt testcases need some GPU workload to make sure a race
window is big enough. Unfortunately having a fixed amount of
workload leads to spurious test failures or overtly long runtimes
on some fast/slow platforms. This library contains functionality
to submit GPU workloads that should consu
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Abdiel Janulgue
---
tests/kms_flip.c | 185 ++-
1 file changed, 4 insertions(+), 181 deletions(-)
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 2a9fe2e..79cb783 100644
--- a/tests/kms
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Abdiel Janulgue
---
tests/kms_busy.c | 75 +++-
1 file changed, 4 insertions(+), 71 deletions(-)
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index b555f99..d0fe412 100644
--- a/tests/kms_
== Series Details ==
Series: Compact userptr object backing store allocation (rev2)
URL : https://patchwork.freedesktop.org/series/15151/
State : success
== Summary ==
Series 15151v2 Compact userptr object backing store allocation
https://patchwork.freedesktop.org/api/1.0/series/15151/revision
== Series Details ==
Series: drm/i915: Split out i915_vma.c (rev3)
URL : https://patchwork.freedesktop.org/series/15095/
State : failure
== Summary ==
from ./include/uapi/linux/types.h:13,
from ./include/linux/types.h:5,
from ./include/linux/c
On Fri, Nov 11, 2016 at 08:50:18AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Since the scatterlist length field is an unsigned int, make
> sure that sg_alloc_table_from_pages does not overflow it while
> coallescing pages to a single entry.
>
> v2: Drop reference to future use. Use
On Fri, Nov 11, 2016 at 08:50:20AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> With the addition of __sg_alloc_table_from_pages we can control
> the maximum coallescing size and eliminate a separate path for
> allocating backing store here.
>
> Similar to 871dfbd67d4e ("drm/i915: All
On Fri, Nov 11, 2016 at 08:50:19AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Drivers like i915 benefit from being able to control the maxium
> size of the sg coallesced segment while building the scatter-
> gather list.
>
> Introduce and export the __sg_alloc_table_from_pages funct
On 10/11/2016 16:18, Tvrtko Ursulin wrote:
On 10/11/2016 10:15, Tomeu Vizoso wrote:
GEM_SET_TILING doesn't care about Yf or Ys, so just pass Y.
Signed-off-by: Tomeu Vizoso
---
lib/ioctl_wrappers.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrapper
== Series Details ==
Series: drm/i915: Split out i915_vma.c (rev3)
URL : https://patchwork.freedesktop.org/series/15095/
State : failure
== Summary ==
# define unlikely(x) __builtin_expect(!!(x), 0)
^
drivers/gpu/drm/i915/i915_gem.h:29:26: note: in ex
Evaluate GEM_BUG_ON expression similar to actual BUG_ON even if
DEBUG_GEM is disabled.
Cc: Arnd Bergmann
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i9
On Fri, Nov 11, 2016 at 12:40:45PM +0200, Joonas Lahtinen wrote:
> Evaluate GEM_BUG_ON expression similar to actual BUG_ON even if
> DEBUG_GEM is disabled.
>
> Cc: Arnd Bergmann
> Cc: Chris Wilson
> Cc: Daniel Vetter
> Signed-off-by: Joonas Lahtinen
> ---
> drivers/gpu/drm/i915/i915_gem.h | 2
== Series Details ==
Series: drm/i915: Always evaluate GEM_BUG_ON expression
URL : https://patchwork.freedesktop.org/series/15156/
State : success
== Summary ==
Series 15156v1 drm/i915: Always evaluate GEM_BUG_ON expression
https://patchwork.freedesktop.org/api/1.0/series/15156/revisions/1/mbo
On 11/10/2016 05:23 PM, Tvrtko Ursulin wrote:
>
> On 10/11/2016 13:17, Tomeu Vizoso wrote:
>> On 1 November 2016 at 16:44, Tvrtko Ursulin wrote:
>>>
>>> Hi,
>>>
>>>
>>>
>>> On 02/03/16 14:00, Tomeu Vizoso wrote:
igt_create_bo_with_dimensions() is intended to abstract differences
be
On 11/11/2016 11:23, Tomeu Vizoso wrote:
On 11/10/2016 05:23 PM, Tvrtko Ursulin wrote:
On 10/11/2016 13:17, Tomeu Vizoso wrote:
On 1 November 2016 at 16:44, Tvrtko Ursulin wrote:
Hi,
On 02/03/16 14:00, Tomeu Vizoso wrote:
igt_create_bo_with_dimensions() is intended to abstract differe
== Series Details ==
Series: drm/i915: Split out i915_vma.c (rev4)
URL : https://patchwork.freedesktop.org/series/15095/
State : warning
== Summary ==
Series 15095v4 drm/i915: Split out i915_vma.c
https://patchwork.freedesktop.org/api/1.0/series/15095/revisions/4/mbox/
Test kms_pipe_crc_basic
HI,
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Patchwork
> Sent: Friday, November 11, 2016 1:47 PM
> To: Joonas Lahtinen
> Cc: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Split out i9
On 11/11/2016 11:05, Chris Wilson wrote:
On Fri, Nov 11, 2016 at 12:40:45PM +0200, Joonas Lahtinen wrote:
Evaluate GEM_BUG_ON expression similar to actual BUG_ON even if
DEBUG_GEM is disabled.
Cc: Arnd Bergmann
Cc: Chris Wilson
Cc: Daniel Vetter
Signed-off-by: Joonas Lahtinen
---
drivers/
From: Tvrtko Ursulin
Drivers like i915 benefit from being able to control the maxium
size of the sg coallesced segment while building the scatter-
gather list.
Introduce and export the __sg_alloc_table_from_pages function
which will allow it that control.
v2: Reorder parameters. (Chris Wilson)
From: Tvrtko Ursulin
With the addition of __sg_alloc_table_from_pages we can control
the maximum coallescing size and eliminate a separate path for
allocating backing store here.
Similar to 871dfbd67d4e ("drm/i915: Allow compaction upto
SWIOTLB max segment size") this enables more compact sg lis
On pe, 2016-11-11 at 11:47 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Split out i915_vma.c (rev4)
> URL : https://patchwork.freedesktop.org/series/15095/
> State : warning
>
> == Summary ==
>
> Series 15095v4 drm/i915: Split out i915_vma.c
> https://patchwork.freedesk
Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
property. Make ctx param test to accept both variants for now
until kernel changes have landed, to not break BAT.
v: check against - EINVAL on get/set ban as it can return -EPERM
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
-
On to, 2016-11-10 at 15:07 +, Chris Wilson wrote:
> When we release the shmem backing storage, we make sure that the pages
> are coherent with the cpu cache. However, our clflush routine was
> skipping the flush as the object had no pages at release time. Fix this by
> explicitly flushing the s
On to, 2016-11-10 at 17:03 -0800, Rodrigo Vivi wrote:
> According to Bspec we need to
> "Poll for PORT_REF_DW3_A grc_done == 1b"
> only on ports B and C initialization sequence when
> copying rcomp from port A.
>
> So let's follow the spec and only poll for that case
> and not on every port A init
On 11 November 2016 at 12:33, Tvrtko Ursulin
wrote:
>
> On 11/11/2016 11:23, Tomeu Vizoso wrote:
>>
>> On 11/10/2016 05:23 PM, Tvrtko Ursulin wrote:
>>>
>>>
>>> On 10/11/2016 13:17, Tomeu Vizoso wrote:
On 1 November 2016 at 16:44, Tvrtko Ursulin
wrote:
>
>
> Hi,
>
>
Joonas rightly complained that the current output is useless and just
confuses.
Cc: Joonas Lahtinen
Signed-off-by: Daniel Vetter
---
dim | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/dim b/dim
index dcdc19a9c82d..eba20509cda8 100755
--- a/dim
+++ b/dim
@@ -325,9 +325
On to, 2016-11-10 at 17:36 +, Chris Wilson wrote:
> In order to walk the list of all timelines, we currently require the
> struct_mutex. We are sometimes called prior to the struct_mutex being
> taken by the caller (i.e !I915_WAIT_LOCKED) in which case we can only
> trust the global execution t
Hi!
I'm currently trying to enable the 2nd display on our Bay Trail
Atom E3845 SoC. This is on the Congatec SoM "conga-QA3":
http://www.congatec.com/en/products/qseven/conga-qa3.html
On this SoM, the eDP is converted to LVDS via an NXP PTN3460
and available as LVDS on the baseboard. My current s
== Series Details ==
Series: Compact userptr object backing store allocation (rev4)
URL : https://patchwork.freedesktop.org/series/15151/
State : failure
== Summary ==
Series 15151v4 Compact userptr object backing store allocation
https://patchwork.freedesktop.org/api/1.0/series/15151/revision
Geminilake is mostly backwards compatible with broxton, so change most
of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
platforms will be implemented in follow-up patches.
v2: Don't reuse broxton's path in intel_update_max_cdclk().
Don't set plane count as in broxton.
v3: R
On Thu, 2016-11-10 at 09:03 -0800, Rodrigo Vivi wrote:
> Yep, it is probably better to merge Jani patch before while no platform
> is using that flag, but one way or another feel free to use:
Agreed. I'll send an updated version of the first two patches because of the
ddb_size that is wrong, so I
On Fri, 11 Nov 2016, Daniel Vetter wrote:
> Joonas rightly complained that the current output is useless and just
> confuses.
>
> Cc: Joonas Lahtinen
> Signed-off-by: Daniel Vetter
> ---
> dim | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/dim b/dim
> index dcdc1
On Wed, Nov 09, 2016 at 09:32:29PM -0800, Dhinakaran Pandiyan wrote:
> We store DP link rates as link clock frequencies in kHz, just like all
> other clock values. But, DP link rates in the DP Spec are expressed in
> Gbps/lane, which seems to have led to some confusion.
>
> E.g., for HBR2
> Max. d
On Thu, Nov 10, 2016 at 09:52:34PM +0530, Goel, Akash wrote:
>
>
> On 11/10/2016 11:06 AM, Hugh Dickins wrote:
> >On Fri, 4 Nov 2016, akash.g...@intel.com wrote:
> >>Cc: Hugh Dickins
> >>Cc: linux...@kvack.org
> >>Cc: linux-ker...@vger.linux.org
> >>Signed-off-by: Sourab Gupta
> >>Signed-off-by
On Fri, Nov 11, 2016 at 03:23:49PM +0200, Joonas Lahtinen wrote:
> On to, 2016-11-10 at 17:36 +, Chris Wilson wrote:
> > In order to walk the list of all timelines, we currently require the
> > struct_mutex. We are sometimes called prior to the struct_mutex being
> > taken by the caller (i.e !I
Geminilake is mostly backwards compatible with broxton, so change most
of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
platforms will be implemented in follow-up patches.
v2: Don't reuse broxton's path in intel_update_max_cdclk().
Don't set plane count as in broxton.
v3: R
Resent with proper --in-reply-to . Please ignore.
On Fri, 2016-11-11 at 15:31 +0200, Ander Conselvan de Oliveira wrote:
> Geminilake is mostly backwards compatible with broxton, so change most
> of the IS_BROXTON() checks to IS_GEN9_LP(). Differences between the
> platforms will be implemented in
On Fri, Nov 11, 2016 at 02:19:36PM +0100, Stefan Roese wrote:
> Hi!
>
> I'm currently trying to enable the 2nd display on our Bay Trail
> Atom E3845 SoC. This is on the Congatec SoM "conga-QA3":
>
> http://www.congatec.com/en/products/qseven/conga-qa3.html
>
> On this SoM, the eDP is converted t
Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
property. Make ctx param test to accept both variants for now
until kernel changes have landed, to not break BAT.
v2: check against - EINVAL on get/set ban as it can return -EPERM
v3: better naming for get/set (Chris)
Cc: Chris
On Fri, Nov 11, 2016 at 09:53:35AM +0100, Peter Frühberger wrote:
> Hi,
>
> I was implementing this suggestion today and I think that will confuse
> users and also devs maintaining that code. Out of the following reason:
> compress_color_range can be true or false, it does not reference a mode,
>
== Series Details ==
Series: drm/i915/glk: Reuse broxton code for geminilake
URL : https://patchwork.freedesktop.org/series/15167/
State : failure
== Summary ==
make[4]: *** Waiting for unfinished jobs
LD drivers/usb/gadget/udc/udc-core.o
LD drivers/spi/built-in.o
LD d
On Fri, Nov 11, 2016 at 03:55:03PM +0200, Mika Kuoppala wrote:
> Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
> property. Make ctx param test to accept both variants for now
> until kernel changes have landed, to not break BAT.
>
> v2: check against - EINVAL on get/set ban
On Thu, Nov 10, 2016 at 06:51:40PM +, Cheng, Tony wrote:
> Amdgpu dal implementation will do a test link training at end of detection to
> verify we can achieve the capability reported in DPCD. We then report mode
> base on result of test training.
>
> AMD hardware (at least the generations
On Thu, Nov 10, 2016 at 09:58:31PM +0100, Daniel Vetter wrote:
> On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
> > @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct intel_dp
> > *intel_dp,
> > return false;
> > }
> >
> > +static void intel_dp_modeset_retry_
Mika Kuoppala writes:
> Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
> property. Make ctx param test to accept both variants for now
> until kernel changes have landed, to not break BAT.
>
The kernel parts are in:
https://cgit.freedesktop.org/~miku/drm-intel/log/?h=hangch
From: Tvrtko Ursulin
Drivers like i915 benefit from being able to control the maxium
size of the sg coallesced segment while building the scatter-
gather list.
Introduce and export the __sg_alloc_table_from_pages function
which will allow it that control.
v2: Reorder parameters. (Chris Wilson)
The kernel expects that BOs for framebuffers with
I915_FORMAT_MOD_Yf_TILED will have I915_TILING_NONE.
Fixes: 050c00d53f39 ("lib: Pass I915_TILING_Y to the kernel if Yf or Ys")
Cc: Tvrtko Ursulin
Signed-off-by: Tomeu Vizoso
---
lib/ioctl_wrappers.c | 3 ++-
1 file changed, 2 insertions(+), 1 de
If available by default. This saves quite a pile of disk-space that
imo making it the default is justified.
Note that this will break the rebuild-nightly script for now,
follow-up patches will fix that.
v2: Rebase to put the dim rework at the end of the series.
Signed-off-by: Daniel Vetter
---
Needs new url-mapping information in nightly.conf to work properly. Only
leftover bit from my original patch after rebasing is to abstract away
the remote for the integration tree.
v2:
- Fix typo when calling rr_cache_dir. Oops.
- Use cut -f 1 instead of sed/regex horrors (jani).
v3: Fix bug that
When there's a working-tree checkout we need to remove that first,
before removing the branch. git complains otherwise. Not sure,
but this might be a recently added more strict test for the git
worktree support, at least I believe the "branch still checkout out
in $dir" warning is new-ish.
v2: Mov
Joonas rightly complained that the current output is useless and just
confuses.
v2: Bikeshed stuff some more.
Cc: Joonas Lahtinen
Signed-off-by: Daniel Vetter
---
dim | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/dim b/dim
index 30aa8485e5
The goals here are multiple:
- simpler configuration through autodetection
- allows seamless upgrading to git worktree for the aux checkouts
- eventually I want to split up drm-misc into a separate remote ...
And yes this is just a start.
v2: Print errors to stderr, otherwise they can't be seen w
Chris Wilson writes:
> On Fri, Nov 11, 2016 at 03:55:03PM +0200, Mika Kuoppala wrote:
>> Context BAN_PERIOD will get depracated so subsitute it with BANNABLE
>> property. Make ctx param test to accept both variants for now
>> until kernel changes have landed, to not break BAT.
>>
>> v2: check ag
== Series Details ==
Series: Geminilake enabling (rev2)
URL : https://patchwork.freedesktop.org/series/15118/
State : success
== Summary ==
Series 15118v2 Geminilake enabling
https://patchwork.freedesktop.org/api/1.0/series/15118/revisions/2/mbox/
fi-bdw-5557u total:244 pass:229 dwarn:
When we release the shmem backing storage, we make sure that the pages
are coherent with the cpu cache. However, our clflush routine was
skipping the flush as the object had no pages at release time. Fix this by
explicitly flushing the sg_table we are decoupling.
Fixes: 03ac84f1830e ("drm/i915: Pa
In order to walk the list of all timelines, we currently require the
struct_mutex. We are sometimes called prior to the struct_mutex being
taken by the caller (i.e !I915_WAIT_LOCKED) in which case we can only
trust the global execution timelines (as these are owned by the device).
This means in the
On 10/11/2016 09:42, Tvrtko Ursulin wrote:
On 09/11/2016 12:45, Patchwork wrote:
== Series Details ==
Series: dev_priv cleanup continuation (rev3)
URL : https://patchwork.freedesktop.org/series/14844/
State : success
== Summary ==
Series 14844v3 dev_priv cleanup continuation
https://patchw
On Thu, Nov 10, 2016 at 10:35:09AM -0600, Pierre-Louis Bossart wrote:
> On 11/9/16 7:19 AM, Mark Brown wrote:
> > None of which is at all unusal. The Intel hardware really doesn't seem
> > like the sort of special snowflake that people appear to believe it to
> > be.
> I am not sure if this repl
== Series Details ==
Series: Compact userptr object backing store allocation (rev5)
URL : https://patchwork.freedesktop.org/series/15151/
State : success
== Summary ==
Series 15151v5 Compact userptr object backing store allocation
https://patchwork.freedesktop.org/api/1.0/series/15151/revision
Hi Ander,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-2016]
[cannot apply to v4.9-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ander-Conselvan
On Fri, Nov 11, 2016 at 04:08:26PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 10, 2016 at 09:58:31PM +0100, Daniel Vetter wrote:
> > On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
> > > @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct
> > > intel_dp *intel_dp,
> >
Hi Ander,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-2016]
[cannot apply to v4.9-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Ander-Conselvan
On Fri, Nov 11, 2016 at 11:41:22AM +0200, Jani Nikula wrote:
> On Thu, 10 Nov 2016, Daniel Vetter wrote:
> > On Wed, Nov 09, 2016 at 08:42:08PM -0800, Manasi Navare wrote:
> >> @@ -5692,6 +5751,39 @@ static bool intel_edp_init_connector(struct
> >> intel_dp *intel_dp,
> >>return false;
> >>
Hi!
I'm currently trying to enable the 2nd display on our Bay Trail
Atom E3845 SoC. This is on the Congatec SoM "conga-QA3":
http://www.congatec.com/en/products/qseven/conga-qa3.html
On this SoM, the eDP is converted to LVDS via an NXP PTN3460
and available as LVDS on the baseboard. My current s
On Fri, Nov 11, 2016 at 03:37:04PM +0200, Jani Nikula wrote:
> On Fri, 11 Nov 2016, Daniel Vetter wrote:
> > Joonas rightly complained that the current output is useless and just
> > confuses.
> >
> > Cc: Joonas Lahtinen
> > Signed-off-by: Daniel Vetter
> > ---
> > dim | 6 --
> > 1 file ch
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: Only wait upon the execution
timeline when unlocked
URL : https://patchwork.freedesktop.org/series/15171/
State : success
== Summary ==
Series 15171v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/ser
On Fri, Nov 11, 2016 at 07:41:10PM +0200, Abdiel Janulgue wrote:
> A lot of igt testcases need some GPU workload to make sure a race
> window is big enough. Unfortunately having a fixed amount of
> workload leads to spurious test failures or overtly long runtimes
> on some fast/slow platforms. This
For HDMI, you can yank the cable, plug back in, HDMI will light up without user
mode or kernel mode doing anything.
For DP this is not possible, someone will have to retrain the link when
plugging back in or DP will not light up. We see that on Ubuntu if someone
unplug display and plug it back
On Fri, Nov 11, 2016 at 04:21:58PM +, Cheng, Tony wrote:
> For HDMI, you can yank the cable, plug back in, HDMI will light up without
> user mode or kernel mode doing anything.
>
> For DP this is not possible, someone will have to retrain the link when
> plugging back in or DP will not light
We can just call it earlier, so do it. The goal of the loop is to get
the plane's CRTC state, and we don't need it in order to call
intel_fbc_can_choose().
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/d
Ville pointed out that intel_fbc_choose_crtc() is iterating over all
planes instead of just the primary planes. There are no real
consequences of this problem for HSW+, and for the other platforms it
just means that in some obscure multi-screen cases we'll keep FBC
disabled when we could have enabl
Much simpler. Thanks to Ville for pointing this.
Cc: Ville Syrjälä
Reported-by: Ville Syrjälä
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/d
Ville pointed out two ugly defects in the FBC code, and while trying
to fix them I spotted a few extra things. No real-world bugs fixed
here, but IMHO the code is much easier to read now.
Paulo Zanoni (7):
drm/i915/fbc: move the intel_fbc_can_choose() call out of the loop
drm/i915/fbc: replace
It only has two checks now, so it makes sense to just move the code to
the caller.
Also take this opportunity to make no_fbc_reason make more sense: now
we'll only list "no suitable CRTC for FBC" instead of maybe giving a
reason why the last CRTC we checked was not selected, and we'll more
consist
Use drm_atomic_get_existing_crtc_state() instead of looping through
the CRTC states and checking if the FBC CRTC is there.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/in
Because it's shorter, easier to read, newer and cooler. And I don't
think anybody else has pending FBC patches right now, so the conflicts
should be minimal.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 26 +-
1 file changed, 13 insertions(+), 13 del
Extract that part of the code to a new function and call this function
only once during intel_fbc_choose_crtc() instead of once per plane.
Those checks are independent from planes/CRTCs.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_fbc.c | 14 --
1 file changed, 12 inse
From: Ville Syrjälä
My heuristic for detecting type 1 DVI DP++ adaptors based on the VBT
port information apparently didn't survive the reality of buggy VBTs.
In this particular case we have a machine with a natice HDMI port, but
the VBT telsl us it's a DP++ port based on its capabilities.
The d
== Series Details ==
Series: FBC atomic cleanups
URL : https://patchwork.freedesktop.org/series/15185/
State : warning
== Summary ==
Series 15185v1 FBC atomic cleanups
https://patchwork.freedesktop.org/api/1.0/series/15185/revisions/1/mbox/
Test kms_force_connector_basic:
Subgroup pru
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