On Wednesday 13 April 2016 19:29:25 Ville Syrjälä wrote:
[ILK-hp8440p problems]
> ...
>
> [ 265.316531] drm/i915: Resetting chip after gpu hang
> [ 265.316585] [drm:i915_reset [i915]] *ERROR* Failed to reset chip: -110
>
> Looks like the GPU died for some reason.
>
> > Test kms_force_connector
== Series Details ==
Series: ci-run of shrinker rpm fixes
URL : https://patchwork.freedesktop.org/series/5656/
State : failure
== Summary ==
Series 5656v1 ci-run of shrinker rpm fixes
http://patchwork.freedesktop.org/api/1.0/series/5656/revisions/1/mbox/
Test drv_hangman:
Subgroup err
On Thu, Apr 14, 2016 at 09:47:22AM +0300, Jani Nikula wrote:
> On Mon, 11 Apr 2016, Jim Bride wrote:
> > Add some additional information (input vs. output port, sink associated
> > with VC, peer device type, max number of VCs supported) and ensure that
> > any embedded '\0' characters in a branch
== Series Details ==
Series: drm/i915/mocs: Program MOCS for all engines on init (rev8)
URL : https://patchwork.freedesktop.org/series/4310/
State : failure
== Summary ==
Series 4310v8 drm/i915/mocs: Program MOCS for all engines on init
http://patchwork.freedesktop.org/api/1.0/series/4310/revi
On Wed, 13 Apr 2016, "Vivi, Rodrigo" wrote:
> On Wed, 2016-04-13 at 13:26 +, Zanoni, Paulo R wrote:
>> Em Ter, 2016-04-12 às 12:18 -0700, Alexandra Yates escreveu:
>> > This interface allows an immediate enabling of PSR feature. What
>> > allow us
>> > to see immediately the PSR savings and wi
On Wed, 13 Apr 2016, Ben Widawsky wrote:
> The two behavioral changes here are the correct detection of the eDRAM size on
> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
>
> Cc: Eero Tamminen
> Signed-off-by: Ben Widawsky
Please see [1].
BR,
Jani.
[1]
http://patchwork.freed
On Thu, 14 Apr 2016, Jani Nikula wrote:
> On Wed, 13 Apr 2016, Ben Widawsky wrote:
>> The two behavioral changes here are the correct detection of the eDRAM size
>> on
>> gen9 (SKL + KBL), and unconditional printing of the eLLC size.
>>
>> Cc: Eero Tamminen
>> Signed-off-by: Ben Widawsky
>
> P
On Wed, Apr 13, 2016 at 09:53:38PM +0100, Chris Wilson wrote:
> On Wed, Apr 13, 2016 at 09:19:51PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > On VLV/CHV the master interrupt enable bit only affects GT/PM
> > interrupts. Display interrupts are not affected by the m
On Wed, 13 Apr 2016, Ben Widawsky wrote:
> +module_param_named_unsafe(disable_firmware_loading,
> i915.disable_firmware_loading, uint, 0400);
> +MODULE_PARM_DESC(disable_firmware_loading,
> + "Bypass loading of firmware based on mask. This overrides all other
> firmware module parameters. (0
On Thu, Apr 14, 2016 at 11:22:48AM +0300, Ville Syrjälä wrote:
> On Wed, Apr 13, 2016 at 09:53:38PM +0100, Chris Wilson wrote:
> > On Wed, Apr 13, 2016 at 09:19:51PM +0300, ville.syrj...@linux.intel.com
> > wrote:
> > > + /*
> > > + * Theory on interrupt generation, based on empir
== Series Details ==
Series: series starting with [CI-ping,01/15] drm/i915: Force clean compilation
with -Werror (rev3)
URL : https://patchwork.freedesktop.org/series/5612/
State : failure
== Summary ==
Series 5612v3 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/
On Thu, Apr 14, 2016 at 10:24:23AM +0300, Tomi Sarvela wrote:
> On Wednesday 13 April 2016 19:29:25 Ville Syrjälä wrote:
> [ILK-hp8440p problems]
> > ...
> >
> > [ 265.316531] drm/i915: Resetting chip after gpu hang
> > [ 265.316585] [drm:i915_reset [i915]] *ERROR* Failed to reset chip: -110
> >
On Thu, Apr 14, 2016 at 09:32:30AM +0100, Chris Wilson wrote:
> On Thu, Apr 14, 2016 at 11:22:48AM +0300, Ville Syrjälä wrote:
> > On Wed, Apr 13, 2016 at 09:53:38PM +0100, Chris Wilson wrote:
> > > On Wed, Apr 13, 2016 at 09:19:51PM +0300, ville.syrj...@linux.intel.com
> > > wrote:
> > > > +
On Thursday 14 April 2016 11:46:12 Ville Syrjälä wrote:
> On Thu, Apr 14, 2016 at 10:24:23AM +0300, Tomi Sarvela wrote:
> > On Wednesday 13 April 2016 19:29:25 Ville Syrjälä wrote:
> > [ILK-hp8440p problems]
> >
> > > ...
> > >
> > > [ 265.316531] drm/i915: Resetting chip after gpu hang
> > > [
== Series Details ==
Series: ci-run of edram size patches
URL : https://patchwork.freedesktop.org/series/5663/
State : success
== Summary ==
Series 5663v1 ci-run of edram size patches
http://patchwork.freedesktop.org/api/1.0/series/5663/revisions/1/mbox/
Test drv_hangman:
Subgroup err
On Thu, Apr 14, 2016 at 11:54:53AM +0300, Tomi Sarvela wrote:
> On Thursday 14 April 2016 11:46:12 Ville Syrjälä wrote:
> > On Thu, Apr 14, 2016 at 10:24:23AM +0300, Tomi Sarvela wrote:
> > > On Wednesday 13 April 2016 19:29:25 Ville Syrjälä wrote:
> > > [ILK-hp8440p problems]
> > >
> > > > ...
>
On Wed, Apr 13, 2016 at 09:19:51PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On VLV/CHV the master interrupt enable bit only affects GT/PM
> interrupts. Display interrupts are not affected by the master
> irq control.
>
> Also it seems that the CPU interrupt will only
On Wed, Apr 13, 2016 at 09:09:30PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On CHV GTFIFODBG has some read-only bits to indicate the number
> of free FIFO entries. Ignore these when checking to see if any
> of the sticky error bits are set.
>
> This gets rid of these
On Wed, Apr 13, 2016 at 10:06:57PM +, Vivi, Rodrigo wrote:
> On Wed, 2016-04-13 at 22:46 +0200, Daniel Vetter wrote:
> > On Wed, Apr 13, 2016 at 10:38 PM, Vivi, Rodrigo <
> > rodrigo.v...@intel.com> wrote:
> > > On Wed, 2016-04-13 at 16:50 +0200, Daniel Vetter wrote:
> > > > On Wed, Apr 13, 201
On Wed, Mar 30, 2016 at 11:39:01AM +0100, Emil Velikov wrote:
> On 30 March 2016 at 10:45, Daniel Vetter wrote:
> > Like in
> >
> > commit 0e975980d435d58df2d430d688b8c18778b42218
> > Author: Peter Antoine
> > Date: Tue Jun 23 08:18:49 2015 +0100
> >
> > drm: Turn off Legacy Context Functio
On Wed, Apr 13, 2016 at 03:03:25PM +0100, Chris Wilson wrote:
> From: Peter Antoine
>
> Allow for the MOCS to be programmed for all engines.
> Currently we program the MOCS when the first render batch
> goes through. This works on most platforms but fails on
> platforms that do not run a render b
== Series Details ==
Series: series starting with [1/3] drm/i915/overlay: Replace
i915_gem_obj_ggtt_offset() with the known flip_addr (rev2)
URL : https://patchwork.freedesktop.org/series/5649/
State : success
== Summary ==
Series 5649v2 Series without cover letter
http://patchwork.freedeskto
== Series Details ==
Series: series starting with [v5,1/4] drm/dp_helper: Always wait before
retrying native aux transactions
URL : https://patchwork.freedesktop.org/series/5667/
State : failure
== Summary ==
Series 5667v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/s
From: Tvrtko Ursulin
We know that the underlying area is memory and not ports so we
can use the correct accessor straight away to save on function
calls.
Especially since the gen8_set_pte already mixes writeq and
iowrite32 depending on the kernel config.
Signed-off-by: Tvrtko Ursulin
---
driv
From: Tvrtko Ursulin
We know that our aperture is memory and not ports so we can use
the correct accessors straight away and avoid function calls.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --gi
From: Tvrtko Ursulin
We know ringbuffers are memory and not ports so if we use readl
and writel instead of ioread32 and iowrite32 (which dispatch to
the very same functions after checking the address range) we
avoid generating functions calls and branching on every access.
This generates smaller
On Thu, Apr 14, 2016 at 11:37:49AM +0200, Daniel Vetter wrote:
> On Wed, Apr 13, 2016 at 09:09:30PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > On CHV GTFIFODBG has some read-only bits to indicate the number
> > of free FIFO entries. Ignore these when checking to s
Hi Thierry
On Tue, 12 Apr 2016 13:01:52 +0200
Thierry Reding wrote:
> On Wed, Mar 30, 2016 at 10:03:24PM +0200, Boris Brezillon wrote:
> > Commit 5c31252c4a86 ("pwm: Add the pwm_is_enabled() helper") introduced a
> > new function to test whether a PWM device is enabled or not without
> > manipul
On Thu, Apr 14, 2016 at 11:59:29AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> We know ringbuffers are memory and not ports so if we use readl
> and writel instead of ioread32 and iowrite32 (which dispatch to
> the very same functions after checking the address range) we
> avoid gener
On Thu, Apr 14, 2016 at 11:59:30AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> We know that our aperture is memory and not ports so we can use
> the correct accessors straight away and avoid function calls.
There are much more complete patches to fix a host of issues here on the
list
On 14/04/16 12:16, Chris Wilson wrote:
On Thu, Apr 14, 2016 at 11:59:29AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
We know ringbuffers are memory and not ports so if we use readl
and writel instead of ioread32 and iowrite32 (which dispatch to
the very same functions after checking th
On Thu, Apr 14, 2016 at 12:24:20PM +0100, Tvrtko Ursulin wrote:
>
> On 14/04/16 12:16, Chris Wilson wrote:
> >On Thu, Apr 14, 2016 at 11:59:29AM +0100, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>We know ringbuffers are memory and not ports so if we use readl
> >>and writel instead of
From: Ville Syrjälä
HSW still has the wake FIFO, so let's check it.
Cc: Mika Kuoppala
Cc: Deepak S
Fixes: 05a2fb157e44 ("drm/i915: Consolidate forcewake code")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_uncore.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
dif
On Thu, Apr 14, 2016 at 02:39:02PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> HSW still has the wake FIFO, so let's check it.
>
> Cc: Mika Kuoppala
> Cc: Deepak S
> Fixes: 05a2fb157e44 ("drm/i915: Consolidate forcewake code")
> Signed-off-by: Ville Syrjälä
Oh and I
ville.syrj...@linux.intel.com writes:
> [ text/plain ]
> From: Ville Syrjälä
>
> HSW still has the wake FIFO, so let's check it.
>
> Cc: Mika Kuoppala
> Cc: Deepak S
> Fixes: 05a2fb157e44 ("drm/i915: Consolidate forcewake code")
> Signed-off-by: Ville Syrjälä
Reviewed-by: Mika Kuoppala
> --
== Series Details ==
Series: drm/i915: Provide a modparam to disable firmware loading
URL : https://patchwork.freedesktop.org/series/5675/
State : warning
== Summary ==
Series 5675v1 drm/i915: Provide a modparam to disable firmware loading
http://patchwork.freedesktop.org/api/1.0/series/5675/r
From: Tvrtko Ursulin
Reflect the status of obj->mapping as added with the
i915_gem_object_pin_map API.
'M' was chosen to designate the pin mapped status.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 34 +-
1 file cha
From: Tvrtko Ursulin
Show a total and purgeable number of pin mapped objects
and their total and purgeable size.
Example output (new stat prefixed with a star):
# cat i915_gem_objects
19920 objects, 289243136 bytes
19920 [18466] objects, 288714752 [267911168] bytes in gtt
0 [0] active
On 14/04/16 12:30, Chris Wilson wrote:
On Thu, Apr 14, 2016 at 12:24:20PM +0100, Tvrtko Ursulin wrote:
On 14/04/16 12:16, Chris Wilson wrote:
On Thu, Apr 14, 2016 at 11:59:29AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
We know ringbuffers are memory and not ports so if we use readl
On Thu, Apr 14, 2016 at 02:51:02PM +0300, Mika Kuoppala wrote:
> ville.syrj...@linux.intel.com writes:
>
> > [ text/plain ]
> > From: Ville Syrjälä
> >
> > HSW still has the wake FIFO, so let's check it.
> >
> > Cc: Mika Kuoppala
> > Cc: Deepak S
> > Fixes: 05a2fb157e44 ("drm/i915: Consolidate
On Thu, Apr 14, 2016 at 10:36:00AM +0100, Chris Wilson wrote:
> On Wed, Apr 13, 2016 at 09:19:51PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > On VLV/CHV the master interrupt enable bit only affects GT/PM
> > interrupts. Display interrupts are not affected by the m
On Thu, Apr 14, 2016 at 12:57:02PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Show a total and purgeable number of pin mapped objects
> and their total and purgeable size.
>
> Example output (new stat prefixed with a star):
>
> # cat i915_gem_objects
> 19920 objects, 289243136
On Thu, Apr 14, 2016 at 02:51:02PM +0300, Mika Kuoppala wrote:
> ville.syrj...@linux.intel.com writes:
>
> > [ text/plain ]
> > From: Ville Syrjälä
> >
> > HSW still has the wake FIFO, so let's check it.
> >
> > Cc: Mika Kuoppala
> > Cc: Deepak S
> > Fixes: 05a2fb157e44 ("drm/i915: Consolidate
On Thu, Apr 14, 2016 at 11:37:49AM +0200, Daniel Vetter wrote:
> On Wed, Apr 13, 2016 at 09:09:30PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > On CHV GTFIFODBG has some read-only bits to indicate the number
> > of free FIFO entries. Ignore these when checking to s
ville.syrj...@linux.intel.com writes:
> [ text/plain ]
> From: Ville Syrjälä
>
> On VLV/CHV the master interrupt enable bit only affects GT/PM
> interrupts. Display interrupts are not affected by the master
> irq control.
>
> Also it seems that the CPU interrupt will only be generated when
> the
Hi,
On 5 March 2016 at 12:34, Daniel Vetter wrote:
> On Wed, Mar 02, 2016 at 03:00:07PM +0100, Tomeu Vizoso wrote:
>> have restarted work on getting tests in IGT to run on drivers other than
>> i915.
>>
>> These changes make the modified tests pass in a Radxa Rock2 board by
>> using dumb buffers
== Series Details ==
Series: Unduplicate CHV phy code (rev3)
URL : https://patchwork.freedesktop.org/series/5463/
State : failure
== Summary ==
Series 5463v3 Unduplicate CHV phy code
http://patchwork.freedesktop.org/api/1.0/series/5463/revisions/3/mbox/
Test drv_module_reload_basic:
Hi, Chris.
Is it made on purpose not to drop VM_LAZY_FREE flag in
__purge_vmap_area_lazy()? With your patch va->flags
will have two bits set: VM_LAZY_FREE | VM_LAZY_FREEING.
Seems it is not that bad, because all other code paths
do not care, but still the change is not clear.
Also, did you consi
On 14 April 2016 at 11:06, Daniel Vetter wrote:
> On Wed, Mar 30, 2016 at 11:39:01AM +0100, Emil Velikov wrote:
>> On 30 March 2016 at 10:45, Daniel Vetter wrote:
>> > Like in
>> >
>> > commit 0e975980d435d58df2d430d688b8c18778b42218
>> > Author: Peter Antoine
>> > Date: Tue Jun 23 08:18:49 20
On Thu, Apr 14, 2016 at 03:13:26PM +0200, Roman Peniaev wrote:
> Hi, Chris.
>
> Is it made on purpose not to drop VM_LAZY_FREE flag in
> __purge_vmap_area_lazy()? With your patch va->flags
> will have two bits set: VM_LAZY_FREE | VM_LAZY_FREEING.
> Seems it is not that bad, because all other code
On Mon, Apr 11, 2016 at 10:06:28AM +0100, Chris Wilson wrote:
> On Mon, Apr 11, 2016 at 11:34:54AM +0300, Ville Syrjälä wrote:
> > On Sat, Apr 09, 2016 at 11:14:44AM +0100, Chris Wilson wrote:
> > > In order for the MI_SEMAPHORE_SIGNAL command to wait until after the
> > > pipecontrol writing the s
On Thu, Apr 14, 2016 at 05:29:31PM +0300, Ville Syrjälä wrote:
> On Mon, Apr 11, 2016 at 10:06:28AM +0100, Chris Wilson wrote:
> > On Mon, Apr 11, 2016 at 11:34:54AM +0300, Ville Syrjälä wrote:
> > > On Sat, Apr 09, 2016 at 11:14:44AM +0100, Chris Wilson wrote:
> > > > In order for the MI_SEMAPHORE
On Thu, Apr 14, 2016 at 3:49 PM, Chris Wilson wrote:
> On Thu, Apr 14, 2016 at 03:13:26PM +0200, Roman Peniaev wrote:
>> Hi, Chris.
>>
>> Is it made on purpose not to drop VM_LAZY_FREE flag in
>> __purge_vmap_area_lazy()? With your patch va->flags
>> will have two bits set: VM_LAZY_FREE | VM_LAZY
On Thu, Apr 14, 2016 at 11:14:48AM +0300, Jani Nikula wrote:
> On Thu, 14 Apr 2016, Jani Nikula wrote:
> > On Wed, 13 Apr 2016, Ben Widawsky wrote:
> >> The two behavioral changes here are the correct detection of the eDRAM
> >> size on
> >> gen9 (SKL + KBL), and unconditional printing of the eL
On Thu, Apr 14, 2016 at 07:48:13AM -0700, Ben Widawsky wrote:
> On Thu, Apr 14, 2016 at 11:14:48AM +0300, Jani Nikula wrote:
> > On Thu, 14 Apr 2016, Jani Nikula wrote:
> > > On Wed, 13 Apr 2016, Ben Widawsky wrote:
> > >> The two behavioral changes here are the correct detection of the eDRAM
>
== Series Details ==
Series: Enable FBC on SKL (rev4)
URL : https://patchwork.freedesktop.org/series/4722/
State : success
== Summary ==
Series 4722v4 Enable FBC on SKL
http://patchwork.freedesktop.org/api/1.0/series/4722/revisions/4/mbox/
Test gem_busy:
Subgroup basic-blt:
On Thu, Apr 14, 2016 at 11:27:25AM +0300, Jani Nikula wrote:
> On Wed, 13 Apr 2016, Ben Widawsky wrote:
> > +module_param_named_unsafe(disable_firmware_loading,
> > i915.disable_firmware_loading, uint, 0400);
> > +MODULE_PARM_DESC(disable_firmware_loading,
> > + "Bypass loading of firmware base
On 14/04/16 12:58, Tvrtko Ursulin wrote:
On 14/04/16 12:30, Chris Wilson wrote:
On Thu, Apr 14, 2016 at 12:24:20PM +0100, Tvrtko Ursulin wrote:
On 14/04/16 12:16, Chris Wilson wrote:
On Thu, Apr 14, 2016 at 11:59:29AM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
We know ringbuffers a
From: Tim Gore
This is a re-send of patch 3/3 from Arun Siluvery's patch
series "Add Pooled EU support to BXT", originally submitted
20 July 2015. Patches 1 and 2 are already merged in preparation.
This final patch actually enables the feature. The rest of this
commit message is taken from the or
== Series Details ==
Series: series starting with [1/2] drm/i915: introduce and use
i915_gem_object_map_range()
URL : https://patchwork.freedesktop.org/series/5691/
State : failure
== Summary ==
Series 5691v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5691/rev
On Thu, Apr 14, 2016 at 04:07:58PM +0100, Dave Gordon wrote:
> On 14/04/16 12:58, Tvrtko Ursulin wrote:
> >
> >On 14/04/16 12:30, Chris Wilson wrote:
> >>On Thu, Apr 14, 2016 at 12:24:20PM +0100, Tvrtko Ursulin wrote:
> >>>
> >>>On 14/04/16 12:16, Chris Wilson wrote:
> On Thu, Apr 14, 2016 at 1
On Thu, Apr 14, 2016 at 05:29:31PM +0300, Ville Syrjälä wrote:
> On Mon, Apr 11, 2016 at 10:06:28AM +0100, Chris Wilson wrote:
> > On Mon, Apr 11, 2016 at 11:34:54AM +0300, Ville Syrjälä wrote:
> > > On Sat, Apr 09, 2016 at 11:14:44AM +0100, Chris Wilson wrote:
> > > > In order for the MI_SEMAPHORE
On Wed, Apr 13, 2016 at 05:07:04PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix eDP low vswing for Broadwell (rev3)
> URL : https://patchwork.freedesktop.org/series/4499/
> State : failure
>
> == Summary ==
>
> CC drivers/usb/host/xhci-trace.o
> CC dri
== Series Details ==
Series: series starting with [1/3] drm/i915: Use readl/writel for ring buffer
access
URL : https://patchwork.freedesktop.org/series/5714/
State : failure
== Summary ==
Series 5714v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5714/revisions
On Wed, Apr 13, 2016 at 10:58:32AM -0400, Lyude wrote:
> This is part of a patch series to migrate all of the workarounds for
> commonly seen behavior from bad sinks in intel_dp_dpcd_read_wake() to drm's
> DP helper.
>
> Some sinks will just return garbage for the first aux tranaction they
> recei
On 04/14/2016 02:48 AM, Daniel Vetter wrote:
On Wed, Apr 13, 2016 at 10:06:57PM +, Vivi, Rodrigo wrote:
On Wed, 2016-04-13 at 22:46 +0200, Daniel Vetter wrote:
On Wed, Apr 13, 2016 at 10:38 PM, Vivi, Rodrigo <
rodrigo.v...@intel.com> wrote:
On Wed, 2016-04-13 at 16:50 +0200, Daniel Vette
Add some additional information (input vs. output port, sink associated
with VC, peer device type, max number of VCs supported) and ensure that
any embedded '\0' characters in a branch device's devid string are not
written to debugfs.
v2: Rebase + change drm_edid_get_monitor_name() call to reflect
From: Alex Dai
Now that we keep GuC shared objects mapped into kernel space for their
entire lifetime, we can simplify the code for accessing the doorbells
and work queue, which were previously calling kmap_atomic() on *each*
request submission.
This patch fixes the BUG shown below, where the th
Modify the debugfs output for i915_dp_mst_info to list the source port for
the DP MST topology in question.
v2: rebase
v3: rebase
v4: rebase
cc: Jani Nikula
Reviewed-by: Jani Nikula
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
1 file changed, 2 insertions(+), 1 de
In order to include monitor name information in debugfs
output we needed to add a function that would extract the
monitor name from the EDID, and that function needed to
reside in the file where the rest of the EDID helper
functions are implemented.
v2: Refactor to have drm_edid_get_monitor_name(
From: Alex Dai
Now that we keep the GuC client structure (and therefore the process
descriptor embedded therein) permanently mapped, we don't really need to
keep a local copy of the GuC's work-queue-head. So we can simplify the
code a little by not doing this.
Signed-off-by: Alex Dai
Signed-off
With the new i915_gem_obj_pin_map() interface, it makes sense to keep
GuC objects (which are always pinned in memory and in the GGTT anyway)
mapped into kernel address space, rather than mapping and unmapping them
on each access.
This preliminary patch sets up the pin-and-map for all GuC-specific
== Series Details ==
Series: series starting with [1/2] drm/i915: Show pin mapped status in
describe_obj
URL : https://patchwork.freedesktop.org/series/5716/
State : failure
== Summary ==
Series 5716v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5716/revisions/
From: Gustavo Padovan
Replace the legacy drm_send_vblank_event() with the new helper function.
Signed-off-by: Gustavo Padovan
---
drivers/gpu/drm/i915/intel_display.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/d
== Series Details ==
Series: drm/i915:bxt: Enable Pooled EU support
URL : https://patchwork.freedesktop.org/series/5725/
State : failure
== Summary ==
Series 5725v1 drm/i915:bxt: Enable Pooled EU support
http://patchwork.freedesktop.org/api/1.0/series/5725/revisions/1/mbox/
Test drv_module_re
On Tue, Mar 29, 2016 at 04:46:30PM -0400, Lyude wrote:
> On Valleyview, VGA hotplugging is controlled through a seperate register
> than everything else, VLV_ADPA, which must be explicitly set.
>
> While VGA hotplugging worked(ish) before, it looks like that was mainly
> because we'd unintentional
Use pwm_get/set_xxx() helpers instead of directly accessing the pwm->xxx
field. Doing that will ease adaptation of the PWM framework to support
atomic update.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
--->8---
virtual patch
@@
struct pwm_device *p;
Currently the PWM core mixes the current PWM state with the per-platform
reference config (specified through the PWM lookup table, DT definition or
directly hardcoded in PWM drivers).
Create a pwm_args struct to store this reference config, so that PWM users
can differentiate the current config fr
Hello,
This series adds support for atomic PWM update, or IOW, the capability
to update all the parameters of a PWM device (enabled/disabled, period,
duty and polarity) in one go.
It also adds support for initial PWM state retrieval (or hardware
readout), which should allow smooth handover betwee
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
Add a ->get_state() function to the pwm_ops struct to let PWM drivers
initialize the PWM state attached to a PWM device.
Signed-off-by: Boris Brezillon
---
drivers/pwm/core.c | 3 +++
include/linux/pwm.h | 28
2 files changed, 31 insertions(+)
diff --git a/drivers
Call pwm_apply_args() just after requesting the PWM device so that the
polarity and period are initialized according to the information provided
in pwm_args.
This is an intermediate state, and pwm_apply_args() should be dropped as
soon as the atomic PWM infrastructure is in place and the driver ma
Before the introduction of pwm_args, the core was resetting the PWM period
and polarity states to the reference values (those provided through the
DT, a PWM lookup table or hardcoded in the driver).
Now that all PWM users are correctly using pwm_args to configure their
PWM device, we can safely re
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
Call pwm_apply_args() just after requesting the PWM device so that the
polarity and period are initialized according to the information provided
in pwm_args.
This is an intermediate state, and pwm_apply_args() should be dropped as
soon as the atomic PWM infrastructure is in place and the driver ma
The PWM framework has clarified the concept of reference PWM config
(the platform dependent config retrieved from the DT or the PWM
lookup table) and real PWM state.
Use pwm_get_args() when the PWM user wants to retrieve this reference
config and not the current state.
This is part of the rework
Call pwm_apply_args() just after requesting the PWM device so that the
polarity and period are initialized according to the information provided
in pwm_args.
This is an intermediate state, and pwm_apply_args() should be dropped as
soon as the atomic PWM infrastructure is in place and the driver ma
Call pwm_apply_args() just after requesting the PWM device so that the
polarity and period are initialized according to the information provided
in pwm_args.
This is an intermediate state, and pwm_apply_args() should be dropped as
soon as the atomic PWM infrastructure is in place and the driver ma
The PWM state, represented by its period, duty_cycle and polarity,
is currently directly stored in the PWM device.
Declare a pwm_state structure embedding those field so that we can later
use this struct to atomically update all the PWM parameters at once.
All pwm_get_xxx() helpers are now impleme
Call pwm_apply_args() just after requesting the PWM device so that the
polarity and period are initialized according to the information provided
in pwm_args.
This is an intermediate state, and pwm_apply_args() should be dropped as
soon as the atomic PWM infrastructure is in place and the driver ma
Call pwm_apply_args() just after requesting the PWM device so that the
polarity and period are initialized according to the information provided
in pwm_args.
This is an intermediate state, and pwm_apply_args() should be dropped as
soon as the atomic PWM infrastructure is in place and the driver ma
Update the PWM subsystem documentation to reflect the atomic PWM changes.
Signed-off-by: Boris Brezillon
---
Documentation/pwm.txt | 30 --
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt
index ca895fd..789b
From: Heiko Stübner
The pwm-states make it possible to also output the polarity, duty cycle
and period information in the debugfs pwm summary-outout.
This makes it easier to gather overview information about pwms without
needing to walk through the sysfs attributes of every pwm.
Signed-off-by: H
Add an ->apply() method to the pwm_ops struct to allow PWM drivers to
implement atomic update.
This method will be preferred over the ->enable(), ->disable() and
->config() methods if available.
Add the pwm_apply_state() function to the PWM user API.
Note that the pwm_apply_state() does not guara
Replace legacy pwm_get/set_xxx() and pwm_config/enable/disable() calls
by pwm_get/apply_state().
Signed-off-by: Boris Brezillon
---
drivers/pwm/core.c | 5 -
drivers/pwm/sysfs.c | 61 +++--
2 files changed, 40 insertions(+), 26 deletions(-)
Prepare the transition to PWM atomic update by moving the enabled/disabled
state into the pwm_state struct. This way we can easily update the whole
PWM state by copying the new state in the ->state field.
Signed-off-by: Boris Brezillon
---
drivers/pwm/core.c | 13 +
include/linux/pw
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