Add new edp_dpcd variable to intel_dp.
Read and save eDP Display control capability registers to edp_dpcd.
Signed-off-by: Yetunde Adebisi
---
drivers/gpu/drm/i915/intel_dp.c | 15 ++-
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 11 insertions(+), 5 deletions(-)
diff --
On Tue, Apr 05, 2016 at 03:17:30PM +0100, Tvrtko Ursulin wrote:
>
> On 05/04/16 15:09, Chris Wilson wrote:
> >On Tue, Apr 05, 2016 at 02:42:16PM +0100, Tvrtko Ursulin wrote:
> @@ -587,9 +587,6 @@ static int execlists_context_queue(struct
> drm_i915_gem_request *request)
> struct
Hi Animesh,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on next-20160405]
[cannot apply to v4.6-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Animesh
== Series Details ==
Series: DPCD Backlight Control
URL : https://patchwork.freedesktop.org/series/5323/
State : failure
== Summary ==
LD drivers/pci/built-in.o
CC drivers/usb/storage/option_ms.o
CC drivers/usb/host/ehci-pci.o
LD drivers/usb/gadget/libcomposite.o
On Tue, Apr 05, 2016 at 02:02:38PM +0100, Daniel Stone wrote:
> Hi,
>
> On 4 April 2016 at 22:17, Matt Roper wrote:
> > i915 does not yet support the atomic modesetting interface by default;
> > at the moment it must be turned on explicitly via an
> > 'i915.nuclear_pageflip' kernel command line o
On Tue, Apr 05, 2016 at 03:27:24PM +0100, Chris Wilson wrote:
> On Tue, Apr 05, 2016 at 03:17:30PM +0100, Tvrtko Ursulin wrote:
> >
> > On 05/04/16 15:09, Chris Wilson wrote:
> > >On Tue, Apr 05, 2016 at 02:42:16PM +0100, Tvrtko Ursulin wrote:
> > @@ -587,9 +587,6 @@ static int execlists_conte
== Series Details ==
Series: HPD support during suspend.
URL : https://patchwork.freedesktop.org/series/5322/
State : failure
== Summary ==
Series 5322v1 HPD support during suspend.
http://patchwork.freedesktop.org/api/1.0/series/5322/revisions/1/mbox/
Test drv_getparams_basic:
Subgro
(Adding Jani again, who got dropped for some reason)
On 1 April 2016 at 16:50, Ezequiel Garcia wrote:
> On 01 Apr 06:46 PM, Ville Syrjälä wrote:
>> On Fri, Apr 01, 2016 at 12:38:11PM -0300, Ezequiel Garcia wrote:
>> > El abr. 1, 2016 11:47 AM, "Ville Syrjälä"
>> > escribió:
>> > >
>> > > On Thu,
On Tue, 05 Apr 2016, Mika Kuoppala wrote:
> Experiments with heaven 4.0 benchmark and skylake gt3e (rev 0xa)
> suggest that WaForceContextSaveRestoreNonCoherent is needed for all
> revs. Extending this to all revs cures a gpu hang with rev 0xa when
> running heaven4.0 gpu benchmark.
>
> We have be
On Tue, Apr 05, 2016 at 02:42:16PM +0100, Tvrtko Ursulin wrote:
> >>@@ -587,9 +587,6 @@ static int execlists_context_queue(struct
> >>drm_i915_gem_request *request)
> >> struct drm_i915_gem_request *cursor;
> >> int num_elements = 0;
> >>
> >>-if (request->ctx != ring->default_context
On 05/04/16 14:59, Chris Wilson wrote:
In order to ensure that all invalidations are completed before the
operation returns to userspace (i.e. before the munmap() syscall returns)
we need to wait upon the outstanding operations.
We are allowed to block inside the invalidate_range_start callback
== Series Details ==
Series: series starting with [1/2] drm/i915/skl: Fix rc6 based gpu/system hang
URL : https://patchwork.freedesktop.org/series/5324/
State : success
== Summary ==
Series 5324v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5324/revisions/1/mbox
On Tue, Apr 05, 2016 at 03:56:17PM +0300, Mika Kuoppala wrote:
> Experiments with heaven 4.0 benchmark and skylake gt3e (rev 0xa)
> suggest that WaForceContextSaveRestoreNonCoherent is needed for all
> revs. Extending this to all revs cures a gpu hang with rev 0xa when
> running heaven4.0 gpu bench
== Series Details ==
Series: series starting with [1/6] drm/i915/dmabuf: Tighten struct_mutex for
unmap_dma_buf
URL : https://patchwork.freedesktop.org/series/5325/
State : failure
== Summary ==
Series 5325v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/5325/rev
== Series Details ==
Series: DPCD Backlight Control
URL : https://patchwork.freedesktop.org/series/5330/
State : success
== Summary ==
Series 5330v1 DPCD Backlight Control
http://patchwork.freedesktop.org/api/1.0/series/5330/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-wf_v
Hi Peter,
This patch is required for the BXT firmware loading. (Maybe/Probably
something similar for KBL is also required)
Do you have plans to fix this interpretation as Dave pointed and send
a new version?
Thanks,
Rodrigo.
On Wed, Feb 3, 2016 at 7:39 AM, Dave Gordon wrote:
> On 21/01/16 21:4
== Series Details ==
Series: series starting with [v2,3/3] drm/i915/userptr: Store i915 backpointer
for i915_mm_struct (rev4)
URL : https://patchwork.freedesktop.org/series/5240/
State : failure
== Summary ==
Series 5240v4 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/s
On Mon, 2016-03-14 at 13:41 +0100, Lukas Wunner wrote:
>
> > So I'd push DIGD to the switch sysfs entry on boot. But I'm
> > guessing
> > that won't turn off the other output we're not interested in.
> IGD and DIGD switch to the integrated GPU and also turn off the
> discrete
> GPU. However if th
Signed-off-by: Marius Vlad
---
tests/gem_concurrent_all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
index 10e5357..e84ded3 100644
--- a/tests/gem_concurrent_all.c
+++ b/tests/gem_concurrent_all.c
@@ -650,7 +650,7 @@
On Tue, Apr 05, 2016 at 08:13:23PM +0300, Marius Vlad wrote:
> Signed-off-by: Marius Vlad
> ---
> tests/gem_concurrent_all.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/gem_concurrent_all.c b/tests/gem_concurrent_all.c
> index 10e5357..e84ded3 100644
> --- a/te
On Tue, Apr 05, 2016 at 06:23:21PM +0100, Chris Wilson wrote:
> On Tue, Apr 05, 2016 at 08:13:23PM +0300, Marius Vlad wrote:
> > Signed-off-by: Marius Vlad
> > ---
> > tests/gem_concurrent_all.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tests/gem_concurrent_a
On Tue, Apr 05, 2016 at 08:34:02PM +0300, Marius Vlad wrote:
> On Tue, Apr 05, 2016 at 06:23:21PM +0100, Chris Wilson wrote:
> > On Tue, Apr 05, 2016 at 08:13:23PM +0300, Marius Vlad wrote:
> > > Signed-off-by: Marius Vlad
> > > ---
> > > tests/gem_concurrent_all.c | 2 +-
> > > 1 file changed, 1
Hi Bastien,
On Tue, Apr 05, 2016 at 06:59:40PM +0200, Bastien Nocera wrote:
> I tested the runtime patches for Radeon on top of 4.6.0-rc2, and
> writing DIGD failed. I also saw a number of messages with the
> vga_switcheroo core in the kernel trying to switch GPUs but failed
> because "client 1" w
From: Ville Syrjälä
My BSW takes ~12 seconds to go back to idle after high load, so the
current 10s timeouts are too short. Bump them up to 15s.
Signed-off-by: Ville Syrjälä
---
tests/pm_rps.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/pm_rps.c b/tests/pm_rps
On Wed, Mar 16, 2016 at 07:47:06PM +0200, Ville Syrjälä wrote:
> On Wed, Mar 16, 2016 at 07:17:51PM +0200, Imre Deak wrote:
> > On Fri, 2016-03-04 at 21:43 +0200, ville.syrj...@linux.intel.com wrote:
> > > From: Ville Syrjälä
> > >
> > > Extract the GPLL reference frequency from CCK and use it in
Next iteration after [1]. Last patch merely rebased, and review comments
not addressed, but included here for completeness.
BR,
Jani.
[1] http://mid.gmane.org/cover.1458299160.git.jani.nik...@intel.com
Jani Nikula (6):
drm/i915/dsi: clean up vlv gpio table and definitions
drm/i915/dsi: abst
Just put the iosf port in the gpio table. The table might include some
duplication, but this approach keeps the code the cleanest.
v2: pack the struct better (Ville), use designated initializers, add
debug logging for mismatching ports
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_d
Define and store the pad base offset in the array, and reference the
pconf0 and padval registers through macros. Add VLV prefixes to
macros. Use spec nomenclature for pconf0 and padval.
v2: Address Ville's review comments, squash another patch here.
v3: Use the names Ville dug up in the specs.
S
Add support for CHV gpio programming in DSI gpio elements.
v2: Overhaul macros according to Ville's review.
[Rewritten by Jani, based on earlier work by Yogesh and Deepak.]
Signed-off-by: Yogesh Mohan Marimuthu
Signed-off-by: Deepak M
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel
Prepare for future. No functional changes.
v2: Move earlier in the series. Use bool for gpio value.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 68 +++---
1 file changed, 35 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915
The shorthand is easier. Also change the struct name. No functional
changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
b/drivers/gpu/drm
Use a table similar to vlv to check for accepted gpio indexes. For now,
add all, but this list should be trimmed down. Use managed gpio request,
which will be automatically released when the driver is detached.
Signed-off-by: Jani Nikula
---
I didn't address review comments to this one yet, but
Modify the debugfs output for i915_dp_mst_info to list the source port for
the DP MST topology in question.
Signed-off-by: Jim Bride
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/dr
Add some additional information (input vs. output port, sink associated
with VC, peer device type, max number of VCs supported) and ensure that
any embedded '\0' characters in a branch device's devid string are not
written to debugfs.
cc: dri-de...@lists.freedesktop.org
Signed-off-by: Jim Bride
-
While writing a utility that parses information from the debugfs file
i915_dp_mst_info and formats it in a more easily human-readable fashion,
I noticed a few things missing from the debug output that would be nice to
have. Most notably, there was not an easy way to associate a particular
sink dev
In order to include monitor name information in debugfs
output we needed to add a function that would extract the
monitor name from the EDID, and that function needed to
reside in the file where the rest of the EDID helper
functions are implemented.
cc: dri-de...@lists.freedesktop.org
Signed-off-
intel_update_max_cdclk() doesn't have a switch case for Broxton, so
dev_priv->max_cdclk_freq gets set to whatever clock frequency we're
currently running at (e.g., 144 MHz) rather than the true maximum. This
causes our max dotclock to also be set too low and in turn leads mode
verification to reje
On Tue, Apr 05, 2016 at 02:37:19PM -0700, Matt Roper wrote:
> intel_update_max_cdclk() doesn't have a switch case for Broxton, so
> dev_priv->max_cdclk_freq gets set to whatever clock frequency we're
> currently running at (e.g., 144 MHz) rather than the true maximum. This
> causes our max dotcloc
Hi. Currently I'm working on a bug in the i915 driver where hotplugging seems to
break if we power on the machine without any connectors attached:
https://bugzilla.redhat.com/show_bug.cgi?id=1277863
So the main cause of the issue seems to be that we're not keeping the right
power wells on for HPD
After the GPU reset and we discard all of the incomplete requests, mark
the GPU as having advanced to the last_submitted_seqno (as having
completed the requests and ready for fresh work). The impact of this is
negligible, as all the requests will be considered completed by this
point, it just bring
An oversight is that when we wrap the seqno, we need to reset the hw
semaphore counters to 0. We did this for gen6 and gen7 and forgot to do
so for the new implementation required for gen8 (legacy).
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/inte
It's useful to look at the last seqno submitted on a particular engine
and compare it against the HWS value to check for irregularities.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_debugfs.c | 6 --
drivers/gpu/drm/i915/i915_drv.h
We only use drm_i915_private within the function, so delete the unneeded
drm_device local.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i9
Having fixed the tracking of the engine's last_submitted_seqno, we can
now rely on it for detecting when the engine is idle (and not have to
touch the requests pointer).
Testcase: igt/gem_exec_whisper
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i9
Since we are setting engine local values that are tied to the hardware,
move it out of i915_gem_init_seqno() into the intel_ring_init_seqno()
backend, next to where the other hw semaphore registers are written.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Joonas Lahtinen
---
drivers/gpu/d
When we change the current seqno, we also need to remember to reset the
last_submitted_seqno for the engine.
Testcase: igt/gem_exec_whisper
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 1 +
1 file changed, 1 insertion(+)
diff
dont want to hijack thread but wanted to point out a possible regression
in the
previous patches of this series.
intel_fbc_can_choose: returns true for gen 4/5/6/7. (possible bug)
so intel_crtc_state->enable_fbc = true; will be executed for first crtc
everytime intel_fbc_choose_crtc is called.
== Series Details ==
Series: DPCD Backlight Control
URL : https://patchwork.freedesktop.org/series/5333/
State : success
== Summary ==
Series 5333v1 DPCD Backlight Control
http://patchwork.freedesktop.org/api/1.0/series/5333/revisions/1/mbox/
Test gem_sync:
Subgroup basic-all:
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