On Thu, Mar 17, 2016 at 09:15:39PM +0530, Sharma, Shashank wrote:
> Regards
> Shashank
>
> On 3/17/2016 6:34 PM, Ville Syrjälä wrote:
> > On Thu, Mar 17, 2016 at 01:29:25PM +0530, Shashank Sharma wrote:
> >> This patch restricts usage of live status check for HDMI detection.
> >> While testing cer
This patch adds ioctl-errors subtest to be used for exercising prime sync ioctl
errors.
The subtest constantly interrupts via signals a function doing concurrent blit
to stress out the right usage of prime_sync_*, making sure these ioctl errors
are handled accordingly. Important to note that in ca
From: Ankitprasad Sharma
This patch series adds support for creating/using Stolen memory backed
objects.
Despite being a unified memory architecture (UMA) some bits of memory
are more equal than others. In particular we have the thorny issue of
stolen memory, memory stolen from the system by the
Op 16-03-16 om 17:19 schreef Ander Conselvan De Oliveira:
> On Mon, 2016-03-14 at 09:27 +0100, Maarten Lankhorst wrote:
>> With async modesets this is no longer protected with connection_mutex,
>> so ensure that each pll has its own lock. The pll configuration state
>> is still protected; it's only
On Thu, 2016-03-17 at 11:32 +, Patchwork wrote:
> == Series Details ==
>
> Series: Split driver init step to phases (rev3)
> URL : https://patchwork.freedesktop.org/series/4509/
> State : warning
>
> == Summary ==
>
> Series 4509v3 Split driver init step to phases
> http://patchwork.freede
Use less pointers with the probing code, making it much less confusing
to read.
Cc: Mika Kuoppala
Signed-off-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 100
drivers/gpu/drm/i915/i915_gem_gtt.h | 5 +-
2 files changed, 46 insertions(+), 5
== Series Details ==
Series: series starting with [resend,for,CI,1/2] drm/i915: Remove unused
variable in i915_gem_request_add_to_client
URL : https://patchwork.freedesktop.org/series/4572/
State : failure
== Summary ==
Series 4572v1 Series without cover letter
http://patchwork.freedesktop.or
On 18/03/16 07:03, Patchwork wrote:
== Series Details ==
Series: series starting with [resend,for,CI,1/2] drm/i915: Remove unused
variable in i915_gem_request_add_to_client
URL : https://patchwork.freedesktop.org/series/4572/
State : failure
== Summary ==
Series 4572v1 Series without cover
On Thu, Mar 17, 2016 at 09:35:30PM +0530, Sharma, Shashank wrote:
> Regards
> Shashank
>
> On 3/17/2016 9:31 PM, Ville Syrjälä wrote:
> > On Thu, Mar 17, 2016 at 09:15:39PM +0530, Sharma, Shashank wrote:
> >> Regards
> >> Shashank
> >>
> >> On 3/17/2016 6:34 PM, Ville Syrjälä wrote:
> >>> On Thu,
On Thu, Mar 17, 2016 at 10:09:28AM +, Tvrtko Ursulin wrote:
>
> On 17/03/16 09:37, Chris Wilson wrote:
> >Although the long term future of get_user_pages_locked() itself is
> >doubtful, the kernel currently recommends:
> >
> >/* get_user_pages should be phased out in favor of
> > * get_user_p
These IDs were already part of the kernel since:
kernel commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0
Author: Imre Deak
Date: Thu Jan 28 16:04:12 2016 +0200
drm/i915/bxt: update list of PCIIDs
Signed-off-by: Rodrigo Vivi
---
lib/intel_chipset.h | 6 +-
1 file changed, 5 insertion
== Series Details ==
Series: drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit
URL : https://patchwork.freedesktop.org/series/4491/
State : failure
== Summary ==
Series 4491v1 drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit
http://patchwork.freedesktop.org/api/1.0/series/4491/rev
On Fri, Mar 18, 2016 at 02:05:26PM +0530, akash.g...@intel.com wrote:
> @@ -974,6 +1108,13 @@ int i915_gem_context_setparam_ioctl(struct drm_device
> *dev, void *data,
> return PTR_ERR(ctx);
> }
>
> + /*
> + * Take a reference also, as in certain cases we have to rel
As suggested by Ville Syrjälä, add expect-to-fail tests for X-tiled
90/270 rotations on gen >= 9
Cc: Joonas Lahtinen
Signed-off-by: Matthew Auld
---
tests/kms_rotation_crc.c | 54
1 file changed, 54 insertions(+)
diff --git a/tests/kms_rotation_
On Fri, 2016-03-04 at 21:43 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Extract the GPLL reference frequency from CCK and use it in the
> GPU freq<->opcode conversions on VLV/CHV. This eliminates all the
> assumptions we have about which divider is used for which czclk
>
On Mon, 2016-03-14 at 09:27 +0100, Maarten Lankhorst wrote:
> With async modesets this is no longer protected with connection_mutex,
> so ensure that each pll has its own lock. The pll configuration state
> is still protected; it's only the pll updates that need locking against
> concurrency.
I th
Atm, in case failure injection forces an error the subsequent "*ERROR*
failed to init modeset" error message will make automated tests (CI)
report this event as a breakage even though the event is expected. To
fix this print the error message with debug log level in this case.
While at it print th
Some sinks need some time during the process of resuming the system from
sleep before they're ready to handle transactions. While it would be
nice if they responded with NACKs in these scenarios, this isn't always
the case as a few sinks will just timeout on all of the transactions
they receive.
T
Split out the part initing the clock gating hooks and move it earlier.
Add a new NOP hook for platforms without the need to apply clockgating
or workaround settings, so that the hook can be called unconditionally.
Also add a WARN for future platforms that forget to add a hook.
The rest of the hook
On Wed, Mar 16, 2016 at 03:35:13PM +, Tvrtko Ursulin wrote:
>
> On 16/03/16 15:01, Patchwork wrote:
> > == Series Details ==
> >
> > Series: series starting with [1/5] drm/i915: Rename local struct
> > intel_engine_cs variables
> > URL : https://patchwork.freedesktop.org/series/4508/
> > St
== Series Details ==
Series: series starting with [1/5] drm/i915: Rename local struct
intel_engine_cs variables
URL : https://patchwork.freedesktop.org/series/4508/
State : failure
== Summary ==
Series 4508v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/4508/rev
On Fri, Mar 18, 2016 at 10:20:52PM +0530, Vandana Kannan wrote:
> From: Daniel Vetter
>
> For render compression, userspace passes aux stride and offset values as an
> additional entry in the fb structure. This should not be treated as garbage
> and discarded as data belonging to no plane.
> This
On Wed, Mar 16, 2016 at 10:56:33AM +0200, Jani Nikula wrote:
> On Tue, 15 Mar 2016, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Compute the DSI PLL parameters during .compute_config() rather than
> > .pre_pll_enable() so that we can fail gracefully if we can't find
> > sui
This patch adds ioctl-errors subtest to be used for exercising prime sync ioctl
errors.
The subtest constantly interrupts via signals a function doing concurrent blit
to stress out the right usage of prime_sync_*, making sure these ioctl errors
are handled accordingly. Important to note that in ca
On Fri, Mar 18, 2016 at 06:41:40PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote:
> > On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote:
> > > On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote:
> > > > Since we've fixed up drm_dp_dpcd_re
On Wed, 2016-03-16 at 14:37 +0200, Tomi Sarvela wrote:
> On Wednesday 16 March 2016 10:48:43 Imre Deak wrote:
> > Tomi, noticed two things that maybe infrastructure related, see
> > below:
> >
> > > Test drv_module_reload_basic:
> > > skip -> PASS (bdw-nuci7)
> > > Test
Some configs use the P2X type but some use a P3X type PCH, so add that
to the detect_pch function so things work correctly.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm
From: Ankitprasad Sharma
In pwrite_fast, map an object page by page if obj_ggtt_pin fails. First,
we try a nonblocking pin for the whole object (since that is fastest if
reused), then failing that we try to grab one page in the mappable
aperture. It also allows us to handle objects larger than th
Hey Chris,
I added comments for both Ville and you, please help me to understand this.
Regards
Shashank
On 3/17/2016 9:51 PM, Ville Syrjälä wrote:
On Thu, Mar 17, 2016 at 09:35:30PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 3/17/2016 9:31 PM, Ville Syrjälä wrote:
On Thu, Mar 17, 201
For BXT, description of polarities of PORT_PLL_REF_SEL
has been reversed for newer Gen9LP steppings according to the
recent update in Bspec. This bit now should be set for
"Non-SSC" mode for all Gen9LP starting from B0 stepping.
v2: Only B0 and newer stepping should be affected by this
change.
Si
Add support for forcing an error at selected places in the driver. As an
example add 4 options to fail during driver loading.
Requested by Chris.
v2:
- Add fault point for modeset initialization
- Print debug message when injecting an error
v3:
- Rename inject_fault to inject_load_failure, rename
Move the GTT,MSI IRQ cleanup later so that it matches their
corresponding init order. Also fix the order of these calls wrt. each
other to match their corresponding init order.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_dma.c | 11 ---
1 file changed, 4 insertions(+), 7 delet
== Series Details ==
Series: series starting with [1/3] drm/i915/gtt: Reference mappable_end
variable from pointer
URL : https://patchwork.freedesktop.org/series/4618/
State : warning
== Summary ==
Series 4618v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/4618/
On Mon, 2016-03-14 at 09:27 +0100, Maarten Lankhorst wrote:
> Warn for the wrong mask in enable only. Disable will have the wrong mask now
> because the new state is committed before disabling the old state.
>
> Changes since v1:
> - Use crtc_mask (Durgadoss)
> - Rebase.
Reviewed-by: Ander Consel
== Series Details ==
Series: series starting with [v2,1/4] drm/i915/gtt: Reference mappable_end
variable from pointer
URL : https://patchwork.freedesktop.org/series/4620/
State : failure
== Summary ==
Series 4620v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/46
Since we've fixed up drm_dp_dpcd_read() to allow for retries when things
timeout, there's no use for having this function anymore. Good riddens.
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_dp.c | 79 -
1 file changed, 22 insertions(+), 57 deletions
On Wed, 16 Mar 2016, Daniel Vetter wrote:
> On Wed, Mar 16, 2016 at 12:43:34PM +0200, Jani Nikula wrote:
>> Favor a single point of truth instead of duplicating the information.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 -
>> drivers/gpu/drm/i915/intel_bi
This patch restricts usage of live status check for HDMI detection.
While testing certain (monitor + cable) combinations with various
intel platforms, it seems that live status register is not reliable
on some older devices. So limit the live_status check from VLV onwards.
This fixes a regression
Hi,
Please consider pulling i915 updates to linux-firmware.git:
The following changes since commit
0a0c97667d0e80c56de8fd999d17bf2b553aab8f:
linux-firmware/i915: Major GuC release for Skylake - ver 6.1 (2016-03
-16 15:35:42 -0700)
are available in the git repository at:
git://people.freede
On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote:
> > On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote:
> > > Since we've fixed up drm_dp_dpcd_read() to allow for retries when things
> > > timeout, there's no use for
On 18/03/16 00:36, Arun Siluvery wrote:
On 17/03/2016 16:00, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
There is a lot of ways to get to our dev_priv depending on which
object is at hand and often what was chosen by the developer.
We can make to_i915() accept different pointers by using comp
Use a table similar to vlv to check for accepted gpio indexes. For now,
add all, but this list should be trimmed down. Use managed gpio request,
which will be automatically released when the driver is detached.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 667 +
On Thu, Mar 17, 2016 at 05:15:39PM +0100, Michał Winiarski wrote:
> Test description suggested that all platforms were testing qword writes,
> while in fact only gen4-gen5 did.
>
> v2: Test dword/qword writes for all available platforms.
> v3: Rewrite, drop libdrm/intel_batchbuffer dependencies,
>
Although the long term future of get_user_pages_locked() itself is
doubtful, the kernel currently recommends:
/* get_user_pages should be phased out in favor of
* get_user_pages_locked|unlocked or get_user_pages_fast. Nothing
* should use get_user_pages because it cannot pass
* FAULT_FLAG_ALLOW
On Wed, Mar 16, 2016 at 03:18:04PM -0400, Lyude wrote:
> After unplugging a DP MST display from the system, we have to go through
> and destroy all of the DRM connectors associated with it since none of
> them are valid anymore. Unfortunately, intel_dp_destroy_mst_connector()
> doesn't do a good en
On Fri, Mar 18, 2016 at 10:59:41AM +0200, Joonas Lahtinen wrote:
> On pe, 2016-03-18 at 00:18 +0200, Imre Deak wrote:
> > On Thu, 2016-03-17 at 22:14 +, Chris Wilson wrote:
> > >
> > > On Fri, Mar 18, 2016 at 12:09:30AM +0200, Imre Deak wrote:
> > > >
> > > > On Thu, 2016-03-17 at 21:48 +
Test description suggested that all platforms were testing qword writes,
while in fact only gen4-gen5 did.
v2: Test dword/qword writes for all available platforms
Cc: Chris Wilson
Signed-off-by: Michał Winiarski
---
tests/gem_pipe_control_store_loop.c | 49 +
Regards
Shashank
On 3/17/2016 11:29 PM, Jani Nikula wrote:
On Thu, 17 Mar 2016, "Sharma, Shashank" wrote:
[ text/plain ]
Hey Chris,
I added comments for both Ville and you, please help me to understand this.
Regards
Shashank
On 3/17/2016 9:51 PM, Ville Syrjälä wrote:
On Thu, Mar 17, 2016 at
On Fri, Mar 18, 2016 at 07:16:37PM +, Chris Wilson wrote:
> Not sure how best to put this to use yet, we need a set of benchmarks to
> track changes as well as a few hard fail criteria. But at least this is a
> start towards measuring how long we block signals whilst in the driver.
I think I'm
Regards
Shashank
On 3/17/2016 10:17 PM, Ville Syrjälä wrote:
On Thu, Mar 17, 2016 at 10:03:04PM +0530, Sharma, Shashank wrote:
Hey Chris,
I added comments for both Ville and you, please help me to understand this.
Regards
Shashank
On 3/17/2016 9:51 PM, Ville Syrjälä wrote:
On Thu, Mar 17, 20
On Wed, Mar 16, 2016 at 12:43:31PM +0200, Jani Nikula wrote:
> Hide knowledge about VBT child devices in intel_bios.c.
>
> Signed-off-by: Jani Nikula
Patches 2&3: Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_bios.c | 33
Atm, in case failure injection forces an error the subsequent
"*ERROR* failed to init modeset" error message will make automated
tests (CI) report this event as a breakage even though the event is
expected. To fix this print the error message with debug log level
in this case.
While at it print th
s/requite/require
s/presumaly/presumably
s/disalling/disabling
I think this makes sense so:
Reviewed-by: Matthew Auld
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
== Series Details ==
Series: drm/i915: Support to enable TRTT on GEN9 (rev8)
URL : https://patchwork.freedesktop.org/series/2321/
State : failure
== Summary ==
CC drivers/usb/host/xhci-pci.o
CC [M] drivers/net/usb/ax88179_178a.o
LD drivers/usb/storage/usb-storage.o
LD d
On pe, 2016-03-18 at 12:11 +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2,1/4] drm/i915/gtt: Reference mappable_end
> variable from pointer
> URL : https://patchwork.freedesktop.org/series/4620/
> State : failure
>
> == Summary ==
>
> Series 4620v1 Series
On 18/03/16 08:42, Joonas Lahtinen wrote:
From: Chris Wilson
Throughout the code base, we use u32 for offsets into the global GTT. If
we ever see any hardware with a larger GGTT, then we run the real risk
of silent corruption. So test for our assumption up front so that we
have a nice reminder
In full gpu reset we prime all engines and reset domains corresponding to
each engine. Per engine reset is just a special case of this process
wherein only a single engine is reset. This change is aimed to modify
relevant functions to achieve this. There are some other steps we carry out
in case of
Hi Matt,
On Tue, 8 Mar 2016 10:32:37 -0800, Matt Roper wrote:
> A couple of the EDAC drivers have a nice memdev_dmi_entry structure for
> decoding DMI memory device entries. Move the structure definition to
> dmi.h so that it can be shared between those drivers and also other
> parts of the kern
According to the new init phases scheme we should have a definite step
in the init sequence where MMIO access is setup, so move the
corresponding code to a separate function. This also has the benefit of
making the error path cleaner both in the new function and in
i915_driver_load()/unload().
No
== Series Details ==
Series: drm/i915: simplify bind_to_vm init code
URL : https://patchwork.freedesktop.org/series/4531/
State : failure
== Summary ==
Series 4531v1 drm/i915: simplify bind_to_vm init code
http://patchwork.freedesktop.org/api/1.0/series/4531/revisions/1/mbox/
Test drv_module_
From: Ankitprasad Sharma
This checks if the kernel supports creation of stolen backed objects
before doing a pread/pwrite on stolen backed objects.
Also correcting the CREATE_VERSION ioctl number in getparam ioctl,
due to kernel changes added in between.
Signed-off-by: Ankitprasad Sharma
---
This is primarily intended to simplify later patches that add various
backpointers to the structs, but in the meantime we can enjoy various
little syntactic conveniences.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 12 +-
drivers/gpu/drm/i915/i915_drv.h
On Thu, Mar 17, 2016 at 03:18:03PM -0300, Tiago Vignatti wrote:
> This patch adds ioctl-errors subtest to be used for exercising prime sync
> ioctl
> errors.
>
> The subtest constantly interrupts via signals a function doing concurrent blit
> to stress out the right usage of prime_sync_*, making
In sequence block v2, and only in v2, the gpio source (i.e. IOSF port)
is specified separately.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_pane
== Series Details ==
Series: Support for creating/using Stolen memory backed objects (rev12)
URL : https://patchwork.freedesktop.org/series/659/
State : failure
== Summary ==
Series 659v12 Support for creating/using Stolen memory backed objects
http://patchwork.freedesktop.org/api/1.0/series/6
On 17/03/16 10:57, Gore, Tim wrote:
Tim Gore
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
-Original Message-
From: Patchwork [mailto:patchw...@emeril.freedesktop.org]
Sent: Thursday, March 17, 2016 9:36 AM
To: Gore, Tim
Cc: intel-gfx@lists.freedesktop.
On Wed, Mar 16, 2016 at 01:38:56PM +0200, Imre Deak wrote:
> The only steps requiring device access is the fence and swizzling
> initialization, so split these out keeping them in their current place
> and move the rest of init steps earlier.
>
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/
On Thu, Mar 17, 2016 at 10:53:08PM +0200, Imre Deak wrote:
> On Thu, 2016-03-17 at 20:44 +, Chris Wilson wrote:
> > On Thu, Mar 17, 2016 at 09:50:19PM +0200, Imre Deak wrote:
> > > On Thu, 2016-03-17 at 19:41 +, Chris Wilson wrote:
> > > > On Thu, Mar 17, 2016 at 06:08:05PM +0200, Imre Deak
Hi Vandana,
On 18 March 2016 at 16:50, Vandana Kannan wrote:
> The reason for using a plane property instead of fb modifier:-
> In Android, OGL passes a render compressed buffer to hardware composer (HWC),
> which would then request a flip on that buffer after checking if the target
> can support
== Series Details ==
Series: Split driver init step to phases (rev2)
URL : https://patchwork.freedesktop.org/series/4509/
State : failure
== Summary ==
Series 4509v2 Split driver init step to phases
2016-03-16T12:32:02.196998
http://patchwork.freedesktop.org/api/1.0/series/4509/revisions/2/mb
Jordan Justen writes:
> For Haswell, we will want another table of registers while retaining
> the large common table of whitelisted registers shared by all gen7
> devices.
>
> Signed-off-by: Jordan Justen
Reviewed-by: Francisco Jerez
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 101
>
+intel-gfx
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Thursday, March 17, 2016 9:37 AM
To: Jindal, Sonika; Vetter, Daniel; ville.syrj...@linux.intel.com;
jani.nik...@linux.intel.com
Cc: Sharma, Shashank
Subject: [PATCH] drm/i915: Restrict usage of live status check
From: Daniel Vetter
For render compression, userspace passes aux stride and offset values as an
additional entry in the fb structure. This should not be treated as garbage
and discarded as data belonging to no plane.
This patch introduces a check related to AUX plane to support the
scenario of re
On Thu, 2016-03-17 at 21:03 +, Chris Wilson wrote:
> On Thu, Mar 17, 2016 at 10:53:08PM +0200, Imre Deak wrote:
> > On Thu, 2016-03-17 at 20:44 +, Chris Wilson wrote:
> > > On Thu, Mar 17, 2016 at 09:50:19PM +0200, Imre Deak wrote:
> > > > On Thu, 2016-03-17 at 19:41 +, Chris Wilson wro
This patch includes enabling render decompression (RC) after checking all the
requirements (format, tiling, rotation etc.). Along with this, the WAs
mentioned in BSpec Workaround page have been implemented.
TODO:
1. Disable stereo 3D when render decomp is enabled (bit 7:6)
2. Render decompression
On Thu, Mar 17, 2016 at 10:03:04PM +0530, Sharma, Shashank wrote:
> Hey Chris,
> I added comments for both Ville and you, please help me to understand this.
>
> Regards
> Shashank
>
> On 3/17/2016 9:51 PM, Ville Syrjälä wrote:
> > On Thu, Mar 17, 2016 at 09:35:30PM +0530, Sharma, Shashank wrote:
== Series Details ==
Series: series starting with [v2] mm/vmap: Add a notifier for when we run out
of vmap address space (rev2)
URL : https://patchwork.freedesktop.org/series/4569/
State : failure
== Summary ==
Series 4569v2 Series without cover letter
http://patchwork.freedesktop.org/api/1.0
On Wed, Mar 16, 2016 at 12:43:35PM +0200, Jani Nikula wrote:
> We've been accumulating code across the driver that depends on the VBT
> specific structures and defines. The VBT is an uncontrollable
> beast. Encourage encapsulation of the VBT data by hiding the structures
> and defines in a private
Joonas Lahtinen writes:
> [ text/plain ]
> From: Chris Wilson
>
> Throughout the code base, we use u32 for offsets into the global GTT. If
> we ever see any hardware with a larger GGTT, then we run the real risk
> of silent corruption. So test for our assumption up front so that we
> have a nice
On Wed, Mar 16, 2016 at 4:45 PM, Tvrtko Ursulin
wrote:
> On 16/03/16 15:40, Ville Syrjälä wrote:
>>
>> On Wed, Mar 16, 2016 at 03:35:13PM +, Tvrtko Ursulin wrote:
>>>
>>>
>>> On 16/03/16 15:01, Patchwork wrote:
== Series Details ==
Series: series starting with [1/5] drm/i91
On 16/03/16 15:56, Daniel Vetter wrote:
On Wed, Mar 16, 2016 at 4:45 PM, Tvrtko Ursulin
wrote:
On 16/03/16 15:40, Ville Syrjälä wrote:
On Wed, Mar 16, 2016 at 03:35:13PM +, Tvrtko Ursulin wrote:
On 16/03/16 15:01, Patchwork wrote:
== Series Details ==
Series: series starting with [
On Wed, Mar 16, 2016 at 01:52:04PM +0200, Mika Kuoppala wrote:
> In full gpu reset we prime all engines and reset domains corresponding to
> each engine. Per engine reset is just a special case of this process
> wherein only a single engine is reset. This change is aimed to modify
> relevant functi
Upon creating a partial view we should check that the offset + size is
valid relative to the size of the gem object.
v2:
(Tvrtko Ursulin)
- Don't use pages->nents to determine the page count
v3:
(Chris Wilson)
- Handle potential overflow
v4:
(Chris Wilson)
- Idiomatically handle overfl
From: Tvrtko Ursulin
Where we have a request we can use req->i915 directly instead
of going through the engine and device. Coccinelle script:
@@
function f;
identifier r;
@@
f(..., struct drm_i915_gem_request *r, ...)
{
...
- engine->dev->dev_private
+ r->i915
...
}
@@
struct drm_i915_gem_reques
After unplugging a DP MST display from the system, we have to go through
and destroy all of the DRM connectors associated with it since none of
them are valid anymore. Unfortunately, intel_dp_destroy_mst_connector()
doesn't do a good enough job of ensuring that throughout the destruction
process th
== Series Details ==
Series: Split driver init step to phases (rev3)
URL : https://patchwork.freedesktop.org/series/4509/
State : warning
== Summary ==
Series 4509v3 Split driver init step to phases
http://patchwork.freedesktop.org/api/1.0/series/4509/revisions/3/mbox/
Test drv_module_reload_
On Mon, 2016-03-07 at 16:24 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/csr: Allow matching unknown HW steppings with
> generic firmware
> URL : https://patchwork.freedesktop.org/series/4173/
> State : failure
>
> == Summary ==
>
> Series 4173v1 drm/i915/csr: Allow matc
On Thu, 17 Mar 2016, "Sharma, Shashank" wrote:
> [ text/plain ]
> Hey Chris,
> I added comments for both Ville and you, please help me to understand this.
>
> Regards
> Shashank
>
> On 3/17/2016 9:51 PM, Ville Syrjälä wrote:
>> On Thu, Mar 17, 2016 at 09:35:30PM +0530, Sharma, Shashank wrote:
>>>
== Series Details ==
Series: drm/i915: Fix eDP low vswing for Broadwell
URL : https://patchwork.freedesktop.org/series/4499/
State : failure
== Summary ==
Series 4499v1 drm/i915: Fix eDP low vswing for Broadwell
http://patchwork.freedesktop.org/api/1.0/series/4499/revisions/1/mbox/
Test drv_m
On Wed, 16 Mar 2016, Jani Nikula wrote:
> drivers/gpu/drm/i915/intel_dpll_mgr.c:1200:32: warning: Using plain integer
> as NULL pointer
>
> Fixes: 304b65cbdc8d ("drm/i915: Move SKL/KLB pll selection logic to
> intel_dpll_mgr.c")
Forgot to Cc: Ander on this one.
BR,
Jani.
> Signed-off-by: Jani
All of this is SW only initialization so we can move them earlier. Move
the mutex init where the rest of the locks are inited. While at it also
convert dev to dev_priv.
v2:
- use the term hook instead of callback for these functions (Jani)
CC: Jani Nikula
Signed-off-by: Imre Deak
---
drivers/g
In preparation for engine reset work update this parameter to handle more
than one type of reset. Default at the moment is still full gpu reset.
Cc: Chris Wilson
Cc: Mika Kuoppala
Signed-off-by: Arun Siluvery
---
drivers/gpu/drm/i915/i915_params.c | 6 +++---
drivers/gpu/drm/i915/i915_params.h
On Fri, Mar 18, 2016 at 02:31:23PM +0530, Goel, Akash wrote:
>
>
> On 3/18/2016 2:06 PM, Chris Wilson wrote:
> >On Fri, Mar 18, 2016 at 02:07:40PM +0530, akash.g...@intel.com wrote:
> >>+/* emit_store_qword
> >>+ * populate batch buffer with MI_STORE_DWORD_IMM command
> >>+ * @fd: drm file descri
On Wed, Mar 16, 2016 at 11:27:05AM +0200, Jani Nikula wrote:
> On Tue, 15 Mar 2016, ville.syrj...@linux.intel.com wrote:
> > [ text/plain ]
> > From: Ville Syrjälä
> >
> > DPLL_MD(PIPE_C) is AWOL on CHV. Instead of fixing it someone added
> > chicken bits to propagate the pixel multiplier from DPL
On Thu, 17 Mar 2016, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> There is a lot of ways to get to our dev_priv depending on which
> object is at hand and often what was chosen by the developer.
>
> We can make to_i915() accept different pointers by using compile
> time magic. Like:
>
> dev
On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote:
> > Since we've fixed up drm_dp_dpcd_read() to allow for retries when things
> > timeout, there's no use for having this function anymore. Good riddens.
> >
> > Signed-off-by: Ly
On Fri, Mar 18, 2016 at 05:05:44PM +0200, Jani Nikula wrote:
> BXT isn't as limited as BYT and CHT regarding DSI pipes and ports.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
On Wed, 16 Mar 2016, Ville Syrjälä wrote:
> On Tue, Mar 15, 2016 at 09:51:12PM +0200, Jani Nikula wrote:
>> BXT isn't as limited as BYT and CHT regarding DSI pipes and ports.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 1 +
>> drivers/gpu/drm/i915/intel_dsi.c
Prep work for DSI transcoders. No functional changes.
v2: call split functions at a higher level (Ville)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_display.c | 32 ++--
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i91
On Thu, Mar 17, 2016 at 09:50:19PM +0200, Imre Deak wrote:
> On Thu, 2016-03-17 at 19:41 +, Chris Wilson wrote:
> > On Thu, Mar 17, 2016 at 06:08:05PM +0200, Imre Deak wrote:
> > > On Thu, 2016-03-17 at 15:55 +, Chris Wilson wrote:
> > > > 80cols rules still apply to messages :)
> > > >
>
201 - 300 of 324 matches
Mail list logo
