On Tue, Jan 05, 2016 at 08:35:37AM -0800, Paul E. McKenney wrote:
> On Tue, Jan 05, 2016 at 04:06:48PM +0100, Peter Zijlstra wrote:
> > On Tue, Jan 05, 2016 at 04:02:13PM +0100, Peter Zijlstra wrote:
> > > > Shouldn't the slab subsystem do this for us if we request it delays the
> > > > actual kfre
On Sat, Jan 02, 2016 at 03:41:29PM +0200, Jani Nikula wrote:
> On Thu, 31 Dec 2015, Matt Roper wrote:
> > On Thu, Dec 31, 2015 at 08:31:45AM +0530, Kannan, Vandana wrote:
> >> When I submitted the PPS patch in April, I got an input from Jani to
> >> not make changes in i915_suspend.c as it was to
On Tue, Jan 05, 2016 at 05:54:07PM +0100, Daniel Vetter wrote:
> They're causing massive amounts of dmesg noise and hence CI noise all
> over the place. Enabling them for a bit was good enough to refresh our
> task list of what's still needed to enable rpm by default.
>
> To make sure we're not fo
== Summary ==
Built on bc303261a81a96298b2f9e02734aeaa0a25421a6 drm-intel-nightly:
2016y-01m-05d-16h-47m-54s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (skl-i5k-2) UNSTABLE
dmesg-warn -> PASS (skl-
On Tue, Jan 05, 2016 at 05:47:55PM -0800, Matt Roper wrote:
> Our attempts save/restore panel power state in i915_suspend.c are
> causing unclaimed register warnings on BXT since the registers for this
> platform differ from older platforms.
>
> The big hammer suspend/resume shouldn't actually be
On Wed, Jan 06, 2016 at 09:06:58AM +0100, Daniel Vetter wrote:
> This pretty much went over my head ;-) What I naively hoped for is that
> kfree() on an rcu-freeing slab could be tought to magically stall a bit
> (or at least expedite the delayed freeing) if we're piling up too many
> freed objects
== Summary ==
HEAD is now at 24b053a drm-intel-nightly: 2016y-01m-06d-08h-16m-11s UTC
integration manifest
Applying: drm/i915/guc: Expose (intel)_lr_context_size()
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/intel_lrc.c
M drivers/gpu/drm/i915/intel_lrc.h
Fall
== Summary ==
Built on 24b053acb16b4b3b021575e4ee30ffedd3ab2920 drm-intel-nightly:
2016y-01m-06d-08h-16m-11s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
dmesg-warn -> PASS (skl-i5k-2) UNSTABLE
dmesg-warn -> PASS (bdw-
On Thu, Dec 10, 2015 at 11:45:54AM +0100, Daniel Vetter wrote:
> On Thu, Dec 10, 2015 at 12:19:29PM +0200, Mika Kuoppala wrote:
> > Chris Wilson writes:
> >
> > > Following a GPU reset, we may leave the context in a poorly defined
> > > state, and reloading from that context will leave the GPU fl
== Summary ==
Built on 24b053acb16b4b3b021575e4ee30ffedd3ab2920 drm-intel-nightly:
2016y-01m-06d-08h-16m-11s UTC integration manifest
Test drv_getparams_basic:
Subgroup basic-eu-total:
pass -> DMESG-FAIL (skl-i5k-2)
pass -> DMESG-FAIL (skl-i7k-
Hey,
Op 15-12-15 om 00:51 schreef Matt Roper:
> In addition to calculating final watermarks, let's also pre-calculate a
> set of intermediate watermark values at atomic check time. These
> intermediate watermarks are a combination of the watermarks for the old
> state and the new state; they shou
Hi,
I've seen the RB but unfortunately I think we need another small tweak:
On 11/12/15 14:14, Michel Thierry wrote:
i915 validates that requested offset is in canonical form, so tests need
to convert the offsets as required.
Also add test to verify non-canonical 48-bit address will be reject
On vblank instant-off systems, we can get into a situation where the cost
of enabling and disabling the vblank IRQ around a drmWaitVblank query
dominates. And with the advent of even deeper hardware sleep state,
touching registers becomes ever more expensive. However, we know that if
the user want
Avoid adding to the waitqueue and reprobing the current vblank if the
caller is only querying the current vblank sequence and timestamp, where
we know that the wait would return immediately.
v2: Add CRTC identifier to debug messages
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Daniel Vette
Bypass all the spinlocks and return the last timestamp and counter from
the last vblank if the driver delcares that it is accurate (and stable
across on/off), and the vblank is currently enabled.
This is dependent upon the both the hardware and driver to provide the
proper barriers to facilitate r
== Summary ==
HEAD is now at 89d0d1b drm-intel-nightly: 2016y-01m-06d-10h-37m-17s UTC
integration manifest
Applying: drm/i915: Cleaning up DDI translation tables
Repository lacks necessary blobs to fall back on 3-way merge.
Cannot fall back to three-way merge.
Patch failed at 0001 drm/i915: Clean
My kbl stopped working because of this.
Fixes regression from
commit 2f693e28b8df69f67beced5e18bb2b91c2bfcec2
Author: Damien Lespiau
Date: Wed Nov 4 19:24:12 2015 +0200
drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini
sequences
Cc: Damien Lespiau
Cc: Paulo Zanoni
On 1/6/2016 10:48 AM, Tvrtko Ursulin wrote:
Hi,
I've seen the RB but unfortunately I think we need another small tweak:
On 11/12/15 14:14, Michel Thierry wrote:
i915 validates that requested offset is in canonical form, so tests need
to convert the offsets as required.
Also add test to verif
== Summary ==
Built on 89d0d1b6f0e9c3a6b90476bd115cfe1881646fd6 drm-intel-nightly:
2016y-01m-06d-10h-37m-17s UTC integration manifest
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-a-frame-sequence:
pass -> DMESG-WARN (byt-nuc) UNSTABLE
bdw-nuci7total:132
On Wed, Jan 06, 2016 at 12:08:36PM +, Michel Thierry wrote:
> My kbl stopped working because of this.
>
> Fixes regression from
> commit 2f693e28b8df69f67beced5e18bb2b91c2bfcec2
> Author: Damien Lespiau
> Date: Wed Nov 4 19:24:12 2015 +0200
> drm/i915: Make turning on/off PW1 and Misc I
== Summary ==
Built on 89d0d1b6f0e9c3a6b90476bd115cfe1881646fd6 drm-intel-nightly:
2016y-01m-06d-10h-37m-17s UTC integration manifest
Test kms_addfb_basic:
Subgroup small-bo:
skip -> PASS (bdw-nuci7)
Test pm_rpm:
Subgroup basic-rte:
pas
This prevents a unnecessary modeset on a dell XPS 13 (2016).
N is always a power of 2, which means that for fuzzy matching we should
compare for inequality on the n values, then do fuzzy matching on the m
values.
Signed-off-by: Maarten Lankhorst
Tested-by:
--
diff --git a/drivers/gpu/drm/i915/i
Op 03-12-15 om 20:37 schreef Matt Roper:
> Previous patch series was here:
>http://lists.freedesktop.org/archives/intel-gfx/2015-November/081270.html
>
> The changes since the last version are mainly minor fixes based on review
> feedback from Ville and Maarten.
>
>
> Matt Roper (7):
> drm/i9
i915 validates that requested offset is in canonical form, so tests need
to convert the offsets as required.
Also add test to verify non-canonical 48-bit address will be rejected.
v2: Use sign_extend64 for converting to canonical form (Tvrtko)
Cc: Vinay Belgaumkar
Cc: Tvrtko Ursulin
Reviewed-b
On Wednesday, January 6, 2016 1:54:43 PM PST Maarten Lankhorst wrote:
> This prevents a unnecessary modeset on a dell XPS 13 (2016).
>
> N is always a power of 2, which means that for fuzzy matching we should
> compare for inequality on the n values, then do fuzzy matching on the m
> values.
>
>
On Wed, Jan 06, 2016 at 01:24:58PM +0100, Damien Lespiau wrote:
> On Wed, Jan 06, 2016 at 12:08:36PM +, Michel Thierry wrote:
> > My kbl stopped working because of this.
> >
> > Fixes regression from
> > commit 2f693e28b8df69f67beced5e18bb2b91c2bfcec2
> > Author: Damien Lespiau
> > Date: We
On Wed, Jan 06, 2016 at 01:54:43PM +0100, Maarten Lankhorst wrote:
> This prevents a unnecessary modeset on a dell XPS 13 (2016).
>
> N is always a power of 2, which means that for fuzzy matching we should
> compare for inequality on the n values, then do fuzzy matching on the m
> values.
>
> Sig
== Summary ==
Built on 89d0d1b6f0e9c3a6b90476bd115cfe1881646fd6 drm-intel-nightly:
2016y-01m-06d-10h-37m-17s UTC integration manifest
Test gem_basic:
Subgroup create-close:
pass -> DMESG-WARN (skl-i7k-2)
Test gem_cpu_reloc:
Subgroup basic:
pa
drm/i915: Update connector_mask during readout, v2.
The connector_mask may be used any time during the non-atomic
.crtc_disable which is called before the full atomic state is
set up and needs to be accurate for that reason.
Changes since v1:
- Update connector_mask in readout_hw_state and add a
== Summary ==
Built on 142b83d5713d07d01f6a0a1993761651459c2e66 drm-intel-nightly:
2016y-01m-06d-13h-21m-32s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
pass -> DMESG-WARN (skl-i7k-2) UNSTABLE
Test kms_pipe_crc_basic:
Subgroup read
On 1/5/2016 6:30 PM, Ben Widawsky wrote:
I think this patch is a worthwhile cleanup even if it might look only marginally
useful. It gets more useful in upcoming patches and for handling of future GEN
platforms.
The only non-mechanical part of this is the removal of the extra & operation on
the
On 1/5/2016 6:30 PM, Ben Widawsky wrote:
There is no point in emitting a WARN since the backtrace will always be the
same. Errors have actually become easier to spot given the large number of WARNs
which exist today in modesetting paths.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/in
On 1/5/2016 6:30 PM, Ben Widawsky wrote:
This is a useful thing to have around as a function because the mechanism may
change in the future.
There is a net increase in LOC here, and it will continue to be the case on GEN8
and GEN9 - but future GENs may have an alternate mechanism for doing this.
On 1/5/2016 6:30 PM, Ben Widawsky wrote:
Sample output:
...
waiting: yes
ring->head: 0x
ring->tail: 0x0c50
ring->next_context_status_buffer: 0x5
CSB Pointer: 0x0405
Context 0 Status: 0x0001
Context 1 Status: 0x009d0018
Context 2 St
On 1/5/2016 6:30 PM, Ben Widawsky wrote:
Since we extracted it for use in error state, we may as well use it in debugfs
too.
Signed-off-by: Ben Widawsky
Reviewed-by: Michel Thierry
(depends on patch 4/5, where I have a small request)
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 +--
1 f
On Wed, Jan 06, 2016 at 03:09:41PM +, Michel Thierry wrote:
> On 1/5/2016 6:30 PM, Ben Widawsky wrote:
> >This is a useful thing to have around as a function because the mechanism may
> >change in the future.
> >
> >There is a net increase in LOC here, and it will continue to be the case on
>
> On Mon, Dec 14, 2015 at 03:31:09PM +0200, Meelis Roos wrote:
> > Between 4.4-rc3 and 4.4-rc4, i915 modesetting broke on my i5-2400 PC.
>
> That would seem to be SNB.
Yes.
> > Instead of seeing the new dense graphics mode, I see the last VGA text
> > lines and no X appears either.
>
> That's
On Wed, Jan 06, 2016 at 09:38:30AM +0100, Peter Zijlstra wrote:
> On Wed, Jan 06, 2016 at 09:06:58AM +0100, Daniel Vetter wrote:
> > This pretty much went over my head ;-) What I naively hoped for is that
> > kfree() on an rcu-freeing slab could be tought to magically stall a bit
> > (or at least e
On 23.11.2015 10:33, Daniel Vetter wrote:
> vgem doesn't have a shrinker or anything like that and drops backing
> storage only at object_free time. There's no use in trying to be
> clever and allocating backing storage delayed, it only causes trouble
> by requiring locking.
>
> Instead grab pages
On Tue, Jan 05, 2016 at 04:06:48PM +0100, Peter Zijlstra wrote:
> On Tue, Jan 05, 2016 at 04:02:13PM +0100, Peter Zijlstra wrote:
> > > Shouldn't the slab subsystem do this for us if we request it delays the
> > > actual kfree? Seems like a core bug to me ... Adding more folks.
> >
> > note that s
Hi everybody,
on my laptop I'm using 4.4.0-rc8 + drm-intel-nightly from
git://anongit.freedesktop.org/drm-intel
(commit 0417da5e6f56078d87d366d5f959f8290ae9d16d).
Found this after few hours (dunno if it's a false positive, something to
ignore or not):
[Tue Jan 5 15:15:44 2016] ---
Our attempts save/restore panel power state in i915_suspend.c are
causing unclaimed register warnings on BXT since the registers for this
platform differ from older platforms.
The big hammer suspend/resume shouldn't be necessary for PP since the
connector/encoder hooks should already handle this.
On Wed, Jan 06, 2016 at 11:38:32AM +0100, Maarten Lankhorst wrote:
> Hey,
>
> Op 15-12-15 om 00:51 schreef Matt Roper:
> > In addition to calculating final watermarks, let's also pre-calculate a
> > set of intermediate watermark values at atomic check time. These
> > intermediate watermarks are a
I've got Bay Trail based Asus X553MA and I've been experiencing daily hangs
with kernels beginning from 4.2-rc1. I haven't had any problems with 4.1.x
kernels and using 4.1.13 I've gotten constant 5+ day uptimes since November
(I had to at least suspend it once per week for traveling but during Chr
On 01/06/2016 11:15 AM, Janne Heikkinen wrote:
> I've got Bay Trail based Asus X553MA and I've been experiencing daily hangs
> with kernels beginning from 4.2-rc1. I haven't had any problems with 4.1.x
> kernels and using 4.1.13 I've gotten constant 5+ day uptimes since November
> (I had to at leas
In addition to calculating final watermarks, let's also pre-calculate a
set of intermediate watermark values at atomic check time. These
intermediate watermarks are a combination of the watermarks for the old
state and the new state; they should satisfy the requirements of both
states which means
On Wed, Jan 06, 2016 at 11:17:20AM -0800, Jesse Barnes wrote:
> On 01/06/2016 11:15 AM, Janne Heikkinen wrote:
> > I've got Bay Trail based Asus X553MA and I've been experiencing daily hangs
> > with kernels beginning from 4.2-rc1. I haven't had any problems with 4.1.x
> > kernels and using 4.1.13
From: Alex Dai
During driver unloading, the guc_client created for command submission
needs to be released to avoid memory leak.
Signed-off-by: Alex Dai
---
drivers/gpu/drm/i915/i915_guc_submission.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_guc_submissio
The only missing gap compared to Skylake is the GuC
because we don't have yet a GuC firmware image to publish.
However with all other parts in place this is very similar to
Skylake which is out of this procection.
So I'm now confident that Kabylake is in a good stage and won't
cause troubles like
When adding IS_KABYLAKE definition I didn't included the
DC states related because I was planing to include them
with the patch that fixes DMC firmware loading, but I
forgot them.
Meanwhile this runtime pm code changed a lot for
Skylake.
Well, I didn't expect that this would crash the machine
and
From: "Boyer, Wayne"
Extend the same reasoning as in the patch listed below. It's not an
error for the workaround list to be empty if no workarounds are needed.
commit 02235808b61cd9382d224b0df263193006dd9913
Author: Francisco Jerez
Date: Wed Oct 7 14:44:01 2015 +0300
drm
Hello
Intel MOCS/WA registers got initialized when LR context of RCS ring is created.
When one context uses only VCS ring and LR context of RCS ring is not created,
what will the value of Intel MOCS/WA registers be? Undefined?
___
Intel-gfx mailing lis
== Summary ==
Built on 532a438d16e609a4b8f161c0a18b34f24001ed8f drm-intel-nightly:
2016y-01m-06d-15h-38m-17s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-vebox:
skip -> PASS (bdw-nuci7)
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Thursday, January 07, 2016 3:43 PM
>
> On Thu, Jan 07, 2016 at 05:35:13AM +, Gong, Zhipeng wrote:
> > Hello
> >
> > Intel MOCS/WA registers got initialized when LR context of RCS ring is
> created.
>
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