On Wed, 26 Aug 2015, Sivakumar Thulasimani
wrote:
> On 8/20/2015 1:17 PM, Jani Nikula wrote:
>> Add a common intel_digital_port_connected() that splits out to functions
>> for different platforms. No functional changes.
>>
>> v2: make the function return a boolean
>>
>> Signed-off-by: Jani Nikula
On Wed, 26 Aug 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Make the code mode readable by pulling the "does this crtc have any
> encoders?" deduction into a separate function.
>
> Cc: Maarten Lankhorst
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
>
On Thu, 27 Aug 2015, Paulo Zanoni wrote:
> 2015-08-12 12:44 GMT-03:00 :
>> From: Ville Syrjälä
>>
>> Starting from SPT the only interrupts living in the south are GMBUS and
>> HPD. What's worse some of the SPT specific new bits conflict with some
>> other bits on earlier PCH generations. So bett
On Thu, Aug 27, 2015 at 12:04:37PM +0530, Ankitprasad Sharma wrote:
> On Tue, 2015-08-25 at 11:51 +0100, Siluvery, Arun wrote:
> > On 24/08/2015 12:58, ankitprasad.r.sha...@intel.com wrote:
> > > From: Ankitprasad Sharma
> > >
> > > This patch provides support for the User to populate the object
>
On Thu, Aug 27, 2015 at 11:18:15AM +0530, Ankitprasad Sharma wrote:
> On Mon, 2015-08-24 at 13:35 +0100, Chris Wilson wrote:
> > I am tempted to say this should be in a new
> >
> > __i915_gem_object_get_pages__tail_locked()
> >
> > so that we don't have to hunt down users if we ever need to modif
On Wed, Aug 26, 2015 at 05:51:46PM -0400, Rob Clark wrote:
> On Wed, Aug 26, 2015 at 3:49 PM, Daniel Vetter wrote:
> > Very strictly speaking this is possible if you have special hw and
> > genlocked CRTCs. In general switching a plane between two active CRTC
> > just won't work so well and is pro
On 8/27/2015 12:30 PM, Jani Nikula wrote:
On Wed, 26 Aug 2015, Sivakumar Thulasimani
wrote:
On 8/20/2015 1:17 PM, Jani Nikula wrote:
Add a common intel_digital_port_connected() that splits out to functions
for different platforms. No functional changes.
v2: make the function return a boole
On Thu, 27 Aug 2015, Sivakumar Thulasimani
wrote:
> On 8/27/2015 12:30 PM, Jani Nikula wrote:
>> On Wed, 26 Aug 2015, Sivakumar Thulasimani
>> wrote:
>>> On 8/20/2015 1:17 PM, Jani Nikula wrote:
Add a common intel_digital_port_connected() that splits out to functions
for different pla
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 9b8a36e7534dd8992cfc9d75ece61961eab02e95
commit: 9b8a36e7534dd8992cfc9d75ece61961eab02e95 [79/79] drm/atomic: refuse
changing CRTC for planes directly
config: i386-randconfig-a0-201534 (attached as .config)
reproduce:
git che
On 8/27/2015 1:38 PM, Jani Nikula wrote:
On Thu, 27 Aug 2015, Sivakumar Thulasimani
wrote:
On 8/27/2015 12:30 PM, Jani Nikula wrote:
On Wed, 26 Aug 2015, Sivakumar Thulasimani
wrote:
On 8/20/2015 1:17 PM, Jani Nikula wrote:
Add a common intel_digital_port_connected() that splits out to
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 7225
-Summary-
Platform Delta drm-intel-nightly Series Applied
ILK -1
On Wed, 26 Aug 2015, Daniel Vetter wrote:
> On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote:
>> As we mark the preallocated objects as bound, we should also flag them
>> correctly as being map-and-fenceable (if appropriate!) so that latter
>> users do not get confused and try and rebi
From: "Thulasimani,Sivakumar"
These patches together help detect DP displays on short pulse HPD
and pass the respective compliance test case (4.2.2.8)
v2: modifed first patch so we will read sink_count independent of
downstream ports availablility.
v3: split first patch so crtc enabled check is
From: "Thulasimani,Sivakumar"
This patch checks for changes in sink count between short pulse
hpds and forces full detect when there is a change.
This will allow both detection of hotplug and unplug of panels
through dongles that give only short pulse for such events.
v2: changed variable type
From: "Thulasimani,Sivakumar"
This patch reads sink_count dpcd always and removes its
read operation based on values in downstream port dpcd.
SINK_COUNT dpcd is not dependent on DOWNSTREAM_PORT_PRESENT dpcd.
SINK_COUNT denotes if a display is attached, while
DOWNSTREAM_PORT_PRESET indicates how
From: "Thulasimani,Sivakumar"
sink count can change between short pulse hpd hence this patch
adds a member variable to intel_dp so we can track any changes
between short pulse interrupts.
Signed-off-by: Sivakumar Thulasimani
---
drivers/gpu/drm/i915/intel_dp.c |5 ++---
drivers/gpu/drm/i9
From: "Thulasimani,Sivakumar"
Compliance requires the driver to read dpcd register 0 to 12 and
registers 0x200 to 0x205 to be read always.
Current code performs dpcd read for short pulse interrupts only
if the sink is enabled. This patch forces read for link status
and registers 0 to 12.
Signed-
Regards
Shashank
On 8/26/2015 8:47 PM, Daniel Vetter wrote:
On Wed, Aug 26, 2015 at 10:05:00AM +, Jindal, Sonika wrote:
HPD bits control the interrupt but the live status (with some monitors) takes
time to get set.
We had experienced this with VLV and CHV with few monitors.
So Android code
On Wed, Aug 26, 2015 at 6:41 PM, Vivi, Rodrigo wrote:
> On Wed, 2015-08-26 at 11:06 +0200, Daniel Vetter wrote:
>> On Thu, Aug 20, 2015 at 04:12:00PM -0700, Rodrigo Vivi wrote:
>> > From: Rodrigo Vivi
>> >
>> > Let's use a native read with retry as suggested per spec to
>> > fix Sink CRC on SKL w
There is no need to have a separate flag for tps3 as the information is
only used at one location. Move the logic there to make it easier to
follow.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 31 +--
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 fi
We can add this to drm dp helpers later.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9e90a2be22fa..12096c1df622 100644
--- a/drivers/gpu/drm/i915/
No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 12096c1df622..50ba527763e9 100644
--- a/drivers/gpu/drm/i915/intel_d
On Thu, 27 Aug 2015, Daniel Vetter wrote:
> On Wed, Aug 26, 2015 at 6:41 PM, Vivi, Rodrigo wrote:
>> On Wed, 2015-08-26 at 11:06 +0200, Daniel Vetter wrote:
>>> On Thu, Aug 20, 2015 at 04:12:00PM -0700, Rodrigo Vivi wrote:
>>> > From: Rodrigo Vivi
>>> >
>>> > Let's use a native read with retry a
On Thu, Aug 27, 2015 at 10:06:09AM +0530, Deepak wrote:
>
>
> On 07/09/2015 02:16 AM, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Add some checks that the state of the DPIO lanes is more or less what we
> > expect based on the overrides.
> >
> > The hardware only provide
Hey,
Op 26-08-15 om 16:43 schreef Daniel Vetter:
> On Wed, Aug 05, 2015 at 12:45:48PM +0200, Maarten Lankhorst wrote:
>> From: Patrik Jakobsson
>>
>> When reading out hw state for planes we disable inactive planes which in
>> turn triggers an update of the watermarks. The update depends on the
>>
On Wed, 2015-08-26 at 11:25 +0200, Daniel Vetter wrote:
> On Mon, Aug 24, 2015 at 05:28:13PM +0530, ankitprasad.r.sha...@intel.com
> wrote:
> > From: Ankitprasad Sharma
> >
> > We are trying to reduce the time for which the global 'struct_mutex'
> > is locked. Execbuffer ioctl is one place where
connector->encoder is initialized as NULL. Fix this by setting it in
during pre enable. MST connectors are not read out during initial hw
readout, and have no fixed encoder mappings. So it's harmless to
return false when the connector has never been assigned to an encoder.
Signed-off-by: Maarte
From: Ankitprasad Sharma
This patch provides a support for the User to immediately flush
out the cachelines for the pre-populated pages of an object, at the
time of its creation. This will not lead to any redundancy and would
further reduce the time for which the 'struct_mutex' is kept locked in
From: Ankitprasad Sharma
This patch provides support for the User to populate the object
with system pages at its creation time. Since this can be safely
performed without holding the 'struct_mutex', it would help to reduce
the time 'struct_mutex' is kept locked especially during the exec-buffer
From: Ankitprasad Sharma
We are trying to reduce the time for which the global 'struct_mutex'
is locked. Execbuffer ioctl is one place where it is generally held
for the longest time. And sometimes because of this occasional
glitches/flickers are observed in 60 fps playback (due to miss of
V-bla
From: Chris Wilson
We have for a long time been ultra-paranoid about the situation whereby
we hand back pages to the system that have been written to by the GPU
and potentially simultaneously by the user through a CPU mmapping. We
can relax this restriction when we know that the cache domain trac
When reading out hw state for planes we disable inactive planes which in
turn triggers an update of the watermarks. The update depends on the
crtc_clock being set which is done when reading out encoders. Thus
postpone the plane readout until after encoder readout.
This prevents a warning in skl_co
This will make sure we get a lockdep spat in all cases
even if the context is a complete garbage pointer.
Signed-off-by: Maarten Lankhorst
---
diff --git a/drivers/gpu/drm/drm_modeset_lock.c
b/drivers/gpu/drm/drm_modeset_lock.c
index 9abee87c1501..7c9ca2381d78 100644
--- a/drivers/gpu/drm/drm_mo
On Thu, Aug 27, 2015 at 01:47:26PM +0200, Maarten Lankhorst wrote:
> When reading out hw state for planes we disable inactive planes which in
> turn triggers an update of the watermarks. The update depends on the
> crtc_clock being set which is done when reading out encoders. Thus
> postpone the pl
On Thu, Aug 27, 2015 at 01:25:38PM +0300, Jani Nikula wrote:
> There is no need to have a separate flag for tps3 as the information is
> only used at one location. Move the logic there to make it easier to
> follow.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_dp.c | 31 +++
Hi,
On 4 August 2015 at 12:34, Maarten Lankhorst
wrote:
> Commit ec9f932ed41622d120de52a5b525e4d77b9ef17e
> "drm/atomic: Cleanup on error properly in the atomic ioctl."
> cleaned up some error paths, but didn't fix the TEST_ONLY path.
> In the check only case plane->fb shouldn't be updated, and
>
Op 27-08-15 om 14:19 schreef Daniel Stone:
> Hi,
>
> On 4 August 2015 at 12:34, Maarten Lankhorst
> wrote:
>> Commit ec9f932ed41622d120de52a5b525e4d77b9ef17e
>> "drm/atomic: Cleanup on error properly in the atomic ioctl."
>> cleaned up some error paths, but didn't fix the TEST_ONLY path.
>> In the
On Thu, Aug 27, 2015 at 02:43:35PM +0200, Maarten Lankhorst wrote:
> Op 27-08-15 om 14:19 schreef Daniel Stone:
> > Hi,
> >
> > On 4 August 2015 at 12:34, Maarten Lankhorst
> > wrote:
> >> Commit ec9f932ed41622d120de52a5b525e4d77b9ef17e
> >> "drm/atomic: Cleanup on error properly in the atomic ioc
Op 27-08-15 om 14:48 schreef Ville Syrjälä:
> On Thu, Aug 27, 2015 at 02:43:35PM +0200, Maarten Lankhorst wrote:
>> Op 27-08-15 om 14:19 schreef Daniel Stone:
>>> Hi,
>>>
>>> On 4 August 2015 at 12:34, Maarten Lankhorst
>>> wrote:
Commit ec9f932ed41622d120de52a5b525e4d77b9ef17e
"drm/atom
On Thu, Aug 27, 2015 at 02:50:34PM +0200, Maarten Lankhorst wrote:
> Op 27-08-15 om 14:48 schreef Ville Syrjälä:
> > On Thu, Aug 27, 2015 at 02:43:35PM +0200, Maarten Lankhorst wrote:
> >> Op 27-08-15 om 14:19 schreef Daniel Stone:
> >>> Hi,
> >>>
> >>> On 4 August 2015 at 12:34, Maarten Lankhorst
On Thu, 2015-08-20 at 18:11 -0700, Matt Roper wrote:
> Just pull the info out of the state structures rather than staging
> it in an additional set of structures.
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_pm.c | 304
> ++--
> 1 file cha
Op 27-08-15 om 14:52 schreef Ville Syrjälä:
> On Thu, Aug 27, 2015 at 02:50:34PM +0200, Maarten Lankhorst wrote:
>> Op 27-08-15 om 14:48 schreef Ville Syrjälä:
>>> On Thu, Aug 27, 2015 at 02:43:35PM +0200, Maarten Lankhorst wrote:
Op 27-08-15 om 14:19 schreef Daniel Stone:
> Hi,
>
Op 26-08-15 om 18:39 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> The BIOS sometimes likes to enable pipes w/o any ports, at least on
> older machines. Currently we fail to assign anything sensible to
> crtc->hwmode.crtc_clock which leads to complaints from the vblank code.
> D
Set DRIVER_MODESET and DRIVER_ATOMIC by default. The driver is fully atomic.
Remove the legacy suspend/resume, to fix a warning introduced by:
"drm: WARN_ON if a modeset driver uses legacy suspend/resume helpers"
and removing the .get_vblank_timestamp reset to NULL. It's a noop without UMS.
Sign
These three patches address Ville's review comments on top of the series.
BR,
Jani.
Jani Nikula (3):
drm/i915: ignore link rate in TPS3 selection
drm/i915: add yesno utility function
drm/i915: use the yesno helper for logging
drivers/gpu/drm/i915/i915_debugfs.c | 22 +++
TPS3 is mandatory for downstream devices that support HBR2, and Intel
platforms that support HBR2 also support TPS3. Whenever TPS3 is
supported by both the source and sink, it should be used. In other
words, whenever the source and sink are capable of 5.4 Gbps link, we
should anyway go for TPS3, re
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 17 +++--
drivers/gpu/drm/i915/intel_dp.c | 4 ++--
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
3 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/
Add a common function to return "yes" or "no" string based on the
argument, and drop the local versions of it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 5 -
drivers/gpu/drm/i915/i915_drv.h | 5 +
drivers/gpu/drm/i915/i915_gpu_error.c | 5 -
3 files
On Thu, Aug 27, 2015 at 04:23:30PM +0300, Jani Nikula wrote:
> Add a common function to return "yes" or "no" string based on the
> argument, and drop the local versions of it.
Purely out of curiosity, gcc is able to amalgamate the constant strings
(I remember reading that it is intelligent enough
Hi,
On 27 August 2015 at 13:43, Maarten Lankhorst
wrote:
> Op 27-08-15 om 14:19 schreef Daniel Stone:
>> On 4 August 2015 at 12:34, Maarten Lankhorst
>> wrote:
>> An early test precludes TEST_ONLY | PAGE_FLIP_EVENT, so you don't need
>> to mention this in the commit message; in this case, the ma
The initial state is read out correctly and the state is atomic,
so it's safe to preserve the fb without any hacks if it's suitable.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_fbdev.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b
This is done as a separate commit, to make it easier to revert
when things break.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_params.c | 5 -
drivers/gpu/drm/i915/intel_display.c | 3 +--
3 files changed, 1 insertion(+), 8 dele
This might not have been set during boot, and when we preserve
the initial mode this can result in a black screen.
Cc: Daniel Stone
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display
What was previously known as fastboot no longer works. But we can do much
better now
that we pass the old crtc state to begin_crtc_commit.
Even if we decide not to enable modeset this patch is useful, because it cleans
up
some non-atomic bits in a good way.
Maarten Lankhorst (5):
drm/i915: Se
It should really use the atomic state.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_fbdev.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index 6c9351b2e3af..6333241624c4 10064
Instead of doing a hack during primary plane commit the state
is updated during atomic evasion. It handles differences in
pipe size and the panel fitter.
This is continuing on top of Daniel's work to make faster
modesets atomic, and not yet enabled by default.
Signed-off-by: Maarten Lankhorst
--
On Thu, 27 Aug 2015, Chris Wilson wrote:
> On Thu, Aug 27, 2015 at 04:23:30PM +0300, Jani Nikula wrote:
>> Add a common function to return "yes" or "no" string based on the
>> argument, and drop the local versions of it.
>
> Purely out of curiosity, gcc is able to amalgamate the constant strings
>
On Thu, Aug 27, 2015 at 03:05:38PM +0200, Maarten Lankhorst wrote:
> Op 27-08-15 om 14:52 schreef Ville Syrjälä:
> > On Thu, Aug 27, 2015 at 02:50:34PM +0200, Maarten Lankhorst wrote:
> >> Op 27-08-15 om 14:48 schreef Ville Syrjälä:
> >>> On Thu, Aug 27, 2015 at 02:43:35PM +0200, Maarten Lankhorst
On Thu, Aug 27, 2015 at 03:44:05PM +0200, Maarten Lankhorst wrote:
> Instead of doing a hack during primary plane commit the state
> is updated during atomic evasion. It handles differences in
> pipe size and the panel fitter.
>
> This is continuing on top of Daniel's work to make faster
> modeset
Op 27-08-15 om 15:50 schreef Ville Syrjälä:
> On Thu, Aug 27, 2015 at 03:05:38PM +0200, Maarten Lankhorst wrote:
>> Op 27-08-15 om 14:52 schreef Ville Syrjälä:
>>> On Thu, Aug 27, 2015 at 02:50:34PM +0200, Maarten Lankhorst wrote:
Op 27-08-15 om 14:48 schreef Ville Syrjälä:
> On Thu, Aug 2
Op 27-08-15 om 15:58 schreef Ville Syrjälä:
> On Thu, Aug 27, 2015 at 03:44:05PM +0200, Maarten Lankhorst wrote:
>> Instead of doing a hack during primary plane commit the state
>> is updated during atomic evasion. It handles differences in
>> pipe size and the panel fitter.
>>
>> This is continuin
On Thu, Aug 27, 2015 at 04:00:05PM +0200, Maarten Lankhorst wrote:
> Op 27-08-15 om 15:50 schreef Ville Syrjälä:
> > On Thu, Aug 27, 2015 at 03:05:38PM +0200, Maarten Lankhorst wrote:
> >> Op 27-08-15 om 14:52 schreef Ville Syrjälä:
> >>> On Thu, Aug 27, 2015 at 02:50:34PM +0200, Maarten Lankhorst
On Wed, 26 Aug 2015, David Henningsson wrote:
> On 2015-08-26 10:33, Daniel Vetter wrote:
>> On Wed, Aug 19, 2015 at 10:48:55AM +0200, David Henningsson wrote:
>>> This callback will be called by the i915 driver to notify the hda
>>> driver that its HDMI information needs to be refreshed, i e,
>>>
From: Ville Syrjälä
I found these lying around in a branch. Most have r-b or ack from last time
[1] (the tegra patch doesn't). I also included the radeon 20bit AUX address
fix that seems to have fallen through the cracks as well.
I rebased these on top of my i2c-over-aux retry count series [2] s
From: Ville Syrjälä
Rename the I2C_STATUS request to I2C_WRITE_STATUS_UPDATE to match the
spec.
Acked-by: Alex Deucher
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/tegra/dpaux.c | 2 +-
include/drm/drm_dp_helper.h | 2 +-
2 files changed, 2 insertions(+), 2 del
From: Ville Syrjälä
AUX addresses are 20 bits long. Send out the entire address instead of
just the low 16 bits.
Cc: Alex Deucher
Cc: "Christian König"
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/radeon/atombios_dp.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
From: Ville Syrjälä
When we get an i2c defer or short ack for i2c-over-aux write we need
to switch to WRITE_STATUS_UPDATE to poll for the completion of the
original request.
Looks like radeon doesn't do anything special with the request type,
so hopefully just treating it the same as a i2c write
From: Ville Syrjälä
When we get an i2c defer or short ack for i2c-over-aux write we need
to switch to WRITE_STATUS_UPDATE to poll for the completion of the
original request.
i915 doesn't try to interpret wht request type apart from separating
reads from writes, and so we should be able to treat
From: Ville Syrjälä
A address-only I2C_WRITE can't be replied with a short i2c ack, but I
suppose it could be replied with an i2c defer. So the code should be
prepared for an address-only I2C_WRITE_STATUS_UPDATE.
Cc: Thierry Reding
Cc: "Terje Bergström"
Signed-off-by: Ville Syrjälä
---
drive
From: Ville Syrjälä
When an i2c WRITE gets an i2c defer or short i2c ack reply, we are
supposed to switch the request from I2C_WRITE to I2C_WRITE_STATUS_UPDATE
when we continue to poll for the completion of the request.
v2: Don't assume DP_AUX_I2C_WRITE is 0 even though it is, to make the
co
Hi,
On 27 August 2015 at 15:09, Ville Syrjälä wrote:
> On Thu, Aug 27, 2015 at 04:00:05PM +0200, Maarten Lankhorst wrote:
>> Op 27-08-15 om 15:50 schreef Ville Syrjälä:
>> > I don't think so. Speaking for i915, I think we've just rejected legacy
>> > page
>> > flips entirely with the pipe is off
On Thu, 27 Aug 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> I found these lying around in a branch. Most have r-b or ack from last time
> [1] (the tegra patch doesn't). I also included the radeon 20bit AUX address
> fix that seems to have fallen through the cracks as well.
On 27.08.2015 05:52, Zhang, Xiong Y wrote:
>> On Wed, 2015-08-26 at 11:15 +0300, Jani Nikula wrote:
>>> On Thu, 13 Aug 2015, "Jindal, Sonika"
>>> wrote:
On 8/13/2015 8:57 AM, Zhang, Xiong Y wrote:
>> On Wed, 2015-08-12 at 02:20 +, Zhang, Xiong Y wrote:
On Tue, 2015-08-11 at 0
On Thu, Aug 27, 2015 at 04:06:46PM +0200, Maarten Lankhorst wrote:
> Op 27-08-15 om 15:58 schreef Ville Syrjälä:
> > On Thu, Aug 27, 2015 at 03:44:05PM +0200, Maarten Lankhorst wrote:
> >> Instead of doing a hack during primary plane commit the state
> >> is updated during atomic evasion. It handle
On Thu, Aug 27, 2015 at 03:28:53PM +0100, Daniel Stone wrote:
> Hi,
>
> On 27 August 2015 at 15:09, Ville Syrjälä
> wrote:
> > On Thu, Aug 27, 2015 at 04:00:05PM +0200, Maarten Lankhorst wrote:
> >> Op 27-08-15 om 15:50 schreef Ville Syrjälä:
> >> > I don't think so. Speaking for i915, I think w
Hi,
On 6 August 2015 at 13:49, Daniel Vetter wrote:
> On Thu, Aug 06, 2015 at 01:19:35PM +0200, Maarten Lankhorst wrote:
>> Op 06-08-15 om 11:47 schreef Daniel Stone:
>> > On 30 July 2015 at 08:03, Maarten Lankhorst
>> > wrote:
>> >> + if (!state->active && state->event) {
>> >> +
On Thu, Aug 27, 2015 at 05:34:45PM +0300, Jani Nikula wrote:
> On Thu, 27 Aug 2015, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > I found these lying around in a branch. Most have r-b or ack from last time
> > [1] (the tegra patch doesn't). I also included the radeon 20bit A
On 27 August 2015 at 15:34, Ville Syrjälä wrote:
> On Thu, Aug 27, 2015 at 03:28:53PM +0100, Daniel Stone wrote:
>> On 27 August 2015 at 15:09, Ville Syrjälä
>> wrote:
>> > In the kernel it should amount to
>> > if (!pipe_active)
>> > send_event
>>
>> No, thankyou. Asking for an event, h
On Thu, Aug 27, 2015 at 03:36:09PM +0100, Daniel Stone wrote:
> Hi,
>
> On 6 August 2015 at 13:49, Daniel Vetter wrote:
> > On Thu, Aug 06, 2015 at 01:19:35PM +0200, Maarten Lankhorst wrote:
> >> Op 06-08-15 om 11:47 schreef Daniel Stone:
> >> > On 30 July 2015 at 08:03, Maarten Lankhorst
> >> >
From: Ville Syrjälä
Grab the connection_mutex around MSR link retraining to protect it
against a concurrent modeset. We already do the same for SST.
DP hpd_pulse can still otherwise race against modeset and ->detect(), so
it's not clear what will happen when both want to scribble into eg.
intel_
From: Ville Syrjälä
While glancing at the MST hpd code I noticed we have no locking in there
to protect the link retraining against a concurrent modeset. So I added some,
and then ocd struct and had to clean up the code a bit.
These patches are available at
git://github.com/vsyrjala/linux.git m
From: Ville Syrjälä
I'm not a fan of deeply nested ifs. Just pull most of the conditions
into a single place to flatten things a bit.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 32 ++--
1 file changed, 14 insertions(+), 18 deletions(-)
diff
From: Ville Syrjälä
Restructure intel_dp_check_mst_status() to be more straightforward to
read.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_dp.c | 92 +
1 file changed, 47 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/
On Wed, Aug 26, 2015 at 09:59:13PM +, Runyan, Arthur J wrote:
>
> >From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> >> On Wed, Aug 26, 2015 at 04:13:52PM -0300, Paulo Zanoni wrote:
> ...
> >> Although the doc for LPT _suggests_ this is only for LPT:LP, it
> >> doesn't mark this bit
On 08/27/2015 01:36 AM, Jani Nikula wrote:
> On Wed, 26 Aug 2015, Daniel Vetter wrote:
>> On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote:
>>> As we mark the preallocated objects as bound, we should also flag them
>>> correctly as being map-and-fenceable (if appropriate!) so that latt
On 18/08/15 22:32, yu@intel.com wrote:
From: Alex Dai
The firmware layout changes that now it only has css header +
uCode + RSA signature. Plus, other trivial changes to support
GuC V4.3.
Signed-off-by: Alex Dai
Reviewed-by: Dave Gordon
This works with the version 4.3 binary currently
On Wed, Aug 26, 2015 at 03:58:11PM -0300, Paulo Zanoni wrote:
> 2015-08-12 12:44 GMT-03:00 :
> > From: Ville Syrjälä
> >
> > Make LPT:LP checks look neater by wrapping the details in a
> > new HAS_PCH_LPT_LP() macro.
>
> This has the potential to be confusing since HAS_PCH_LPT() is also
> true f
On Thu, Aug 27, 2015 at 10:38:25AM +0300, Jani Nikula wrote:
> On Thu, 27 Aug 2015, Paulo Zanoni wrote:
> > 2015-08-12 12:44 GMT-03:00 :
> >> From: Ville Syrjälä
> >>
> >> Starting from SPT the only interrupts living in the south are GMBUS and
> >> HPD. What's worse some of the SPT specific new
On Thu, Aug 27, 2015 at 09:19:18AM -0700, Jesse Barnes wrote:
> On 08/27/2015 01:36 AM, Jani Nikula wrote:
> > On Wed, 26 Aug 2015, Daniel Vetter wrote:
> >> On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote:
> >>> As we mark the preallocated objects as bound, we should also flag them
>
On Wed, Aug 26, 2015 at 04:13:52PM -0300, Paulo Zanoni wrote:
> 2015-08-12 12:44 GMT-03:00 :
> > From: Ville Syrjälä
> >
> > The PORTA HPD defines are not BXT specific. They also exist on SPT,
> > and partially already on LPT:LP.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/
On Thu, Aug 27, 2015 at 07:13:49PM +0300, Ville Syrjälä wrote:
> On Thu, Aug 27, 2015 at 10:38:25AM +0300, Jani Nikula wrote:
> > On Thu, 27 Aug 2015, Paulo Zanoni wrote:
> > > 2015-08-12 12:44 GMT-03:00 :
> > >> From: Ville Syrjälä
> > >>
> > >> Starting from SPT the only interrupts living in t
On Thu, 2015-08-27 at 17:31 +0300, Timo Aaltonen wrote:
> On 27.08.2015 05:52, Zhang, Xiong Y wrote:
> > > On Wed, 2015-08-26 at 11:15 +0300, Jani Nikula wrote:
> > > > On Thu, 13 Aug 2015, "Jindal, Sonika"
> > > > wrote:
> > > > > On 8/13/2015 8:57 AM, Zhang, Xiong Y wrote:
> > > > > > > On Wed,
From: Robert Beckett
Virtualized systems often use a virtual P2X4 south bridge.
Detect this in intel_detect_pch and make a best guess as to which PCH
we should be using.
This was seen on vmware esxi hypervisor. When passing the graphics device
through to a guest, it can not pass through the PCH.
On 24/08/15 14:41, Graham Whaley wrote:
In commit
d1675198e: drm/i915: Integrate GuC-based command submission
the drm.tmpl include lines reference the intel_guc_submission.c but the
patch adds the file i915_guc_submission.c. drm.tmpl fails to build with:
docproc: .//drivers/gpu/drm/i915/inte
2015-08-12 12:44 GMT-03:00 :
> From: Ville Syrjälä
>
> ILK/SNB support port A HPD. While HPD is optional on eDP let's at least
> try to wite it up so that we might notice if the link has issues.
>
> The eDP spec suggests that if HPD is not wired up, one should poll the
> link status instead. We d
From: Peter Antoine
To reduce the amount of data being output the dump removes continguous
zeros to try and reduce the dump size. Not all the pages of context
contain valid data so it helps to reduce dump output.
Signed-off-by: Peter Antoine
Signed-off-by: Arun Siluvery
---
drivers/gpu/drm/i9
From: Armin Reese
A 'cat' of the debugfs file i915_dump_lrc, dumps only the first 0x600 bytes
of each ring's register state context. It does not provide information about
the remaining portion of the register state context.
This patch adds a new file i915_context_dump which displays the ring's hw
2015-08-12 12:44 GMT-03:00 :
> From: Ville Syrjälä
>
> As with ILK/SNB wire up the port A HPD on IVB/HSW.
>
> This might be more important on HSW with PSR. BSpec tells us that if the
> automagic link training performed by the hardware fails for some reason,
> we're going to get a short HPD and ar
2015-08-12 12:44 GMT-03:00 :
> From: Ville Syrjälä
>
> Supposedly we have to enable port A HPD also in the south on LPT:LP.
The correctness of this patch is going to be decided by the discussion
of patch 5, and up to this moment the answer we have is not 100%
precise.
If (conclusion == "CPU and
2015-08-12 12:44 GMT-03:00 :
> From: Ville Syrjälä
>
> Wire up the port A HPD for BDW. Compared to earlier platforms the
> interrupt setup is a bit different, but basically everything else
> looks the same.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_irq.c | 72
> +++
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