Some Thinkpad laptops' firmware will initiate a backlight level change
request through operation region on the events of AC plug/unplug, but
since we are not using firmware's interface to do the backlight setting
on these affected laptops, we do not want the firmware to use some
arbitrary value fro
A request to unmap the dma-buf may result from freeing the imported
GEM object in e.g. radeon - an action where the struct_mutex is already
held. In this circumstance, we cannot take the mutex again and so must
defer our updating of the object state until we can take the mutex (i.e.
defer it to our
On Tue, Jul 1, 2014 at 10:24 AM, Jani Nikula wrote:
> As discussed, it contains acpi-next as a dependency for Jesse's S0ix
> work through these merges (should not conflict, fingers crossed):
Aside: This is acpi-next for 3.16, so _really_ shouldn't conflict.
It's only in there since at the time I'
On Wed, Jun 25, 2014 at 12:46:57PM +0100, Siluvery, Arun wrote:
> On 25/06/2014 12:14, Damien Lespiau wrote:
> >On Wed, Jun 25, 2014 at 11:51:33AM +0100, Damien Lespiau wrote:
> >>(This is not necessarily things one would need to take into account for
> >>this work, just a few thoughts).
> >>
> >>O
On Fri, Jun 27, 2014 at 03:37:16PM +0200, Jiri Kosina wrote:
> On Thu, 26 Jun 2014, Pavel Machek wrote:
>
> > Ok, so I have set up machines for ktest / autobisect, and found out that
> > 3.16-rc1 no longer has that problem. Oh well, bisect would not be fun,
> > anyway...
>
> I am still seeing t
On Tue, Jul 01, 2014 at 10:39:52AM +0530, Vandana Kannan wrote:
> On Jun-18-2014 9:22 PM, Daniel Vetter wrote:
> > On Wed, Jun 18, 2014 at 07:47:24PM +0530, Vandana Kannan wrote:
> >> For Gen < 8, set M2_N2 registers on every mode set. This is required to
> >> make
> >> sure M2_N2 registers are se
On Thu, Jul 03, 2014 at 11:44:34PM +0300, Jani Nikula wrote:
> On Thu, 03 Jul 2014, Clint Taylor wrote:
> > On 07/02/2014 01:35 AM, Jani Nikula wrote:
> >> From: Clint Taylor
> >>
> >> The panel power sequencer on vlv doesn't appear to accept changes to its
> >> T12 power down duration during war
On Mon, Jun 30, 2014 at 07:59:55AM +0100, Chris Wilson wrote:
> On Sat, Jun 28, 2014 at 11:55:19PM -0400, Ed Tomlinson wrote:
> > On Saturday 28 June 2014 15:28:22 Ed Tomlinson wrote:
> >
> > Resend without html krud which causes list to bounce the message.
> >
> > > Hi
> > >
> > > This commit (
On Mon, Jun 30, 2014 at 01:25:29PM +0300, Jani Nikula wrote:
> On Thu, 05 Jun 2014, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > On most gen2-4 platforms the GTT can be (or maybe always is?)
> > inside the stolen memory region. If that's the case, reduce the
> > size of the
On Tue, Jun 24, 2014 at 05:22:17PM +0530, Deepak S wrote:
> Hi Chris/Daniel,
>
> The patch is helping in some of the side-effects due to gpu boost. I
> still need to get more data. I will keep the thread updated.
Ping. Might as well review it, too.
-Daniel
>
> Thanks
> Deepak
>
> On Thursday
On Wed, Jul 02, 2014 at 04:36:51PM +, Reese, Armin C wrote:
> Hi Daniel,
>
> Is it possible to get this patch on the review board? I've been on
> vacation a couple of weeks and haven't been around to push it.
Already done the review in my other reply ... Have you missed it?
http://www.spini
On Jul-07-2014 2:11 PM, Daniel Vetter wrote:
> On Tue, Jul 01, 2014 at 10:39:52AM +0530, Vandana Kannan wrote:
>> On Jun-18-2014 9:22 PM, Daniel Vetter wrote:
>>> On Wed, Jun 18, 2014 at 07:47:24PM +0530, Vandana Kannan wrote:
For Gen < 8, set M2_N2 registers on every mode set. This is require
On Fri, Jun 27, 2014 at 09:15:25AM -0700, Steve Aarnio wrote:
> On 06/11/2014 08:41 AM, Jesse Barnes wrote:
> >On Wed, 11 Jun 2014 17:39:29 +0200
> >Daniel Vetter wrote:
> >
> >>On Wed, Jun 11, 2014 at 5:13 PM, Jesse Barnes
> >>wrote:
> - If you have a machine which uses tiled framebuffers a
For Gen < 8, set M2_N2 registers on every mode set. This is required to make
sure M2_N2 registers are set during boot, resume from sleep for cross-
checking the state. The register is set only if DRRS is supported.
v2: Patch rebased
v3: Daniel's review comments
- Removed HAS_DRRS(dev) and
On Wed, Jun 25, 2014 at 11:47:50AM -0700, Jesse Barnes wrote:
> On Fri, 13 Jun 2014 13:37:49 +0300
> ville.syrj...@linux.intel.com wrote:
>
> > From: Ville Syrjälä
> >
> > We have a standard hook for reading out the current cdclk. Move the VLV
> > code from valleyview_cur_cdclk() to .get_display
Adding relevant read out comparison code, in check_crtc_state, for the new
member of crtc_config, dp_m2_n2, which was introduced to store link_m_n
values for a DP downclock mode (if available). Suggested by Daniel.
v2: Changed patch title.
Daniel's review comments incorporated.
Added relevant stat
On Wed, Jun 25, 2014 at 10:34:48PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 25, 2014 at 11:55:58AM -0700, Jesse Barnes wrote:
> > On Fri, 13 Jun 2014 13:37:53 +0300
> > ville.syrj...@linux.intel.com wrote:
> >
> > > From: Ville Syrjälä
> > >
> > > If someone is interested in the current cdclk f
On Wed, Jun 25, 2014 at 12:03:59PM -0700, Jesse Barnes wrote:
> On Fri, 13 Jun 2014 13:37:57 +0300
> ville.syrj...@linux.intel.com wrote:
>
> > From: Ville Syrjälä
> >
> > Set some bits in CCK/CCU to turn off display clocks when disp2d is power
> > gated. Not sure this really helps with anything
On Fri, Jun 27, 2014 at 09:38:52PM +0300, Imre Deak wrote:
> Hi Egbert,
>
> On Fri, 2014-06-27 at 15:55 +0200, Egbert Eich wrote:
> > Chris Wilson writes:
> > > On Fri, Jun 27, 2014 at 12:07:47AM +0200, Egbert Eich wrote:
> > > >
> > > > Hi Daniel, hi Imre,
> > > >
> > > > Daniel Vetter wri
From: Tim Gore
Quite a few single tests do not use the igt_simple_main
macro because they want access to argc/argv. So change the
igt_simple_main macro to pass these arguments through to the
"__real_mainxxx" function, and change these tests to use
the macro.
Also rename the igt_simple_init to __i
From: Tim Gore
igt_subtest_init mainly does stuff that we also want for
simple/single tests, such as looking for --list-subtests
and --help options and calling common_init. So just call
this from igt_simple_init and then set tests_with_subtests
to false. NOTE that this means that check_igt_exit i
From: Tim Gore
A step towards towards removing the distinction between
single and multiple tests. The first step is to change
the igt_simple_main macro to pass argc/v through to the
real_main function, so that several simple tests that want
argc/v can still use this macro.
Once this is done, all
Daniel,
I am not quite sure I understand what you want me to test?
Do you want me to try it without:
> > + if (ret == 0) {
> > + ret = do_unregister_con_driver(&vga_con);
Thanks
Ed
On Monday 07 July 2014 10:48:26 Daniel Vetter wrote:
> On Mon, Jun 30, 2014 a
Add a script to facilitate running the tests with Piglit by providing
simplified options for listing, filtering and creating summaries of test
runs.
Signed-off-by: Thomas Wood
---
.gitignore | 3 ++
scripts/Makefile.am | 2 +-
scripts/run-tests.sh | 120 +++
Daniel,
Just to be sure. The intel card here should not be claiming the real console.
It does
not have an output device and the bios set set so the radeon is the primary
device.
Ed
On Monday 07 July 2014 10:48:26 Daniel Vetter wrote:
> On Mon, Jun 30, 2014 at 07:59:55AM +0100, Chris Wilson
From: Michel Thierry
The workaround to limit SDE poly depth FIFO to 2 is not applied because
3D Chicken-3 mask bit is not set.
WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed.
Signed-off-by: Michel Thierry
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion
On Mon, Jul 07, 2014 at 06:45:49AM -0400, Ed Tomlinson wrote:
> Daniel,
>
> I am not quite sure I understand what you want me to test?
> Do you want me to try it without:
>
> > > + if (ret == 0) {
> > > + ret = do_unregister_con_driver(&vga_con);
Below the dif
On Monday, July 07, 2014 03:43:51 PM Aaron Lu wrote:
> Some Thinkpad laptops' firmware will initiate a backlight level change
> request through operation region on the events of AC plug/unplug, but
> since we are not using firmware's interface to do the backlight setting
> on these affected laptops
On Tue, Jun 24, 2014 at 12:29:45PM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Volkin, Bradley D
> > Sent: Monday, June 23, 2014 8:10 PM
> > To: Mateo Lozano, Oscar
> > Cc: Chris Wilson; intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH 26/53] drm/i9
On Mon, Jun 23, 2014 at 02:13:55PM +0100, Chris Wilson wrote:
> On Mon, Jun 23, 2014 at 01:09:37PM +, Mateo Lozano, Oscar wrote:
> > So far, yes, but that´s only because I artificially made intel_lrc.c
> > self-contained, as Daniel requested. What if we need to execute commands
> > from somew
On Monday, July 07, 2014 03:43:51 PM Aaron Lu wrote:
> Some Thinkpad laptops' firmware will initiate a backlight level change
> request through operation region on the events of AC plug/unplug, but
> since we are not using firmware's interface to do the backlight setting
> on these affected laptops
On Mon, Jun 23, 2014 at 11:52:11AM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> > Vetter
> > Sent: Wednesday, June 18, 2014 9:49 PM
> > To: Mateo Lozano, Oscar
> > Cc: intel-gfx@lists.freedesktop.org
>
On Thu, Jun 26, 2014 at 09:51:59AM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 09:42:45 -0700
> Jesse Barnes wrote:
> > https://bugs.freedesktop.org/show_bug.cgi?id=77869 looks like it's
> > potentially related, though that one affects HSW too, so not sure.
>
> Ah I guess the HSW bit is fixe
On Tue, Jun 24, 2014 at 02:59:36PM -0700, Todd Previte wrote:
> These look like they're already integrated into -nightly? But for the
> record...
Oops, I've fumbled my branch management and accidentally pushed this patch
to dinq. Thanks anyway for reviewing this to make sure it's correct.
-Daniel
michel.thie...@intel.com writes:
> From: Michel Thierry
>
> The workaround to limit SDE poly depth FIFO to 2 is not applied because
> 3D Chicken-3 mask bit is not set.
>
> WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed.
>
> Signed-off-by: Michel Thierry
Reviewed-by: Mika Kuoppal
On Tue, Jun 24, 2014 at 03:00:51PM -0700, Todd Previte wrote:
> This looks like it's good to go.
>
> As an aside, I don't *think* any of the compliance testing stuff I'm working
> on cares whether it's short of long pulse (1.1a compliance), but it will be
> interesting to see if/when/where it migh
On Sun, Jul 06, 2014 at 01:41:12PM +0530, Jindal, Sonika wrote:
> >Missing from this series, your two documentation patches (we need to
> >bundle things up as a entity that makes sense for one of the maintainers
> >to pick it up (either Dave or Daniel)).
> >
> I was not aware that documentation pat
On Wed, Jul 02, 2014 at 02:17:00PM +0100, Damien Lespiau wrote:
> On Wed, Jul 02, 2014 at 02:21:52PM +0530, Jindal, Sonika wrote:
> > Hi,
> >
> > Did anybody get a chance to review these patches?
>
> Ok, now those patches are all over the place. It's pretty much
> impossible to have the big pictu
On Mon, Jun 23, 2014 at 01:07:50PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 18, 2014 at 10:04:48PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > We're forgetting to unpin the last_context from the ggtt at GPU reset
> > time. This leads to the vma pin_count leaking a
On Wed, Jun 25, 2014 at 08:48:32AM +0200, Paolo Bonzini wrote:
> It is only slightly better, but the right solution is to fix the driver.
> There is absolutely zero reason why a graphics driver should know about the
> vendor/device ids of the PCH.
There is a very valid reason to know about the PCH
On Wed, Jun 25, 2014 at 10:28:21AM +0800, Chen, Tiejun wrote:
> On 2014/6/24 10:59, Zhenyu Wang wrote:
> >On 2014.06.19 17:53:51 +0800, Tiejun Chen wrote:
> >>Originally the reason to probe ISA bridge instead of Dev31:Fun0
> >>is to make graphics device passthrough work easy for VMM, that
> >>only
On Wed, Jun 25, 2014 at 01:01:36AM +0200, Rafael J. Wysocki wrote:
> On Tuesday, June 24, 2014 02:43:02 PM Jani Nikula wrote:
> > On Thu, 19 Jun 2014, Randy Dunlap wrote:
> > > On 06/18/14 23:16, Stephen Rothwell wrote:
> > >> Hi all,
> > >>
> > >> The powerpc allyesconfig is again broken more th
Il 07/07/2014 16:49, Daniel Vetter ha scritto:
So the correct fix to forward intel gpus to guests is indeed to somehow
fake the pch pci ids since the driver really needs them. Gross design, but
that's how the hardware works.
A way that could work for virtualization is this: if you find the card
On Fri, Jun 20, 2014 at 06:46:06AM -0700, Rodrigo Vivi wrote:
> With this bit enabled, HW changes the color when compressing frames for
> debug purposes.
>
> ALthough the simple way to enable a single bit is over intel_reg_write,
> this value is overwriten on next update_fbc so depending on the wo
On Sat, Jun 21, 2014 at 01:57:32PM +0200, Thomas Richter wrote:
> Hi Daniel, dear intel experts,
>
> this a bug report for the intel i945GM integrated graphics chipset (*NOT*
> the 830GM this time). Since at least 3.12.0, but also with the latest
> intel-drm-nightly, I have no boot console on the
On Mon, Jul 07, 2014 at 05:04:41PM +0200, Daniel Vetter wrote:
> On Sat, Jun 21, 2014 at 01:57:32PM +0200, Thomas Richter wrote:
> > Hi Daniel, dear intel experts,
> >
> > this a bug report for the intel i945GM integrated graphics chipset (*NOT*
> > the 830GM this time). Since at least 3.12.0, but
On Mon, Jun 23, 2014 at 12:57:44PM +0200, Krzysztof Halasa wrote:
> Chris Wilson writes:
>
> > I'll leave that to Daniel to try and combine FBC with CRTC viewports...
>
> Let me know if you need more tests, this problems happens on both my
> i5 4200M laptop and on a desktop PC with i7 4770k (thi
On Wed, Jul 02, 2014 at 06:18:41PM +0200, Thomas Meyer wrote:
> Am Montag, den 30.06.2014, 11:09 +0100 schrieb Chris Wilson:
> > On Mon, Jun 30, 2014 at 12:02:20PM +0200, Pavel Machek wrote:
> > > On Tue 2014-06-24 13:27:37, Chris Wilson wrote:
> > > > On Tue, Jun 24, 2014 at 02:24:30PM +0200, Thom
On Tue, Jun 24, 2014 at 05:20:36PM +0100, Damien Lespiau wrote:
> 'remove' is not recognized is a slightly older git (1.7.9.5) on a
> slightly older distro. Use 'rm' instead, which also work on the git
> version listing 'remove' in git remote help (1.8.3.1).
>
> Signed-off-by: Damien Lespiau
Mer
On Mon, 7 Jul 2014, Daniel Vetter wrote:
> > this patch on top of v3.16-rc3-62-gd92a333 makes the resume from ram
> > regression go away on my machine:
>
> Hm, we could conditionalize this hack on IS_G4X ... Chris, thoughts?
For the record, commenting out the code in stop_ring() the way Thomas d
On Tue, Jun 24, 2014 at 03:12:51PM -0700, Todd Previte wrote:
> Implements some of the basic EDID tests for Displayport compliance. These
> tests
> include reading the EDID, verifying the checksum and writing the test
> responses
> back to the sink device.
>
> Signed-off-by: Todd Previte
> ---
On Thu, Jul 03, 2014 at 12:01:35PM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Thursday, July 03, 2014 10:53 AM
> > To: Mateo Lozano, Oscar; intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH 4/
Suggested by Brad Volking.
Signed-off-by: Daniel Vetter
---
tests/gem_exec_parse.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index f7376e391ee9..5bab4db777b3 100644
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_
On Fri, Jun 27, 2014 at 06:44:04AM +1000, Dave Airlie wrote:
> >
> > Implemented a batch buffer submission scheduler for the i915 DRM driver.
> >
>
> While this seems very interesting, you might want to address in the commit msg
> or the cover email
>
> a) why this is needed,
> b) any improvement
On Mon, Jul 07, 2014 at 05:16:13PM +0200, Daniel Vetter wrote:
> On Wed, Jul 02, 2014 at 06:18:41PM +0200, Thomas Meyer wrote:
> > Hi,
> >
> > this patch on top of v3.16-rc3-62-gd92a333 makes the resume from ram
> > regression go away on my machine:
>
> Hm, we could conditionalize this hack on IS
There hasn't been a libdrm release containing the universal plane
definitions yet, so add them to igt_kms to allow compilation to succeed
in the meantime.
Signed-off-by: Matt Roper
---
lib/igt_kms.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
On Fri, Jun 27, 2014 at 03:15:37PM +0100, tim.g...@intel.com wrote:
> From: Tim Gore
>
> igt_subtest_init mainly does stuff that we also want for
> simple/single tests, such as looking for --list-subtests
> and --help options and calling common_init. So just call
> this from igt_simple_init and t
On Fri, Jun 27, 2014 at 03:15:36PM +0100, tim.g...@intel.com wrote:
> From: Tim Gore
>
> Quite a few single tests do not use the igt_simple_main
> macro because they want access to argc/argv. So change the
> igt_simple_main macro to pass these arguments through to the
> "__real_mainxxx" function,
On Mon, Jun 30, 2014 at 04:17:00PM -0300, Paulo Zanoni wrote:
> 2014-06-30 8:45 GMT-03:00 Rodrigo Vivi :
> > As pointed out before we don't have a reliable way to read back ips
> > status on BDW without the risk to disable it when reading.
> > However now we are pretending that IPS on BDW is always
Since the root cause is understood now and with the fix
commit 564ed191f5d816d24501664296991ec70327e2bc
Author: Imre Deak
Date: Fri Jun 13 14:54:21 2014 +0300
drm/i915: gmch: fix stuck primary plane due to memory self-refresh mode
in place the magic for G4x chipsets introduced
Hi,
We're working on Video Wall project on Linux, I need to know if it's
possible to grab Intel gpu output frames or not ? I also need to know if
It's possible to create virtual outputs for an Intel gpu to use gpu
acceleration and then grab the output frames ?
Regards
___
On Thu, May 29, 2014 at 02:10:22PM +0200, Daniel Vetter wrote:
> The always-on power well pixel path on haswell is routed such that it
> bypasses the panel fitter when we use is. Which means the pfit CRC
> source won't work in that configuration.
>
> Add a new disallow-bypass flags to the pfit pip
On Mon, Jul 07, 2014 at 06:20:34PM +0200, Egbert Eich wrote:
> Since the root cause is understood now and with the fix
>
>commit 564ed191f5d816d24501664296991ec70327e2bc
>Author: Imre Deak
>Date: Fri Jun 13 14:54:21 2014 +0300
>
>drm/i915: gmch: fix stuck primary plane due
On Mon, Jul 07, 2014 at 04:06:02PM +0300, Mika Kuoppala wrote:
> michel.thie...@intel.com writes:
>
> > From: Michel Thierry
> >
> > The workaround to limit SDE poly depth FIFO to 2 is not applied because
> > 3D Chicken-3 mask bit is not set.
> >
> > WaLimitSizeOfSDEPolyFifo is only for BDW-A and
I recently built a new desktop machine using a Shuttle SZ87R6, an I7-4770S and
a Dell U2713HM monitor. Did my initial HW burn-in and testing using a Fedora
20 KDE Spin Live CD (Kernel 3.11.10-301.fc20.x86_64 & KDE Systems settings
v4.11.3) using the DVI port on the computer and display and a du
On 07.07.2014 17:04, Daniel Vetter wrote:
On Sat, Jun 21, 2014 at 01:57:32PM +0200, Thomas Richter wrote:
Hi Daniel, dear intel experts,
this a bug report for the intel i945GM integrated graphics chipset (*NOT*
the 830GM this time). Since at least 3.12.0, but also with the latest
intel-drm-nigh
On Wed, May 28, 2014 at 07:23:58PM +0100, Damien Lespiau wrote:
> We currenly have a bug on HSW where asking for the panel fitter CRC when the
> power well is down returns 0x, but kms_pipe_crc_basic passes as it
> only
> tests that the CRCs obtained for a FB are consistent over time. We
>
So the next commit won't trigger a drmModeSetCrtc() if the primary plane
doesn't have any update needing it.
This shouldn't be a problem at the moment as we don't allow the primary
plane to be of a different size than the CRTC viewport, but it will most
likely change in the future and we don't wan
Signed-off-by: Damien Lespiau
---
lib/igt_debugfs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
index 5c4bbc5..d4a6cf6 100644
--- a/lib/igt_debugfs.c
+++ b/lib/igt_debugfs.c
@@ -527,6 +527,8 @@ void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc,
This is what we read when the CRC logic in in a powered down well. We
really don't want that to happen.
In theory, it's possible 0x to be a valid CRC value, so I don't
assert here.
Signed-off-by: Damien Lespiau
---
lib/igt_debugfs.c | 7 ++-
1 file changed, 6 insertions(+), 1 deleti
On Fri, May 23, 2014 at 08:28:47AM +0800, Yi Sun wrote:
> Get CRCs of a full red and a full blue surface as reference.
>
> Create a big framebuffer that is twice width and twice height as the
> current display mode.
>
> Fill the top left quarter with red, bottom right quarter with blue
> Check th
From: Yi Sun
Get CRCs of a full red and a full blue surface as reference.
Create a big framebuffer that is twice width and twice height as the
current display mode.
Fill the top left quarter with red, bottom right quarter with blue
Check the scanned out image with the CRTC at position (0, 0) of
Signed-off-by: Damien Lespiau
---
tests/kms_plane.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index 7437641..5f7bfc0 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -69,6 +69,7 @@ test_grab_crc(data_t *data, igt_output_t *output, col
On 07/04/2014 05:26 AM, Paulo Zanoni wrote:
2014-07-03 19:07 GMT-03:00 Clint Taylor :
On 07/02/2014 07:40 AM, Paulo Zanoni wrote:
2014-07-02 5:35 GMT-03:00 Jani Nikula :
From: Clint Taylor
The panel power sequencer on vlv doesn't appear to accept changes to its
T12 power down duration duri
On Mon, Jul 07, 2014 at 05:22:44PM +0100, Damien Lespiau wrote:
> On Thu, May 29, 2014 at 02:10:22PM +0200, Daniel Vetter wrote:
> > The always-on power well pixel path on haswell is routed such that it
> > bypasses the panel fitter when we use is. Which means the pfit CRC
> > source won't work in
On Mon, Jul 07, 2014 at 06:40:20PM +0200, Thomas Richter wrote:
> On 07.07.2014 17:04, Daniel Vetter wrote:
> >On Sat, Jun 21, 2014 at 01:57:32PM +0200, Thomas Richter wrote:
> >>Hi Daniel, dear intel experts,
> >>
> >>this a bug report for the intel i945GM integrated graphics chipset (*NOT*
> >>th
On Mon, Jul 07, 2014 at 04:57:45PM +0200, Paolo Bonzini wrote:
> Il 07/07/2014 16:49, Daniel Vetter ha scritto:
> >So the correct fix to forward intel gpus to guests is indeed to somehow
> >fake the pch pci ids since the driver really needs them. Gross design, but
> >that's how the hardware works.
Il 07/07/2014 19:54, Daniel Vetter ha scritto:
On Mon, Jul 07, 2014 at 04:57:45PM +0200, Paolo Bonzini wrote:
Il 07/07/2014 16:49, Daniel Vetter ha scritto:
So the correct fix to forward intel gpus to guests is indeed to somehow
fake the pch pci ids since the driver really needs them. Gross des
On Mon, Jun 30, 2014 at 02:03:18PM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 18:23:52 +0100
> john.c.harri...@intel.com wrote:
>
> > From: John Harrison
> >
> > The 'i915_driver_preclose()' function has a parameter called 'file_priv'.
> > However, this is misleading as the structure it po
On Mon, Jul 07, 2014 at 07:58:30PM +0200, Paolo Bonzini wrote:
> Il 07/07/2014 19:54, Daniel Vetter ha scritto:
> >On Mon, Jul 07, 2014 at 04:57:45PM +0200, Paolo Bonzini wrote:
> >>Il 07/07/2014 16:49, Daniel Vetter ha scritto:
> >>>So the correct fix to forward intel gpus to guests is indeed to s
On Mon, Jun 30, 2014 at 02:10:16PM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 18:23:54 +0100
> john.c.harri...@intel.com wrote:
> I think "no_flush" would be more in line with some of the other
> functions in the kernel. "wo" makes me think of "write only". But
> it's not a big deal.
>
> I
On Tue, Jul 01, 2014 at 08:12:11AM +0100, Chris Wilson wrote:
> On Mon, Jun 30, 2014 at 02:40:05PM -0700, Jesse Barnes wrote:
> > On Thu, 26 Jun 2014 18:23:55 +0100
> > john.c.harri...@intel.com wrote:
> >
> > > From: John Harrison
> > >
> > > The i915_gem_record_rings() code was unconditionally
On Thu, Jun 26, 2014 at 06:23:53PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Validation tests need a run time mechanism for querying whether or not the
> driver supports the Android native sync facility.
> ---
> drivers/gpu/drm/i915/i915_dma.c |7 +++
> include/ua
On Wed, Jul 02, 2014 at 10:51:23AM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 18:23:58 +0100
> john.c.harri...@intel.com wrote:
>
> > From: John Harrison
> >
> > There is a workaround for a hardware bug when reading the seqno from the
> > status
> > page. The bug does not exist on VLV how
On Thu, Jun 26, 2014 at 06:23:59PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Added a Kconfig option for enabling/disabling the GPU scheduler.
> ---
> drivers/gpu/drm/i915/Kconfig |8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/Kco
On Thu, Jun 26, 2014 at 06:24:00PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Created GPU scheduler source files with only a basic init function.
Same critique as for Oscar's execlist: Please don't order patches by
adding unused leave code and structures first, but start b
On Thu, Jun 26, 2014 at 06:24:01PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> A major point of the GPU scheduler is that it re-orders batch buffers after
> they
> have been submitted to the driver. Rather than attempting to re-assign seqno
> values, it is much simpler to h
On Wed, Jul 02, 2014 at 11:21:42AM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 18:24:05 +0100
> john.c.harri...@intel.com wrote:
>
> > From: John Harrison
> >
> > This is required by user land validation programs that need to know whether
> > the
> > scheduler is available for testing or n
On Thu, Jun 26, 2014 at 06:24:06PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> The scheduler needs to do interrupt triggered work that is too complex to do
> in
> the interrupt handler. Thus it requires a deferred work handler to process
> this
> work asynchronously.
> ---
On Wed, Jul 02, 2014 at 11:34:23AM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 18:24:08 +0100
> john.c.harri...@intel.com wrote:
>
> > From: John Harrison
> >
> > The scheduler decouples the submission of batch buffers to the driver with
> > their
> > submission to the hardware. This basic
On Wed, Jul 02, 2014 at 11:37:29AM -0700, Jesse Barnes wrote:
> On Thu, 26 Jun 2014 18:24:09 +0100
> john.c.harri...@intel.com wrote:
>
> > From: John Harrison
> >
> > Added a DRM debug facility for use by the scheduler.
> > ---
> > include/drm/drmP.h |7 +++
> > 1 file changed, 7 inser
On Thu, Jun 26, 2014 at 06:24:35PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Any commands written to the ring without the scheduler's knowledge can get
> lost
> during a pre-emption event. This checkin updates the page flip code to send
> the
> ring commands via the sche
On Mon, Jun 30, 2014 at 11:27:25AM +, Mateo Lozano, Oscar wrote:
>
>
> -
> Intel Corporation (UK) Limited
> Registered No. 1134945 (England)
> Registered Office: Pipers Way, Swindon SN3 1RJ
> VAT No: 860 2173 47
>
> > -O
On Monday, July 07, 2014 04:54:23 PM Daniel Vetter wrote:
> On Wed, Jun 25, 2014 at 01:01:36AM +0200, Rafael J. Wysocki wrote:
> > On Tuesday, June 24, 2014 02:43:02 PM Jani Nikula wrote:
> > > On Thu, 19 Jun 2014, Randy Dunlap wrote:
> > > > On 06/18/14 23:16, Stephen Rothwell wrote:
> > > >> Hi
Hi,
Since the 3.16.0-rc my laptop displays a lower color depth. Gradient
surfaces show a staircase effect where before the gradient was smooth.
--
Hans
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On Sun, Jun 29, 2014 at 06:27:03AM +0200, Andi Kleen wrote:
>
> Hi,
>
> The current version of chrome reproducibly hangs the GPU on my
> sandy bridge system when using google maps. The GUI freezes
> and I have to kill chrome from a console to recover.
>
> Known problem? Crash dump is attached.
On Tue, Jul 01, 2014 at 02:41:36AM -0700, Rodrigo Vivi wrote:
> It just fix a typo.
>
> v2: removing underscore to let this like all other ring names (Oscar)
>
> Cc: Oscar Mateo
> Reviewed-by (v1): Ben Widawsky
> Signed-off-by: Rodrigo Vivi
Queued for -next, thanks for the patch.
-Daniel
> -
From: Clint Taylor
The panel power sequencer on vlv doesn't appear to accept changes to its
T12 power down duration during warm reboots. This change forces a delay
for warm reboots to the T12 panel timing as defined in the VBT table for
the connected panel.
Ver2: removed redundant pr_crit(), com
On Mon, Jun 30, 2014 at 06:16:50PM -0700, Ben Widawsky wrote:
> On Mon, Jun 30, 2014 at 09:51:11AM -0700, Rodrigo Vivi wrote:
> > ring index calculation table was out of date after other rings were added,
> > although the formula is flexible and scale when adding new rings.
> >
> > So this patch j
On Mon, Jul 07, 2014 at 10:01:27PM +0200, Rafael J. Wysocki wrote:
> On Monday, July 07, 2014 04:54:23 PM Daniel Vetter wrote:
> > On Wed, Jun 25, 2014 at 01:01:36AM +0200, Rafael J. Wysocki wrote:
> > > On Tuesday, June 24, 2014 02:43:02 PM Jani Nikula wrote:
> > > > On Thu, 19 Jun 2014, Randy Dun
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