On Mon, Jul 07, 2014 at 04:06:02PM +0300, Mika Kuoppala wrote: > michel.thie...@intel.com writes: > > > From: Michel Thierry <michel.thie...@intel.com> > > > > The workaround to limit SDE poly depth FIFO to 2 is not applied because > > 3D Chicken-3 mask bit is not set. > > > > WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed. > > > > Signed-off-by: Michel Thierry <michel.thie...@intel.com> > Reviewed-by: Mika Kuoppala <mika.kuopp...@intel.com>
Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
